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annotate Documentations/dump-rte.cfg @ 270:2e58a4094770 write-from-sim
feature, debug: make simulator write a logbook entry
When compiling the code with -DSIM_WRITES_LOGBOOK, the simulator writes
to the logbook. This is for debug purpose only. This commit does *not*
define this SIM_WRITES_LOGBOOK, so when compiled, things are functionally
unchanged.
Caveat 1: a simulator generated log cannot be advanced with +5 min. It needs
to run in real time.
Caveat 2: The generated log is currently not "complete". For example, CCR
setpoint switches are not logged. There are likely more small events not
logged. This means that a sim generated log is not a full replacement for
real dive testing.
Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
| author | Jan Mulder <jlmulder@xs4all.nl> |
|---|---|
| date | Wed, 24 Apr 2019 17:10:51 +0200 |
| parents | 01cc5959f199 |
| children |
| rev | line source |
|---|---|
| 34 | 1 #! openocd -f |
| 2 # Define the prob used: | |
| 3 source [find interface/stlink-v2.cfg] | |
| 4 set WORKAREASIZE 0x8000 | |
| 5 transport select hla_swd | |
| 6 | |
| 7 # Reset options | |
| 8 set ENABLE_LOW_POWER 1 | |
| 9 set STOP_WATCHDOG 1 | |
| 10 reset_config srst_only srst_nogate connect_assert_srst | |
| 11 | |
| 12 # Seelct the right chip | |
| 13 set CHIPNAME stm32f411RETx | |
| 14 set CONNECT_UNDER_RESET 1 | |
| 15 source [find target/stm32f4x.cfg] | |
| 16 | |
| 17 # Allow to continue execution after a connection: | |
| 18 init_reset run | |
| 19 | |
| 20 #puts "Flash banks:" | |
| 21 #flash banks | |
| 22 | |
| 23 #puts "Reading..." | |
| 24 #flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000 | |
| 25 | |
| 26 #puts "Done." | |
| 27 #exit |