view Documentations/dump-rte.cfg @ 921:eb4109d7d1e9 Evo_2_23

Improved mix mode ADC conversion: Activity of UART sensors may have an impact to ADC measurement. To avoid the ADC trigger was moved into a time window ~300ms after last UART command request => After UART sensor performed measurement but before next measurement is requested. In addition the general ADC measurement cycle has been changed to one second to avoid jitter in the value updates on the display.
author Ideenmodellierer
date Sun, 03 Nov 2024 18:19:51 +0100
parents 01cc5959f199
children
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#! openocd -f
# Define the prob used:
source [find interface/stlink-v2.cfg]
set WORKAREASIZE 0x8000
transport select hla_swd

# Reset options
set ENABLE_LOW_POWER 1
set STOP_WATCHDOG 1
reset_config srst_only srst_nogate connect_assert_srst

# Seelct the right chip
set CHIPNAME stm32f411RETx
set CONNECT_UNDER_RESET 1
source [find target/stm32f4x.cfg]

# Allow to continue execution after a connection:
init_reset run

#puts "Flash banks:"
#flash banks

#puts "Reading..."
#flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000

#puts "Done."
#exit