Bugfix: fix drawing of CCR bailout profile When bailing out to an OC gas from CCR dive mode, the profile was not drawn correctly in the device internal logbook. It was truncated from the moment of bailout, and the remaining CCR part of the dive was stretched over the full dive time. Yes, a lot of text for a 1 letter fix, but finding the reason of this bug was not trivial. It appeared to be a parsing error from the internal logbook, looking at the wrong bit from the extended sample data on drawing time. The bit that denotes bailout is bit 0, and not bit 1. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>

#! openocd -f
# Define the prob used:
source [find interface/stlink-v2.cfg]
set WORKAREASIZE 0x8000
transport select hla_swd

# Reset options
set ENABLE_LOW_POWER 1
set STOP_WATCHDOG 1
reset_config srst_only srst_nogate connect_assert_srst

# Seelct the right chip
set CHIPNAME stm32f411RETx
set CONNECT_UNDER_RESET 1
source [find target/stm32f4x.cfg]

# Allow to continue execution after a connection:
init_reset run

#puts "Flash banks:"
#flash banks

#puts "Reading..."
#flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000

#puts "Done."
#exit