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view Documentations/dump-rte.cfg @ 220:e524a824d8f2 Improve_IPC_Sync

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Added schedule point for functions executed once in a second SPI communication takes place every 100ms triggered by the master (main). Synchronisation is done using the SPI RX complete callback which is called ~4ms after communication was started. In the previous implementation this could happen in parallel to usage of data. To solve this potential problem the execution of functions called once a second was moved from 1000ms to 980ms giving a 20ms window for execution.
author ideenmodellierer
date Sun, 31 Mar 2019 15:49:47 +0200
parents 01cc5959f199
children
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#! openocd -f
# Define the prob used:
source [find interface/stlink-v2.cfg]
set WORKAREASIZE 0x8000
transport select hla_swd

# Reset options
set ENABLE_LOW_POWER 1
set STOP_WATCHDOG 1
reset_config srst_only srst_nogate connect_assert_srst

# Seelct the right chip
set CHIPNAME stm32f411RETx
set CONNECT_UNDER_RESET 1
source [find target/stm32f4x.cfg]

# Allow to continue execution after a connection:
init_reset run

#puts "Flash banks:"
#flash banks

#puts "Reading..."
#flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000

#puts "Done."
#exit