view Documentations/dump-rte.cfg @ 233:9f0efc4df01e div-fixes-4-1

cleanup, bugfix: do not exit simulator on 5h dive time The code cleaned up here caused me some confusion as over 5h dives where silently aborted in the simulator. Ok, not many uses will try to simulate 5h dives, but its a useless limitation. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
author Jan Mulder <jlmulder@xs4all.nl>
date Fri, 05 Apr 2019 09:12:04 +0200
parents 01cc5959f199
children
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#! openocd -f
# Define the prob used:
source [find interface/stlink-v2.cfg]
set WORKAREASIZE 0x8000
transport select hla_swd

# Reset options
set ENABLE_LOW_POWER 1
set STOP_WATCHDOG 1
reset_config srst_only srst_nogate connect_assert_srst

# Seelct the right chip
set CHIPNAME stm32f411RETx
set CONNECT_UNDER_RESET 1
source [find target/stm32f4x.cfg]

# Allow to continue execution after a connection:
init_reset run

#puts "Flash banks:"
#flash banks

#puts "Reading..."
#flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000

#puts "Done."
#exit