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view Documentations/dump-rte.cfg @ 793:9da81033ad44
Bugfix PSCR Settings in Simulator Mode:
The dive settings structure is not filled at the start of a simulated dive. As result changes in the PSCR parameters were used by the simulator unless the OSTC was restarted. To solve this problem the update of the dive settings have to be triggered after a parameter had been changed.
author | Ideenmodellierer |
---|---|
date | Thu, 27 Jul 2023 21:52:19 +0200 |
parents | 01cc5959f199 |
children |
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#! openocd -f # Define the prob used: source [find interface/stlink-v2.cfg] set WORKAREASIZE 0x8000 transport select hla_swd # Reset options set ENABLE_LOW_POWER 1 set STOP_WATCHDOG 1 reset_config srst_only srst_nogate connect_assert_srst # Seelct the right chip set CHIPNAME stm32f411RETx set CONNECT_UNDER_RESET 1 source [find target/stm32f4x.cfg] # Allow to continue execution after a connection: init_reset run #puts "Flash banks:" #flash banks #puts "Reading..." #flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000 #puts "Done." #exit