Improvement SPI stability/recoverability The core part of this commit comes from careful code reading. The core is the swap of Scheduler_Request_sync_with_SPI(SPI_SYNC_METHOD_SOFT) and SPI_Start_single_TxRx_with_Master(). This code is sitting in an if-clause that is triggered on SPI comms failure. Instead of blindly trying to communicate again (which will very likely fail again), first try to reset the comms link, and then try to communicate again. That simply makes more sense in this case. This is heavily tested, on 2 simple dives, and 5 very long deco schedules from the simulator (10+ hour deco's), and a lot of small simulated dives (upto 2h runtime). Of all these tests, only one long session failed after 9 out of 11h runtime. Analyzing that one failure, suggests that the RTE is looping in some error handler, which (obviously) results in a SPI comms failure as a result. I consider this not part of this change. Additionally, some more cleanup is done in this code. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>

#! openocd -f
# Define the prob used:
source [find interface/stlink-v2.cfg]
set WORKAREASIZE 0x8000
transport select hla_swd

# Reset options
set ENABLE_LOW_POWER 1
set STOP_WATCHDOG 1
reset_config srst_only srst_nogate connect_assert_srst

# Seelct the right chip
set CHIPNAME stm32f411RETx
set CONNECT_UNDER_RESET 1
source [find target/stm32f4x.cfg]

# Allow to continue execution after a connection:
init_reset run

#puts "Flash banks:"
#flash banks

#puts "Reading..."
#flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000

#puts "Done."
#exit