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view Documentations/dump-rte.cfg @ 752:4f19336a3f21

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Dev Bugfix: Alignment problem in lifedata structure: Since the introduction of the 64 bit DigO2 sensor ID the potential risk of a misalignment is present in the lifedata structure. E.g. If a new 8bit variable is added in front of the data structure containing the 64bit value. To avoid this in future the sensor data structure which may contain the 64bit value has been moved to the top of the structure (first element)
author Ideenmodellierer
date Tue, 07 Mar 2023 19:51:30 +0100
parents 01cc5959f199
children
line wrap: on
line source

#! openocd -f
# Define the prob used:
source [find interface/stlink-v2.cfg]
set WORKAREASIZE 0x8000
transport select hla_swd

# Reset options
set ENABLE_LOW_POWER 1
set STOP_WATCHDOG 1
reset_config srst_only srst_nogate connect_assert_srst

# Seelct the right chip
set CHIPNAME stm32f411RETx
set CONNECT_UNDER_RESET 1
source [find target/stm32f4x.cfg]

# Allow to continue execution after a connection:
init_reset run

#puts "Flash banks:"
#flash banks

#puts "Reading..."
#flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000

#puts "Done."
#exit