diff Small_CPU/Src/compass.c @ 72:63a375affb27

Merge
author heinrichsweikamp
date Tue, 11 Sep 2018 22:16:05 +0200
parents 6a6116d7b5bb
children 22a1094545f3
line wrap: on
line diff
--- a/Small_CPU/Src/compass.c	Wed Sep 05 10:41:48 2018 +0200
+++ b/Small_CPU/Src/compass.c	Tue Sep 11 22:16:05 2018 +0200
@@ -275,13 +275,13 @@
 		I2C_Master_Receive(  DEVICE_COMPASS_303D, &data, 1);
 		if(data == WHOIAM_VALUE)
 			hardwareCompass = LSM303D;
-//		else
-//			hardwareCompass = HMC5883L;
+		else
+			hardwareCompass = HMC5883L;
 	}
 
 	
-// könnte Probleme mit altem Chip machen
-// beim 303D führt dieser Code dazu, dass WHOIAM_VALUE nicht geschickt wird!!!
+// k�nnte Probleme mit altem Chip machen
+// beim 303D f�hrt dieser Code dazu, dass WHOIAM_VALUE nicht geschickt wird!!!
 	
 #ifdef MODE_LSM303DLHC
 	HAL_StatusTypeDef resultOfOperation = HAL_TIMEOUT;
@@ -306,7 +306,7 @@
 	}
 
 #endif
-/*	
+
 	if(hardwareCompass == 0)
 	{
 		uint8_t data = WHO_AM_I;
@@ -317,7 +317,7 @@
 		else
 			hardwareCompass = HMC5883L;
 	}
-*/
+
 // was in else before !	
 	if(hardwareCompass == 0)
 		hardwareCompass = HMC5883L;	
@@ -376,7 +376,7 @@
 {
 	if(hardwareCompass == LSM303DLHC)
 	{
-		return compass_calib_common(); // 170821 zur Zeit kein lowpass filtering gefunden, nur high pass auf dem Register ohne Erklärung
+		return compass_calib_common(); // 170821 zur Zeit kein lowpass filtering gefunden, nur high pass auf dem Register ohne Erkl�rung
 	}
 	else
 	if(hardwareCompass == LSM303D)
@@ -1148,7 +1148,7 @@
 {
 // acceleration
 	// todo : BDU an (wie 303D) und high res, beides in REG4
-		//LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier könnte filter sein 0x8?80, cutoff freq. not beschrieben
+		//LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier k�nnte filter sein 0x8?80, cutoff freq. not beschrieben
 	
 	if(fast == 0)
 	{
@@ -1185,13 +1185,13 @@
 	
 //		LSM303D_write_checked_reg(,);
 //		LSM303D_write_checked_reg(DLHC_CTRL_REG1_A, 0x27); // 0x27 = acc. normal mode with ODR 50Hz - passt nicht mit datenblatt!!
-//		LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x40 = full scale range ±2 gauss in continuous data update mode and change the little-endian to a big-endian structure.
+//		LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x40 = full scale range �2 gauss in continuous data update mode and change the little-endian to a big-endian structure.
 
 	if(fast == 0)
 	{
 		LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x27); // 0x27 = acc. normal mode, all axes, with ODR 10HZ laut LSM303DLHC, page 25/42
 		//
-		//LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier könnte filter sein 0x8?80, cutoff freq. not beschrieben
+		//LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier k�nnte filter sein 0x8?80, cutoff freq. not beschrieben
 		//LSM303D_write_checked_reg(DLHC_CTRL_REG3_A,0x00); // 0x00 default
 		//
 		LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG4_A, 0x00); // 0x00 = ich glaube little-endian ist gut
@@ -1206,7 +1206,7 @@
 	{
 		LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x57); // 0x57 = acc. normal mode, all axes, with ODR 100HZ, LSM303DLHC, page 25/42
 		//
-		//LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier könnte filter sein 0x8?80, cutoff freq. not beschrieben
+		//LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier k�nnte filter sein 0x8?80, cutoff freq. not beschrieben
 		//LSM303D_write_checked_reg(DLHC_CTRL_REG3_A,0x00); // 0x00 default
 		//
 		LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG4_A, 0x00); // 0x00 = ich glaube little-endian ist gut
@@ -1318,7 +1318,7 @@
 
 	rotate_accel_3f(&xraw_f, &yraw_f, &zraw_f); 
 	
-	// mh für 303D
+	// mh f�r 303D
 	accel_report_x = xraw_f;
 	accel_report_y = yraw_f;
 	accel_report_z = zraw_f;