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comparison Small_CPU/Src/compass.c @ 72:63a375affb27

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Merge
author heinrichsweikamp
date Tue, 11 Sep 2018 22:16:05 +0200
parents 6a6116d7b5bb
children 22a1094545f3
comparison
equal deleted inserted replaced
71:c66e66f6faa7 72:63a375affb27
273 uint8_t data = WHO_AM_I; 273 uint8_t data = WHO_AM_I;
274 I2C_Master_Transmit( DEVICE_COMPASS_303D, &data, 1); 274 I2C_Master_Transmit( DEVICE_COMPASS_303D, &data, 1);
275 I2C_Master_Receive( DEVICE_COMPASS_303D, &data, 1); 275 I2C_Master_Receive( DEVICE_COMPASS_303D, &data, 1);
276 if(data == WHOIAM_VALUE) 276 if(data == WHOIAM_VALUE)
277 hardwareCompass = LSM303D; 277 hardwareCompass = LSM303D;
278 // else 278 else
279 // hardwareCompass = HMC5883L; 279 hardwareCompass = HMC5883L;
280 } 280 }
281 281
282 282
283 // könnte Probleme mit altem Chip machen 283 // k�nnte Probleme mit altem Chip machen
284 // beim 303D führt dieser Code dazu, dass WHOIAM_VALUE nicht geschickt wird!!! 284 // beim 303D f�hrt dieser Code dazu, dass WHOIAM_VALUE nicht geschickt wird!!!
285 285
286 #ifdef MODE_LSM303DLHC 286 #ifdef MODE_LSM303DLHC
287 HAL_StatusTypeDef resultOfOperation = HAL_TIMEOUT; 287 HAL_StatusTypeDef resultOfOperation = HAL_TIMEOUT;
288 288
289 if(hardwareCompass == 0) 289 if(hardwareCompass == 0)
304 testCompassTypeDebug = 0xEE; 304 testCompassTypeDebug = 0xEE;
305 } 305 }
306 } 306 }
307 307
308 #endif 308 #endif
309 /* 309
310 if(hardwareCompass == 0) 310 if(hardwareCompass == 0)
311 { 311 {
312 uint8_t data = WHO_AM_I; 312 uint8_t data = WHO_AM_I;
313 I2C_Master_Transmit( DEVICE_COMPASS_303D, &data, 1); 313 I2C_Master_Transmit( DEVICE_COMPASS_303D, &data, 1);
314 I2C_Master_Receive( DEVICE_COMPASS_303D, &data, 1); 314 I2C_Master_Receive( DEVICE_COMPASS_303D, &data, 1);
315 if(data == WHOIAM_VALUE) 315 if(data == WHOIAM_VALUE)
316 hardwareCompass = LSM303D; 316 hardwareCompass = LSM303D;
317 else 317 else
318 hardwareCompass = HMC5883L; 318 hardwareCompass = HMC5883L;
319 } 319 }
320 */ 320
321 // was in else before ! 321 // was in else before !
322 if(hardwareCompass == 0) 322 if(hardwareCompass == 0)
323 hardwareCompass = HMC5883L; 323 hardwareCompass = HMC5883L;
324 324
325 #ifdef TEST_IF_HMC5883L 325 #ifdef TEST_IF_HMC5883L
374 // =============================================================================== 374 // ===============================================================================
375 int compass_calib(void) 375 int compass_calib(void)
376 { 376 {
377 if(hardwareCompass == LSM303DLHC) 377 if(hardwareCompass == LSM303DLHC)
378 { 378 {
379 return compass_calib_common(); // 170821 zur Zeit kein lowpass filtering gefunden, nur high pass auf dem Register ohne Erklärung 379 return compass_calib_common(); // 170821 zur Zeit kein lowpass filtering gefunden, nur high pass auf dem Register ohne Erkl�rung
380 } 380 }
381 else 381 else
382 if(hardwareCompass == LSM303D) 382 if(hardwareCompass == LSM303D)
383 { 383 {
384 LSM303D_accel_set_onchip_lowpass_filter_bandwidth(773); 384 LSM303D_accel_set_onchip_lowpass_filter_bandwidth(773);
1146 1146
1147 void compass_init_LSM303DLHC(uint8_t fast, uint8_t gain) 1147 void compass_init_LSM303DLHC(uint8_t fast, uint8_t gain)
1148 { 1148 {
1149 // acceleration 1149 // acceleration
1150 // todo : BDU an (wie 303D) und high res, beides in REG4 1150 // todo : BDU an (wie 303D) und high res, beides in REG4
1151 //LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier könnte filter sein 0x8?80, cutoff freq. not beschrieben 1151 //LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier k�nnte filter sein 0x8?80, cutoff freq. not beschrieben
1152 1152
1153 if(fast == 0) 1153 if(fast == 0)
1154 { 1154 {
1155 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x27); // 10 hz 1155 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x27); // 10 hz
1156 } 1156 }
1183 return; 1183 return;
1184 1184
1185 1185
1186 // LSM303D_write_checked_reg(,); 1186 // LSM303D_write_checked_reg(,);
1187 // LSM303D_write_checked_reg(DLHC_CTRL_REG1_A, 0x27); // 0x27 = acc. normal mode with ODR 50Hz - passt nicht mit datenblatt!! 1187 // LSM303D_write_checked_reg(DLHC_CTRL_REG1_A, 0x27); // 0x27 = acc. normal mode with ODR 50Hz - passt nicht mit datenblatt!!
1188 // LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x40 = full scale range ±2 gauss in continuous data update mode and change the little-endian to a big-endian structure. 1188 // LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x40 = full scale range �2 gauss in continuous data update mode and change the little-endian to a big-endian structure.
1189 1189
1190 if(fast == 0) 1190 if(fast == 0)
1191 { 1191 {
1192 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x27); // 0x27 = acc. normal mode, all axes, with ODR 10HZ laut LSM303DLHC, page 25/42 1192 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x27); // 0x27 = acc. normal mode, all axes, with ODR 10HZ laut LSM303DLHC, page 25/42
1193 // 1193 //
1194 //LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier könnte filter sein 0x8?80, cutoff freq. not beschrieben 1194 //LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier k�nnte filter sein 0x8?80, cutoff freq. not beschrieben
1195 //LSM303D_write_checked_reg(DLHC_CTRL_REG3_A,0x00); // 0x00 default 1195 //LSM303D_write_checked_reg(DLHC_CTRL_REG3_A,0x00); // 0x00 default
1196 // 1196 //
1197 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG4_A, 0x00); // 0x00 = ich glaube little-endian ist gut 1197 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG4_A, 0x00); // 0x00 = ich glaube little-endian ist gut
1198 // LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x00 = ich glaube little-endian ist gut 1198 // LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x00 = ich glaube little-endian ist gut
1199 // 1199 //
1204 } 1204 }
1205 else 1205 else
1206 { 1206 {
1207 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x57); // 0x57 = acc. normal mode, all axes, with ODR 100HZ, LSM303DLHC, page 25/42 1207 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG1_A, 0x57); // 0x57 = acc. normal mode, all axes, with ODR 100HZ, LSM303DLHC, page 25/42
1208 // 1208 //
1209 //LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier könnte filter sein 0x8?80, cutoff freq. not beschrieben 1209 //LSM303D_write_checked_reg(DLHC_CTRL_REG2_A,0x00); // 0x00 default, hier k�nnte filter sein 0x8?80, cutoff freq. not beschrieben
1210 //LSM303D_write_checked_reg(DLHC_CTRL_REG3_A,0x00); // 0x00 default 1210 //LSM303D_write_checked_reg(DLHC_CTRL_REG3_A,0x00); // 0x00 default
1211 // 1211 //
1212 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG4_A, 0x00); // 0x00 = ich glaube little-endian ist gut 1212 LSM303DLHC_accelerator_write_req(DLHC_CTRL_REG4_A, 0x00); // 0x00 = ich glaube little-endian ist gut
1213 // LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x00 = ich glaube little-endian ist gut 1213 // LSM303D_write_checked_reg(DLHC_CTRL_REG4_A, 0x40); // 0x00 = ich glaube little-endian ist gut
1214 // 1214 //
1316 yraw_f = ((float)( (int16_t)((accDataBuffer[3] << 8) | (accDataBuffer[2])))); 1316 yraw_f = ((float)( (int16_t)((accDataBuffer[3] << 8) | (accDataBuffer[2]))));
1317 zraw_f = ((float)( (int16_t)((accDataBuffer[5] << 8) | (accDataBuffer[4])))); 1317 zraw_f = ((float)( (int16_t)((accDataBuffer[5] << 8) | (accDataBuffer[4]))));
1318 1318
1319 rotate_accel_3f(&xraw_f, &yraw_f, &zraw_f); 1319 rotate_accel_3f(&xraw_f, &yraw_f, &zraw_f);
1320 1320
1321 // mh für 303D 1321 // mh f�r 303D
1322 accel_report_x = xraw_f; 1322 accel_report_x = xraw_f;
1323 accel_report_y = yraw_f; 1323 accel_report_y = yraw_f;
1324 accel_report_z = zraw_f; 1324 accel_report_z = zraw_f;
1325 1325
1326 accel_DX_f = ((int16_t)(accel_report_x)); 1326 accel_DX_f = ((int16_t)(accel_report_x));