annotate Small_CPU/Src/uart.c @ 898:fac13aa6ba93 Evo_2_23

Disabled debug features
author ideenmodellierer
date Thu, 26 Sep 2024 18:40:41 +0200
parents 9e2f9b91e827
children 4832981f9af8
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1 /**
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2 ******************************************************************************
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3 * @file uart.c
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4 * @author heinrichs weikamp gmbh
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5 * @version V0.0.1
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6 * @date 27-March-2014
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7 * @brief button control
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8 *
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9 @verbatim
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10 ==============================================================================
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11 ##### How to use #####
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12 ==============================================================================
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13 @endverbatim
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14 ******************************************************************************
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15 * @attention
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16 *
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17 * <h2><center>&copy; COPYRIGHT(c) 2015 heinrichs weikamp</center></h2>
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18 *
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19 ******************************************************************************
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20 */
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "uart.h"
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23 #include "uartProtocol_O2.h"
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24 #include "uartProtocol_Co2.h"
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25 #include "uartProtocol_Sentinel.h"
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26 #include "externalInterface.h"
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27 #include "data_exchange.h"
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28 #include <string.h> /* memset */
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31 /* Private variables ---------------------------------------------------------*/
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32
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33
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34
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35 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */
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36 #define CHUNKS_PER_BUFFER (5u)
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40 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart6_rx, hdma_usart6_tx;
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42 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */
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43 uint8_t rxBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */
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44 uint8_t txBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */
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45
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46 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */
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47 static uint8_t rxReadIndex; /* Index at which new data is stared */
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48 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */
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49 static uint8_t dmaActive; /* Indicator if DMA reception needs to be started */
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53
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54 /* Exported functions --------------------------------------------------------*/
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55
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56
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57 void MX_USART1_UART_Init(void)
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58 {
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59 /* regular init */
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60
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61 huart1.Instance = USART1;
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62 huart1.Init.BaudRate = 19200;
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63 huart1.Init.WordLength = UART_WORDLENGTH_8B;
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64 huart1.Init.StopBits = UART_STOPBITS_1;
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65 huart1.Init.Parity = UART_PARITY_NONE;
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66 huart1.Init.Mode = UART_MODE_TX_RX;
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67 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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68 huart1.Init.OverSampling = UART_OVERSAMPLING_16;
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69
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70 HAL_UART_Init(&huart1);
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71
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72 MX_USART1_DMA_Init();
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73
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74 memset(rxBuffer,BUFFER_NODATA,sizeof(rxBuffer));
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75 rxReadIndex = 0;
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76 lastCmdIndex = 0;
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77 rxWriteIndex = 0;
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78 dmaActive = 0;
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79 }
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82
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83 void MX_USART1_UART_DeInit(void)
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84 {
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85 HAL_DMA_Abort(&hdma_usart1_rx);
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86 HAL_DMA_DeInit(&hdma_usart1_rx);
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87 HAL_UART_DeInit(&huart1);
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88 dmaActive = 0;
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89 }
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90
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91 void MX_USART1_DMA_Init()
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92 {
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93 /* DMA controller clock enable */
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94 __DMA2_CLK_ENABLE();
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95
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96 /* Peripheral DMA init*/
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97 hdma_usart1_rx.Instance = DMA2_Stream5;
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98 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
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99 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH;
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100 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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101 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
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102 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE;
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103 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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104 hdma_usart1_rx.Init.Mode = DMA_NORMAL;
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105 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
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106 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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107 HAL_DMA_Init(&hdma_usart1_rx);
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108
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109 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx);
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110
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111 /* DMA interrupt init */
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112 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 0, 0);
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113 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
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114 }
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115
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116
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117 void GNSS_IO_init() {
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118
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119 GPIO_InitTypeDef GPIO_InitStruct = { 0 };
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120 /* Peripheral clock enable */
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121 __HAL_RCC_USART6_CLK_ENABLE()
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122 ;
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123
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124 __HAL_RCC_GPIOA_CLK_ENABLE()
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125 ;
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126 /**USART6 GPIO Configuration
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127 PA11 ------> USART6_TX
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128 PA12 ------> USART6_RX
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129 */
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130 GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
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131 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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132 GPIO_InitStruct.Pull = GPIO_NOPULL;
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133 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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134 GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
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135 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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136
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137 /* USART6 DMA Init */
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138 /* USART6_RX Init */
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139 hdma_usart6_rx.Instance = DMA2_Stream2;
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140 hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5;
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141 hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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142 hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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143 hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE;
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144 hdma_usart6_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE;
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145 hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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146 hdma_usart6_rx.Init.Mode = DMA_NORMAL;
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147 hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW;
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148 hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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149 HAL_DMA_Init(&hdma_usart6_rx);
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150
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151 __HAL_LINKDMA(&huart6, hdmarx, hdma_usart6_rx);
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152
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153 /* USART6_TX Init */
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154 hdma_usart6_tx.Instance = DMA2_Stream6;
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155 hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5;
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156 hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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157 hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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158 hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE;
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159 hdma_usart6_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE;
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160 hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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161 hdma_usart6_tx.Init.Mode = DMA_NORMAL;
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162 hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW;
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163 hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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164 HAL_DMA_Init(&hdma_usart6_tx);
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165
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166 __HAL_LINKDMA(&huart6, hdmatx, hdma_usart6_tx);
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167
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168 /* USART6 interrupt Init */
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169 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0);
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170 HAL_NVIC_EnableIRQ(USART6_IRQn);
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171
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172 MX_USART6_DMA_Init();
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173
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174 }
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175
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176 void MX_USART6_DMA_Init() {
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177 /* DMA controller clock enable */
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178 __HAL_RCC_DMA2_CLK_ENABLE();
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179
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180 /* DMA interrupt init */
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181 /* DMA2_Stream2_IRQn interrupt configuration */
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182 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
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183 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
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184 /* DMA2_Stream6_IRQn interrupt configuration */
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185 HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0);
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186 HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
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187 }
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188
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189
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190 void MX_USART6_UART_DeInit(void)
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191 {
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192 HAL_DMA_Abort(&hdma_usart6_rx);
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193 HAL_DMA_DeInit(&hdma_usart6_rx);
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194 HAL_DMA_Abort(&hdma_usart6_tx);
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195 HAL_DMA_DeInit(&hdma_usart6_tx);
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196 HAL_UART_DeInit(&huart6);
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197 HAL_UART_DeInit(&huart6);
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198 }
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199
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200 void MX_USART6_UART_Init(void) {
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201 huart6.Instance = USART6;
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202 huart6.Init.BaudRate = 9600;
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203 huart6.Init.WordLength = UART_WORDLENGTH_8B;
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204 huart6.Init.StopBits = UART_STOPBITS_1;
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205 huart6.Init.Parity = UART_PARITY_NONE;
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206 huart6.Init.Mode = UART_MODE_TX_RX;
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207 huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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208 huart6.Init.OverSampling = UART_OVERSAMPLING_16;
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209 HAL_UART_Init(&huart6);
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210 }
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211
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212 void UART_MUX_SelectAddress(uint8_t muxAddress)
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213 {
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214 uint8_t indexstr[4];
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215
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216 if(muxAddress <= MAX_MUX_CHANNEL)
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217 {
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218 indexstr[0] = '~';
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219 indexstr[1] = muxAddress;
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220 indexstr[2] = 0x0D;
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221 indexstr[3] = 0x0A;
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222
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223 HAL_UART_Transmit(&huart1,indexstr,4,10);
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224 }
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225 }
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226
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227
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228 void UART_SendCmdString(uint8_t *cmdString)
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229 {
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230 uint8_t cmdLength = strlen((char*)cmdString);
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231
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232 if(cmdLength < 20) /* A longer string is an indication for a missing 0 termination */
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233 {
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234 if(dmaActive == 0)
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235 {
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236 UART_StartDMA_Receiption();
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237 }
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238 HAL_UART_Transmit(&huart1,cmdString,cmdLength,10);
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239 }
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240 }
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241
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242
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243 void StringToInt(char *pstr, uint32_t *puInt32)
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244 {
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245 uint8_t index = 0;
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246 uint32_t result = 0;
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247 while((pstr[index] >= '0') && (pstr[index] <= '9'))
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248 {
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249 result *=10;
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250 result += pstr[index] - '0';
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251 index++;
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252 }
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253 *puInt32 = result;
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254 }
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255
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256 void StringToUInt64(char *pstr, uint64_t *puint64)
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257 {
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258 uint8_t index = 0;
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259 uint64_t result = 0;
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260 while((pstr[index] >= '0') && (pstr[index] <= '9'))
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261 {
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262 result *=10;
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263 result += pstr[index] - '0';
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264 index++;
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265 }
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266 *puint64 = result;
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267 }
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268
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269 void UART_StartDMA_Receiption()
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270 {
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271 if(dmaActive == 0)
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272 {
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273 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE))
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274 {
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275 dmaActive = 1;
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276 }
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277 }
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278 }
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279
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280 void UART_ChangeBaudrate(uint32_t newBaudrate)
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281 {
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282 uint8_t dmaWasActive = dmaActive;
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283 // HAL_DMA_Abort(&hdma_usart1_rx);
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284 MX_USART1_UART_DeInit();
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285 //HAL_UART_Abort(&huart1);
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286 //HAL_DMA_DeInit(&hdma_usart1_rx);
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287
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288
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289 // huart1.Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq()/2, newBaudrate);
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290 huart1.Init.BaudRate = newBaudrate;
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291 HAL_UART_Init(&huart1);
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292 MX_USART1_DMA_Init();
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9602a7338f28 DevBugfix CO2 sensor in streaming mode:
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293 if(dmaWasActive)
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294 {
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295 memset(rxBuffer,BUFFER_NODATA,sizeof(rxBuffer));
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296 rxReadIndex = 0;
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297 rxWriteIndex = 0;
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298 dmaActive = 0;
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299 UART_StartDMA_Receiption();
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300 }
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301 }
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302
662
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303 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
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304 {
662
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305 if(huart == &huart1)
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306 {
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307 dmaActive = 0;
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308 rxWriteIndex+=CHUNK_SIZE;
1b995079c045 PSCR Mode
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309 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
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310 {
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311 rxWriteIndex = 0;
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312 }
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aeb72882f30a Dev Bugfx Empty buffer indication and stability improvments:
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313 if((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE) || (rxWriteIndex == rxReadIndex)) /* start next transfer if we did not catch up with read index */
662
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314 {
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315 UART_StartDMA_Receiption();
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316 }
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317 }
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318 }
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319
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320 void UART_ReadData(uint8_t sensorType)
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321 {
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322 uint8_t localRX = rxReadIndex;
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323
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324 while((rxBuffer[localRX]!=BUFFER_NODATA))
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325 {
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326 switch (sensorType)
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327 {
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328 case SENSOR_MUX:
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329 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]);
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330 break;
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e9eba334b942 Migrated CO2 protocol implementation to new format:
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331 #ifdef ENABLE_CO2_SUPPORT
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332 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]);
794
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333 break;
798
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334 #endif
842
c3dd461ca3f9 Migrated Sentinel protocol to new UART structure:
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335 #ifdef ENABLE_SENTINEL_MODE
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336 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]);
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337 break;
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338 #endif
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339 default:
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340 break;
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341 }
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342
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343 rxBuffer[localRX] = BUFFER_NODATA;
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344 localRX++;
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345 rxReadIndex++;
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346 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
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347 {
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348 localRX = 0;
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349 rxReadIndex = 0;
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350 }
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351 }
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352 }
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353
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354 void UART_FlushRxBuffer(void)
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355 {
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356 while(rxBuffer[rxReadIndex] != BUFFER_NODATA)
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357 {
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358 rxBuffer[rxReadIndex] = BUFFER_NODATA;
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359 rxReadIndex++;
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360 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
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361 {
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362 rxReadIndex = 0;
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363 }
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364 }
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365 }
662
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366
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367 uint8_t UART_isComActive(uint8_t sensorId)
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368 {
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369 uint8_t active = 1;
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370
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371 uint8_t ComState = externalInterface_GetSensorState(sensorId + EXT_INTERFACE_MUX_OFFSET);
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372
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373 if((ComState == UART_COMMON_INIT) || (ComState == UART_COMMON_IDLE) || (ComState == UART_COMMON_ERROR))
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374 {
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375 active = 0;
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376 }
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377 return active;
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378 }
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379
38
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380 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/