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annotate Small_CPU/Src/uart.c @ 1077:bd8ab302ef4a Icon_Integration
Added uart support for HUD:
the protocol implementation for the HUD has been added. It may be activated by the compile switch ENABLE_HUD_SUPPORT. Because the HUD will not mapped to the three classic o2 value display slots, the sensor data structure has been increased to the max number of devices => all devices may now raise device specific data.
| author | Ideenmodellierer |
|---|---|
| date | Mon, 02 Mar 2026 17:22:25 +0100 |
| parents | 1f2067cad41b |
| children |
| rev | line source |
|---|---|
| 38 | 1 /** |
| 2 ****************************************************************************** | |
| 3 * @file uart.c | |
| 4 * @author heinrichs weikamp gmbh | |
| 5 * @version V0.0.1 | |
| 6 * @date 27-March-2014 | |
| 7 * @brief button control | |
| 8 * | |
| 9 @verbatim | |
| 10 ============================================================================== | |
| 11 ##### How to use ##### | |
| 12 ============================================================================== | |
| 13 @endverbatim | |
| 14 ****************************************************************************** | |
| 15 * @attention | |
| 16 * | |
| 17 * <h2><center>© COPYRIGHT(c) 2015 heinrichs weikamp</center></h2> | |
| 18 * | |
| 19 ****************************************************************************** | |
| 20 */ | |
| 21 /* Includes ------------------------------------------------------------------*/ | |
| 22 #include "uart.h" | |
| 794 | 23 #include "uartProtocol_O2.h" |
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24 #include "uartProtocol_Co2.h" |
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25 #include "uartProtocol_Sentinel.h" |
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26 #include "uartProtocol_GNSS.h" |
| 1077 | 27 #include "uartProtocol_HUD.h" |
| 662 | 28 #include "externalInterface.h" |
| 29 #include "data_exchange.h" | |
| 1000 | 30 #include "gpio.h" |
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31 #include <string.h> /* memset */ |
| 38 | 32 |
| 988 | 33 #ifdef ENABLE_GNSS_INTERN |
| 922 | 34 extern UART_HandleTypeDef huart6; |
| 932 | 35 extern sUartComCtrl Uart6Ctrl; |
| 922 | 36 #endif |
| 889 | 37 |
| 38 | 38 /* Private variables ---------------------------------------------------------*/ |
| 39 | |
| 922 | 40 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart1_tx; |
| 38 | 41 |
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42 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
| 936 | 43 uint8_t txBuffer[TX_BUF_SIZE]; /* tx uses less bytes */ |
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44 uint8_t txBufferQue[TX_BUF_SIZE]; /* In MUX mode command may be send shortly after each other => allow q 1 entry que */ |
| 932 | 45 |
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46 |
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47 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */ |
| 932 | 48 |
| 49 sUartComCtrl Uart1Ctrl; | |
| 50 static sUartComCtrl* pGnssCtrl = NULL; | |
| 794 | 51 |
| 921 | 52 static uint32_t LastCmdRequestTick = 0; /* Used by ADC handler to avoid interferance with UART communication */ |
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53 |
| 38 | 54 /* Exported functions --------------------------------------------------------*/ |
| 55 | |
| 932 | 56 |
| 57 void UART_SetGnssCtrl(sUartComCtrl* pTarget) | |
| 58 { | |
| 59 pGnssCtrl = pTarget; | |
| 60 } | |
| 61 | |
| 62 sUartComCtrl* UART_GetGnssCtrl() | |
| 63 { | |
| 64 return pGnssCtrl; | |
| 65 } | |
| 66 | |
| 67 | |
| 68 void UART_clearRxBuffer(sUartComCtrl* pUartCtrl) | |
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69 { |
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70 uint16_t index = 0; |
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71 do |
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72 { |
| 932 | 73 pUartCtrl->pRxBuffer[index++] = BUFFER_NODATA_LOW; |
| 74 pUartCtrl->pRxBuffer[index++] = BUFFER_NODATA_HIGH; | |
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75 } while (index < sizeof(rxBuffer)); |
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76 |
| 932 | 77 pUartCtrl->rxReadIndex = 0; |
| 78 pUartCtrl->rxWriteIndex = 0; | |
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79 } |
| 794 | 80 |
| 662 | 81 void MX_USART1_UART_Init(void) |
| 38 | 82 { |
| 662 | 83 /* regular init */ |
| 84 huart1.Instance = USART1; | |
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85 huart1.Init.BaudRate = 19200; |
| 662 | 86 huart1.Init.WordLength = UART_WORDLENGTH_8B; |
| 87 huart1.Init.StopBits = UART_STOPBITS_1; | |
| 88 huart1.Init.Parity = UART_PARITY_NONE; | |
| 89 huart1.Init.Mode = UART_MODE_TX_RX; | |
| 90 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
| 91 huart1.Init.OverSampling = UART_OVERSAMPLING_16; | |
| 92 | |
| 93 HAL_UART_Init(&huart1); | |
| 94 | |
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95 MX_USART1_DMA_Init(); |
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96 |
| 932 | 97 UART_clearRxBuffer(&Uart1Ctrl); |
| 662 | 98 lastCmdIndex = 0; |
| 932 | 99 |
| 100 Uart1Ctrl.pHandle = &huart1; | |
| 101 Uart1Ctrl.rxWriteIndex = 0; | |
| 102 Uart1Ctrl.rxReadIndex = 0; | |
| 103 Uart1Ctrl.dmaRxActive = 0; | |
| 104 Uart1Ctrl.dmaTxActive = 0; | |
| 105 Uart1Ctrl.pRxBuffer = rxBuffer; | |
| 106 Uart1Ctrl.pTxBuffer = txBuffer; | |
| 107 Uart1Ctrl.txBufferQueLen = 0; | |
| 108 | |
| 988 | 109 #ifndef ENABLE_GNSS_INTERN |
| 110 #ifdef ENABLE_GNSS_EXTERN | |
| 932 | 111 UART_SetGnssCtrl(&Uart1Ctrl); |
| 112 #endif | |
| 988 | 113 #endif |
| 662 | 114 } |
| 38 | 115 |
| 889 | 116 |
| 117 | |
| 662 | 118 void MX_USART1_UART_DeInit(void) |
| 119 { | |
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120 HAL_DMA_Abort(&hdma_usart1_rx); |
| 662 | 121 HAL_DMA_DeInit(&hdma_usart1_rx); |
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122 HAL_DMA_Abort(&hdma_usart1_tx); |
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123 HAL_DMA_DeInit(&hdma_usart1_tx); |
| 662 | 124 HAL_UART_DeInit(&huart1); |
| 932 | 125 Uart1Ctrl.dmaRxActive = 0; |
| 126 Uart1Ctrl.dmaTxActive = 0; | |
| 127 Uart1Ctrl.txBufferQueLen = 0; | |
| 662 | 128 } |
| 129 | |
| 130 void MX_USART1_DMA_Init() | |
| 131 { | |
| 132 /* DMA controller clock enable */ | |
| 133 __DMA2_CLK_ENABLE(); | |
| 134 | |
| 135 /* Peripheral DMA init*/ | |
| 136 hdma_usart1_rx.Instance = DMA2_Stream5; | |
| 137 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; | |
| 138 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH; | |
| 139 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 140 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
| 141 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 142 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 143 hdma_usart1_rx.Init.Mode = DMA_NORMAL; | |
| 144 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; | |
| 145 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 146 HAL_DMA_Init(&hdma_usart1_rx); | |
| 147 | |
| 148 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | |
| 149 | |
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150 hdma_usart1_tx.Instance = DMA2_Stream7; |
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151 hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4; |
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152 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
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153 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; |
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154 hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; |
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155 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
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156 hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
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157 hdma_usart1_tx.Init.Mode = DMA_NORMAL; |
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158 hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; |
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159 hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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160 HAL_DMA_Init(&hdma_usart1_tx); |
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161 |
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162 __HAL_LINKDMA(&huart1,hdmatx,hdma_usart1_tx); |
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163 |
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164 |
| 662 | 165 /* DMA interrupt init */ |
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166 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 2, 2); |
| 662 | 167 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); |
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168 HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 1); |
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169 HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); |
| 38 | 170 } |
| 171 | |
| 932 | 172 void UART_MUX_SelectAddress(uint8_t muxAddress) |
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173 { |
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174 uint8_t indexstr[4]; |
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175 |
| 794 | 176 if(muxAddress <= MAX_MUX_CHANNEL) |
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177 { |
| 794 | 178 indexstr[0] = '~'; |
| 179 indexstr[1] = muxAddress; | |
| 180 indexstr[2] = 0x0D; | |
| 181 indexstr[3] = 0x0A; | |
| 932 | 182 if(!Uart1Ctrl.dmaTxActive) |
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183 { |
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184 memcpy(txBuffer, indexstr, 4); |
| 932 | 185 Uart1Ctrl.dmaTxActive = 0; |
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186 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,4)) |
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187 { |
| 932 | 188 Uart1Ctrl.dmaTxActive = 1; |
| 189 while(Uart1Ctrl.dmaTxActive) | |
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190 { |
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191 HAL_Delay(1); |
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192 } |
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193 } |
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194 } |
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195 else |
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196 { |
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197 memcpy(txBufferQue, indexstr, 4); |
| 932 | 198 Uart1Ctrl.txBufferQueLen = 4; |
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199 } |
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200 } |
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201 } |
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202 |
| 1077 | 203 void UART_SendCmdRaw(const uint8_t *cmd, uint8_t cmdLength) |
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204 { |
| 932 | 205 if(Uart1Ctrl.dmaTxActive == 0) |
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206 { |
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207 if(cmdLength < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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208 { |
| 932 | 209 if(Uart1Ctrl.dmaRxActive == 0) |
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210 { |
| 932 | 211 UART_StartDMA_Receiption(&Uart1Ctrl); |
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212 } |
| 1077 | 213 memcpy(txBuffer, cmd, cmdLength); |
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214 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,cmdLength)) |
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215 { |
| 932 | 216 Uart1Ctrl.dmaTxActive = 1; |
| 921 | 217 LastCmdRequestTick = HAL_GetTick(); |
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218 } |
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219 } |
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220 } |
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221 else |
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222 { |
| 1077 | 223 memcpy(txBufferQue, cmd, cmdLength); |
| 932 | 224 Uart1Ctrl.txBufferQueLen = cmdLength; |
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225 } |
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226 } |
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227 |
| 1077 | 228 void UART_SendCmdString(uint8_t *cmdString) |
| 229 { | |
| 230 uint8_t cmdLength = strlen((char*)cmdString); | |
| 231 | |
| 232 UART_SendCmdRaw(cmdString, cmdLength); | |
| 233 } | |
| 234 | |
| 933 | 235 void UART_AddFletcher(uint8_t* pBuffer, uint8_t length) |
| 236 { | |
| 237 uint8_t ck_A = 0; | |
| 238 uint8_t ck_B = 0; | |
| 239 uint8_t index = 0; | |
| 240 | |
| 241 | |
| 242 pBuffer += 2; /* skip sync chars */ | |
| 243 for(index = 2; index < length; index++) | |
| 244 { | |
| 245 ck_A += *pBuffer++; | |
| 246 ck_B += ck_A; | |
| 247 } | |
| 248 *pBuffer++ = ck_A; | |
| 249 *pBuffer++ = ck_B; | |
| 250 } | |
| 251 | |
| 922 | 252 void UART_SendCmdUbx(const uint8_t *cmd, uint8_t len) |
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253 { |
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254 if(len < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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255 { |
| 932 | 256 if(pGnssCtrl != NULL) |
| 794 | 257 { |
| 932 | 258 if(pGnssCtrl->dmaRxActive == 0) |
| 259 { | |
| 260 UART_StartDMA_Receiption(pGnssCtrl); | |
| 261 } | |
| 262 memcpy(pGnssCtrl->pTxBuffer, cmd, len); | |
| 933 | 263 UART_AddFletcher(pGnssCtrl->pTxBuffer, len); |
| 264 len += 2; | |
| 932 | 265 if(HAL_OK == HAL_UART_Transmit_DMA(pGnssCtrl->pHandle,pGnssCtrl->pTxBuffer,len)) |
| 266 { | |
| 267 pGnssCtrl->dmaTxActive = 1; | |
| 268 LastCmdRequestTick = HAL_GetTick(); | |
| 269 } | |
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270 } |
| 794 | 271 } |
| 272 } | |
| 273 | |
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274 |
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275 void StringToInt(char *pstr, uint32_t *puInt32) |
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276 { |
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277 uint8_t index = 0; |
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278 uint32_t result = 0; |
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279 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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280 { |
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281 result *=10; |
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282 result += pstr[index] - '0'; |
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283 index++; |
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284 } |
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285 *puInt32 = result; |
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286 } |
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287 |
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288 void StringToUInt64(char *pstr, uint64_t *puint64) |
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289 { |
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290 uint8_t index = 0; |
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291 uint64_t result = 0; |
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292 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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293 { |
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294 result *=10; |
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295 result += pstr[index] - '0'; |
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296 index++; |
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297 } |
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298 *puint64 = result; |
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299 } |
| 662 | 300 |
| 932 | 301 void UART_StartDMA_Receiption(sUartComCtrl* pUartCtrl) |
| 742 | 302 { |
| 932 | 303 if(pUartCtrl->dmaRxActive == 0) |
| 742 | 304 { |
| 932 | 305 if(((pUartCtrl->rxWriteIndex / CHUNK_SIZE) != (pUartCtrl->rxReadIndex / CHUNK_SIZE)) || ((UART_isEndIndication(pUartCtrl, pUartCtrl->rxWriteIndex)) && (UART_isEndIndication(pUartCtrl, pUartCtrl->rxWriteIndex + 1)))) /* start next transfer if we did not catch up with read index */ |
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306 { |
| 932 | 307 if(HAL_OK == HAL_UART_Receive_DMA (pUartCtrl->pHandle, &pUartCtrl->pRxBuffer[pUartCtrl->rxWriteIndex], CHUNK_SIZE)) |
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308 { |
| 932 | 309 pUartCtrl->dmaRxActive = 1; |
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310 } |
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311 } |
| 742 | 312 } |
| 313 } | |
| 690 | 314 |
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315 void UART_ChangeBaudrate(uint32_t newBaudrate) |
| 38 | 316 { |
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317 MX_USART1_UART_DeInit(); |
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318 huart1.Init.BaudRate = newBaudrate; |
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319 HAL_UART_Init(&huart1); |
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320 MX_USART1_DMA_Init(); |
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321 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3); |
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322 HAL_NVIC_EnableIRQ(USART1_IRQn); |
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323 |
| 932 | 324 UART_clearRxBuffer(&Uart1Ctrl); |
| 325 Uart1Ctrl.rxReadIndex = 0; | |
| 326 Uart1Ctrl.rxWriteIndex = 0; | |
| 327 Uart1Ctrl.dmaRxActive = 0; | |
| 976 | 328 Uart1Ctrl.dmaTxActive = 0; |
| 932 | 329 Uart1Ctrl.txBufferQueLen = 0; |
| 38 | 330 } |
| 690 | 331 |
| 932 | 332 void UART_HandleRxComplete(sUartComCtrl* pUartCtrl) |
| 333 { | |
| 334 pUartCtrl->dmaRxActive = 0; | |
| 335 pUartCtrl->rxWriteIndex+=CHUNK_SIZE; | |
| 336 if(pUartCtrl->rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
| 337 { | |
| 338 pUartCtrl->rxWriteIndex = 0; | |
| 339 } | |
| 340 UART_StartDMA_Receiption(pUartCtrl); | |
| 341 } | |
| 662 | 342 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) |
| 38 | 343 { |
| 932 | 344 if(huart == &huart1) |
| 345 { | |
| 346 UART_HandleRxComplete(&Uart1Ctrl); | |
| 347 } | |
| 988 | 348 #ifdef ENABLE_GNSS_INTERN |
| 349 if(GPIO_GetVersion() > 0) | |
| 932 | 350 { |
| 988 | 351 if(huart == &huart6) |
| 352 { | |
| 353 UART_HandleRxComplete(&Uart6Ctrl); | |
| 354 } | |
| 932 | 355 } |
| 922 | 356 #endif |
| 38 | 357 } |
| 932 | 358 |
| 359 void UART_HandleTxComplete(sUartComCtrl* pUartCtrl) | |
| 360 { | |
| 361 pUartCtrl->dmaTxActive = 0; | |
| 362 UART_WriteData(pUartCtrl); | |
| 363 if(pUartCtrl->txBufferQueLen) | |
| 364 { | |
| 365 memcpy(pUartCtrl->pTxBuffer, pUartCtrl->pTxQue, pUartCtrl->txBufferQueLen); | |
| 366 HAL_UART_Transmit_DMA(pUartCtrl->pHandle,pUartCtrl->pTxBuffer,pUartCtrl->txBufferQueLen); | |
| 367 pUartCtrl->dmaTxActive = 1; | |
| 368 pUartCtrl->txBufferQueLen = 0; | |
| 369 } | |
| 370 } | |
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371 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) |
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372 { |
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373 if(huart == &huart1) |
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374 { |
| 932 | 375 UART_HandleTxComplete(&Uart1Ctrl); |
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376 } |
| 988 | 377 #ifdef ENABLE_GNSS_INTERN |
| 378 if(GPIO_GetVersion() > 0) | |
| 922 | 379 { |
| 988 | 380 if(huart == &huart6) |
| 381 { | |
| 382 UART_HandleTxComplete(&Uart6Ctrl); | |
| 383 } | |
| 922 | 384 } |
| 385 #endif | |
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386 } |
| 38 | 387 |
| 932 | 388 uint8_t UART_isEndIndication(sUartComCtrl* pCtrl, uint8_t index) |
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389 { |
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390 uint8_t ret = 0; |
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391 if(index % 2) |
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392 { |
| 932 | 393 if(pCtrl->pRxBuffer[index] == BUFFER_NODATA_HIGH) |
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394 { |
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395 ret = 1; |
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396 } |
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397 } |
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398 else |
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399 { |
| 932 | 400 if(pCtrl->pRxBuffer[index] == BUFFER_NODATA_LOW) |
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401 { |
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402 ret = 1; |
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403 } |
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404 } |
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405 |
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406 return ret; |
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407 } |
| 976 | 408 void UART_ReadData(uint8_t sensorType, uint8_t flush) /* flush = 1 skips processing of data => data is discarded */ |
| 794 | 409 { |
| 932 | 410 uint8_t localRX; |
| 411 uint8_t futureIndex; | |
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412 uint8_t moreData = 0; |
| 38 | 413 |
| 932 | 414 sUartComCtrl* pUartCtrl; |
| 415 | |
| 416 if(sensorType == SENSOR_GNSS) | |
| 417 { | |
| 988 | 418 #ifdef ENABLE_GNSS_INTERN |
| 932 | 419 pUartCtrl = &Uart6Ctrl; |
| 420 #else | |
| 988 | 421 #ifdef ENABLE_GNSS_EXTERN |
| 932 | 422 pUartCtrl = &Uart1Ctrl; |
| 423 #endif | |
| 988 | 424 #endif |
| 932 | 425 } |
| 426 else | |
| 427 { | |
| 428 pUartCtrl = &Uart1Ctrl; | |
| 429 } | |
| 430 localRX = pUartCtrl->rxReadIndex; | |
| 431 futureIndex = pUartCtrl->rxReadIndex + 1; | |
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432 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
| 794 | 433 { |
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434 futureIndex = 0; |
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435 } |
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436 |
| 932 | 437 if(!UART_isEndIndication(pUartCtrl, futureIndex)) |
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438 { |
| 932 | 439 moreData = 1; |
| 440 } | |
| 441 | |
| 442 if((!UART_isEndIndication(pUartCtrl, localRX)) || (moreData)) | |
| 443 do | |
| 444 { | |
| 445 while((!UART_isEndIndication(pUartCtrl, localRX)) || (moreData)) | |
| 794 | 446 { |
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447 moreData = 0; |
| 1065 | 448 if(flush == 0) |
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449 { |
| 1065 | 450 switch (sensorType) |
| 451 { | |
| 452 case SENSOR_MUX: | |
| 453 case SENSOR_DIGO2: uartO2_ProcessData(pUartCtrl->pRxBuffer[localRX]); | |
| 454 break; | |
| 455 #ifdef ENABLE_CO2_SUPPORT | |
| 456 case SENSOR_CO2: uartCo2_ProcessData(pUartCtrl->pRxBuffer[localRX]); | |
| 457 break; | |
| 458 #endif | |
| 459 #if defined ENABLE_GNSS_INTERN || defined ENABLE_GNSS_EXTERN | |
| 460 case SENSOR_GNSS: uartGnss_ProcessData(pUartCtrl->pRxBuffer[localRX]); | |
| 461 break; | |
| 462 #endif | |
| 463 #ifdef ENABLE_SENTINEL_MODE | |
| 464 case SENSOR_SENTINEL: uartSentinel_ProcessData(pUartCtrl->pRxBuffer[localRX]); | |
| 465 break; | |
| 466 #endif | |
| 1077 | 467 #ifdef ENABLE_HUD_SUPPORT |
| 468 case SENSOR_HUD: uartHUD_ProcessData(pUartCtrl->pRxBuffer[localRX]); | |
| 469 break; | |
| 470 #endif | |
| 1065 | 471 default: |
| 472 break; | |
| 473 } | |
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474 } |
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475 if(localRX % 2) |
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476 { |
| 932 | 477 pUartCtrl->pRxBuffer[localRX] = BUFFER_NODATA_HIGH; |
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478 } |
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479 else |
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480 { |
| 932 | 481 pUartCtrl->pRxBuffer[localRX] = BUFFER_NODATA_LOW; |
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482 } |
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483 |
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484 localRX++; |
| 932 | 485 pUartCtrl->rxReadIndex++; |
| 486 if(pUartCtrl->rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
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487 { |
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488 localRX = 0; |
| 932 | 489 pUartCtrl->rxReadIndex = 0; |
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490 } |
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491 futureIndex++; |
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492 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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493 { |
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494 futureIndex = 0; |
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495 } |
| 794 | 496 } |
| 932 | 497 if(!UART_isEndIndication(pUartCtrl, futureIndex)) |
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498 { |
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499 moreData = 1; |
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500 } |
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501 } while(moreData); |
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502 } |
| 794 | 503 |
| 932 | 504 void UART_WriteData(sUartComCtrl* pUartCtrl) |
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505 { |
| 932 | 506 if(pUartCtrl->pHandle->hdmatx->State == HAL_DMA_STATE_READY) |
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External sensor UART: Switch to DMA TX transfers:
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parents:
894
diff
changeset
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507 { |
| 932 | 508 pUartCtrl->pHandle->gState = HAL_UART_STATE_READY; |
| 509 pUartCtrl->dmaTxActive = 0; | |
| 794 | 510 } |
| 932 | 511 if(pUartCtrl->pHandle->hdmarx->State == HAL_DMA_STATE_READY) |
|
918
f72613a152dd
Switch external interface tx communication to DMA:
Ideenmodellierer
parents:
916
diff
changeset
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512 { |
| 932 | 513 pUartCtrl->pHandle->RxState = HAL_UART_STATE_READY; |
| 514 pUartCtrl->dmaRxActive = 0; | |
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918
f72613a152dd
Switch external interface tx communication to DMA:
Ideenmodellierer
parents:
916
diff
changeset
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515 } |
| 794 | 516 } |
| 517 | |
| 861 | 518 uint8_t UART_isComActive(uint8_t sensorId) |
| 519 { | |
| 520 uint8_t active = 1; | |
| 809 | 521 |
| 921 | 522 if(time_elapsed_ms(LastCmdRequestTick, HAL_GetTick()) > 300) /* UART activity should be inactive 300ms after last command */ |
| 861 | 523 { |
| 524 active = 0; | |
| 525 } | |
| 526 return active; | |
| 527 } | |
| 809 | 528 |
| 921 | 529 |
| 38 | 530 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |