Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c @ 264:b3685fbada3b IPC_Sync_Improvment_2
Sync to Main 100ms time stamp & added Reinitialization of globals after startup
Added function to synchronize RTE to the timestamp provided by Main 100ms callback. This was introduced to compensated small shifts in execution and program flow shifts (for example during long operation times)
author | ideenmodellierer |
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date | Sun, 14 Apr 2019 11:43:29 +0200 |
parents | c78bcbd5deda |
children | 4e10a3e087a1 |
rev | line source |
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_rcc.c |
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4 * @author MCD Application Team |
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5 * @brief RCC HAL module driver. |
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6 * This file provides firmware functions to manage the following |
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7 * functionalities of the Reset and Clock Control (RCC) peripheral: |
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8 * + Initialization and de-initialization functions |
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9 * + Peripheral Control functions |
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10 * |
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11 @verbatim |
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12 ============================================================================== |
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13 ##### RCC specific features ##### |
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14 ============================================================================== |
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15 [..] |
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16 After reset the device is running from Internal High Speed oscillator |
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17 (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache |
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18 and I-Cache are disabled, and all peripherals are off except internal |
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19 SRAM, Flash and JTAG. |
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20 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses; |
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21 all peripherals mapped on these busses are running at HSI speed. |
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22 (+) The clock for all peripherals is switched off, except the SRAM and FLASH. |
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23 (+) All GPIOs are in input floating state, except the JTAG pins which |
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24 are assigned to be used for debug purpose. |
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25 |
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26 [..] |
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27 Once the device started from reset, the user application has to: |
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28 (+) Configure the clock source to be used to drive the System clock |
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29 (if the application needs higher frequency/performance) |
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30 (+) Configure the System clock frequency and Flash settings |
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31 (+) Configure the AHB and APB busses prescalers |
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32 (+) Enable the clock for the peripheral(s) to be used |
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33 (+) Configure the clock source(s) for peripherals which clocks are not |
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34 derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG) |
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35 |
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36 ##### RCC Limitations ##### |
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37 ============================================================================== |
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38 [..] |
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39 A delay between an RCC peripheral clock enable and the effective peripheral |
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40 enabling should be taken into account in order to manage the peripheral read/write |
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41 from/to registers. |
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42 (+) This delay depends on the peripheral mapping. |
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43 (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle |
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44 after the clock enable bit is set on the hardware register |
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45 (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle |
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46 after the clock enable bit is set on the hardware register |
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47 |
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48 [..] |
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49 Implemented Workaround: |
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50 (+) For AHB & APB peripherals, a dummy read to the peripheral register has been |
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51 inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. |
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52 |
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53 @endverbatim |
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54 ****************************************************************************** |
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55 * @attention |
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56 * |
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57 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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58 * |
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59 * Redistribution and use in source and binary forms, with or without modification, |
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60 * are permitted provided that the following conditions are met: |
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61 * 1. Redistributions of source code must retain the above copyright notice, |
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62 * this list of conditions and the following disclaimer. |
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63 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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64 * this list of conditions and the following disclaimer in the documentation |
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65 * and/or other materials provided with the distribution. |
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66 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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67 * may be used to endorse or promote products derived from this software |
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68 * without specific prior written permission. |
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69 * |
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70 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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71 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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72 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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73 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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74 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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75 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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76 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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77 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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78 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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79 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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80 * |
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81 ****************************************************************************** |
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82 */ |
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83 |
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84 /* Includes ------------------------------------------------------------------*/ |
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85 #include "stm32f4xx_hal.h" |
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86 |
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87 /** @addtogroup STM32F4xx_HAL_Driver |
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88 * @{ |
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89 */ |
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90 |
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91 /** @defgroup RCC RCC |
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92 * @brief RCC HAL module driver |
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93 * @{ |
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94 */ |
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95 |
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96 #ifdef HAL_RCC_MODULE_ENABLED |
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97 |
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98 /* Private typedef -----------------------------------------------------------*/ |
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99 /* Private define ------------------------------------------------------------*/ |
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100 /** @addtogroup RCC_Private_Constants |
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101 * @{ |
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102 */ |
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103 |
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104 /* Private macro -------------------------------------------------------------*/ |
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105 #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() |
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106 #define MCO1_GPIO_PORT GPIOA |
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107 #define MCO1_PIN GPIO_PIN_8 |
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108 |
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109 #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() |
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110 #define MCO2_GPIO_PORT GPIOC |
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111 #define MCO2_PIN GPIO_PIN_9 |
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112 /** |
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113 * @} |
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114 */ |
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115 |
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116 /* Private variables ---------------------------------------------------------*/ |
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117 /** @defgroup RCC_Private_Variables RCC Private Variables |
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118 * @{ |
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119 */ |
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120 /** |
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121 * @} |
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122 */ |
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123 /* Private function prototypes -----------------------------------------------*/ |
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124 /* Private functions ---------------------------------------------------------*/ |
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125 |
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126 /** @defgroup RCC_Exported_Functions RCC Exported Functions |
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127 * @{ |
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128 */ |
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129 |
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130 /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions |
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131 * @brief Initialization and Configuration functions |
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132 * |
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133 @verbatim |
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134 =============================================================================== |
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135 ##### Initialization and de-initialization functions ##### |
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136 =============================================================================== |
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137 [..] |
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138 This section provides functions allowing to configure the internal/external oscillators |
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139 (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 |
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140 and APB2). |
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141 |
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142 [..] Internal/external clock and PLL configuration |
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143 (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through |
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144 the PLL as System clock source. |
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145 |
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146 (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC |
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147 clock source. |
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148 |
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149 (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or |
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150 through the PLL as System clock source. Can be used also as RTC clock source. |
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151 |
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152 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. |
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153 |
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154 (#) PLL (clocked by HSI or HSE), featuring two different output clocks: |
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155 (++) The first output is used to generate the high speed system clock (up to 168 MHz) |
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156 (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), |
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157 the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz). |
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158 |
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159 (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() |
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160 and if a HSE clock failure occurs(HSE used directly or through PLL as System |
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161 clock source), the System clocks automatically switched to HSI and an interrupt |
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162 is generated if enabled. The interrupt is linked to the Cortex-M4 NMI |
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163 (Non-Maskable Interrupt) exception vector. |
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164 |
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165 (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL |
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166 clock (through a configurable prescaler) on PA8 pin. |
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167 |
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168 (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S |
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169 clock (through a configurable prescaler) on PC9 pin. |
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170 |
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171 [..] System, AHB and APB busses clocks configuration |
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172 (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, |
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173 HSE and PLL. |
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174 The AHB clock (HCLK) is derived from System clock through configurable |
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175 prescaler and used to clock the CPU, memory and peripherals mapped |
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176 on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived |
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177 from AHB clock through configurable prescalers and used to clock |
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178 the peripherals mapped on these busses. You can use |
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179 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. |
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180 |
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181 (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum |
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182 frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz. |
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183 Depending on the device voltage range, the maximum frequency should |
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184 be adapted accordingly (refer to the product datasheets for more details). |
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185 |
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186 (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices, |
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187 the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz. |
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188 Depending on the device voltage range, the maximum frequency should |
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189 be adapted accordingly (refer to the product datasheets for more details). |
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190 |
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191 (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz, |
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192 PCLK2 84 MHz and PCLK1 42 MHz. |
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193 Depending on the device voltage range, the maximum frequency should |
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194 be adapted accordingly (refer to the product datasheets for more details). |
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195 |
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196 (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz, |
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197 PCLK2 100 MHz and PCLK1 50 MHz. |
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198 Depending on the device voltage range, the maximum frequency should |
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199 be adapted accordingly (refer to the product datasheets for more details). |
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200 |
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201 @endverbatim |
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202 * @{ |
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203 */ |
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204 |
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205 /** |
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206 * @brief Resets the RCC clock configuration to the default reset state. |
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207 * @note The default reset state of the clock configuration is given below: |
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208 * - HSI ON and used as system clock source |
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209 * - HSE and PLL OFF |
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210 * - AHB, APB1 and APB2 prescaler set to 1. |
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211 * - CSS, MCO1 and MCO2 OFF |
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212 * - All interrupts disabled |
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213 * @note This function doesn't modify the configuration of the |
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214 * - Peripheral clocks |
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215 * - LSI, LSE and RTC clocks |
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216 * @retval HAL status |
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217 */ |
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218 __weak HAL_StatusTypeDef HAL_RCC_DeInit(void) |
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219 { |
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220 return HAL_OK; |
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221 } |
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222 |
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223 /** |
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224 * @brief Initializes the RCC Oscillators according to the specified parameters in the |
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225 * RCC_OscInitTypeDef. |
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226 * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that |
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227 * contains the configuration information for the RCC Oscillators. |
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228 * @note The PLL is not disabled when used as system clock. |
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229 * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not |
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230 * supported by this API. User should request a transition to LSE Off |
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231 * first and then LSE On or LSE Bypass. |
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232 * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not |
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233 * supported by this API. User should request a transition to HSE Off |
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234 * first and then HSE On or HSE Bypass. |
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235 * @retval HAL status |
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236 */ |
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237 __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) |
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238 { |
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239 uint32_t tickstart; |
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240 |
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241 /* Check Null pointer */ |
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242 if(RCC_OscInitStruct == NULL) |
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243 { |
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244 return HAL_ERROR; |
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245 } |
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246 |
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247 /* Check the parameters */ |
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248 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); |
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249 /*------------------------------- HSE Configuration ------------------------*/ |
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250 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) |
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251 { |
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252 /* Check the parameters */ |
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253 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); |
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254 /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ |
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255 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ |
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256 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) |
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257 { |
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258 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) |
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259 { |
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260 return HAL_ERROR; |
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261 } |
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262 } |
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263 else |
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264 { |
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265 /* Set the new HSE configuration ---------------------------------------*/ |
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266 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); |
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267 |
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268 /* Check the HSE State */ |
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269 if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) |
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270 { |
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271 /* Get Start Tick */ |
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272 tickstart = HAL_GetTick(); |
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273 |
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274 /* Wait till HSE is ready */ |
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275 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
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276 { |
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277 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) |
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278 { |
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279 return HAL_TIMEOUT; |
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280 } |
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281 } |
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282 } |
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283 else |
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284 { |
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285 /* Get Start Tick */ |
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286 tickstart = HAL_GetTick(); |
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287 |
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288 /* Wait till HSE is bypassed or disabled */ |
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289 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) |
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290 { |
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291 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) |
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292 { |
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293 return HAL_TIMEOUT; |
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294 } |
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295 } |
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296 } |
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297 } |
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298 } |
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299 /*----------------------------- HSI Configuration --------------------------*/ |
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300 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) |
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301 { |
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302 /* Check the parameters */ |
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303 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); |
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304 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); |
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305 |
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306 /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ |
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307 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ |
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308 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) |
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309 { |
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310 /* When HSI is used as system clock it will not disabled */ |
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311 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) |
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312 { |
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313 return HAL_ERROR; |
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314 } |
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315 /* Otherwise, just the calibration is allowed */ |
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316 else |
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317 { |
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318 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ |
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319 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); |
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320 } |
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321 } |
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322 else |
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323 { |
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324 /* Check the HSI State */ |
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325 if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) |
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326 { |
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327 /* Enable the Internal High Speed oscillator (HSI). */ |
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328 __HAL_RCC_HSI_ENABLE(); |
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329 |
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330 /* Get Start Tick*/ |
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331 tickstart = HAL_GetTick(); |
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332 |
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333 /* Wait till HSI is ready */ |
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334 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) |
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335 { |
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336 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) |
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337 { |
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338 return HAL_TIMEOUT; |
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339 } |
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340 } |
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341 |
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342 /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ |
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343 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); |
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344 } |
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345 else |
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346 { |
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347 /* Disable the Internal High Speed oscillator (HSI). */ |
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348 __HAL_RCC_HSI_DISABLE(); |
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349 |
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350 /* Get Start Tick*/ |
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351 tickstart = HAL_GetTick(); |
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352 |
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353 /* Wait till HSI is ready */ |
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354 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) |
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355 { |
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356 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) |
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357 { |
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358 return HAL_TIMEOUT; |
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359 } |
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360 } |
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361 } |
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362 } |
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363 } |
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364 /*------------------------------ LSI Configuration -------------------------*/ |
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365 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) |
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366 { |
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367 /* Check the parameters */ |
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368 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); |
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369 |
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370 /* Check the LSI State */ |
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371 if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) |
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372 { |
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373 /* Enable the Internal Low Speed oscillator (LSI). */ |
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374 __HAL_RCC_LSI_ENABLE(); |
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375 |
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376 /* Get Start Tick*/ |
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377 tickstart = HAL_GetTick(); |
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|
378 |
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379 /* Wait till LSI is ready */ |
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380 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) |
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381 { |
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382 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) |
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|
383 { |
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384 return HAL_TIMEOUT; |
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|
385 } |
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|
386 } |
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|
387 } |
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|
388 else |
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|
389 { |
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|
390 /* Disable the Internal Low Speed oscillator (LSI). */ |
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391 __HAL_RCC_LSI_DISABLE(); |
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|
392 |
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|
393 /* Get Start Tick */ |
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394 tickstart = HAL_GetTick(); |
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|
395 |
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396 /* Wait till LSI is ready */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
397 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
398 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
399 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
400 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
401 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
402 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
403 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
404 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
405 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
406 /*------------------------------ LSE Configuration -------------------------*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
407 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
408 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
409 FlagStatus pwrclkchanged = RESET; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
410 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
411 /* Check the parameters */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
412 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
413 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
414 /* Update LSE configuration in Backup Domain control register */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
415 /* Requires to enable write access to Backup Domain of necessary */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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416 if(__HAL_RCC_PWR_IS_CLK_DISABLED()) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
417 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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418 __HAL_RCC_PWR_CLK_ENABLE(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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419 pwrclkchanged = SET; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
420 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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changeset
|
421 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
422 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
423 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
424 /* Enable write access to Backup domain */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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425 SET_BIT(PWR->CR, PWR_CR_DBP); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
426 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
427 /* Wait for Backup domain Write protection disable */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
428 tickstart = HAL_GetTick(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
429 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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430 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
431 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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432 if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
433 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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434 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
435 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
436 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
437 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
438 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
439 /* Set the new LSE configuration -----------------------------------------*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
440 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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changeset
|
441 /* Check the LSE State */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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442 if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
443 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
444 /* Get Start Tick*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
445 tickstart = HAL_GetTick(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
446 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
447 /* Wait till LSE is ready */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
448 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
449 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
450 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
451 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
452 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
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|
453 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
454 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
455 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
456 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
457 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
458 /* Get Start Tick */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
459 tickstart = HAL_GetTick(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
460 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
461 /* Wait till LSE is ready */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
462 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
463 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
464 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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changeset
|
465 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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|
466 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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|
467 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
468 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
469 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
470 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
471 /* Restore clock configuration if changed */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
472 if(pwrclkchanged == SET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
473 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
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changeset
|
474 __HAL_RCC_PWR_CLK_DISABLE(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
475 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
476 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
477 /*-------------------------------- PLL Configuration -----------------------*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
478 /* Check the parameters */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
479 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
480 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
481 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
482 /* Check if the PLL is used as system clock or not */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
483 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
484 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
485 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
486 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
487 /* Check the parameters */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
488 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
489 assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
490 assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
491 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
492 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
493 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
494 /* Disable the main PLL. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
495 __HAL_RCC_PLL_DISABLE(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
496 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
497 /* Get Start Tick */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
498 tickstart = HAL_GetTick(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
499 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
500 /* Wait till PLL is ready */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
501 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
502 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
503 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
504 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
505 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
506 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
507 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
508 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
509 /* Configure the main PLL clock source, multiplication and division factors. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
510 WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
511 RCC_OscInitStruct->PLL.PLLM | \ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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|
512 (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
513 (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
514 (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
515 /* Enable the main PLL. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
516 __HAL_RCC_PLL_ENABLE(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
517 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
518 /* Get Start Tick */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
519 tickstart = HAL_GetTick(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
520 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
521 /* Wait till PLL is ready */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
changeset
|
522 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
523 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
524 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
525 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
526 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
527 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
528 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
529 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
530 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
531 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
532 /* Disable the main PLL. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
533 __HAL_RCC_PLL_DISABLE(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
534 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
535 /* Get Start Tick */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
536 tickstart = HAL_GetTick(); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
537 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
538 /* Wait till PLL is ready */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
539 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
540 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
541 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
542 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
543 return HAL_TIMEOUT; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
544 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
545 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
546 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
547 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
548 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
549 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
550 return HAL_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
551 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
552 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
553 return HAL_OK; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
554 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
555 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
556 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
557 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
558 * parameters in the RCC_ClkInitStruct. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
559 * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
560 * contains the configuration information for the RCC peripheral. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
561 * @param FLatency FLASH Latency, this parameter depend on device selected |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
562 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
563 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
564 * and updated by HAL_RCC_GetHCLKFreq() function called within this function |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
565 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
566 * @note The HSI is used (enabled by hardware) as system clock source after |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
567 * startup from Reset, wake-up from STOP and STANDBY mode, or in case |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
568 * of failure of the HSE used directly or indirectly as system clock |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
569 * (if the Clock Security System CSS is enabled). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
570 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
571 * @note A switch from one clock source to another occurs only if the target |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
572 * clock source is ready (clock stable after startup delay or PLL locked). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
573 * If a clock source which is not yet ready is selected, the switch will |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
574 * occur when the clock source will be ready. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
575 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
576 * @note Depending on the device voltage range, the software has to set correctly |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
577 * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
578 * (for more details refer to section above "Initialization/de-initialization functions") |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
579 * @retval None |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
580 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
581 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
582 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
583 uint32_t tickstart; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
584 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
585 /* Check Null pointer */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
586 if(RCC_ClkInitStruct == NULL) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
587 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
588 return HAL_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
589 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
590 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
591 /* Check the parameters */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
592 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
593 assert_param(IS_FLASH_LATENCY(FLatency)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
594 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
595 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
596 must be correctly programmed according to the frequency of the CPU clock |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
597 (HCLK) and the supply voltage of the device. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
598 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
599 /* Increasing the number of wait states because of higher CPU frequency */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
600 if(FLatency > __HAL_FLASH_GET_LATENCY()) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
601 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
602 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
603 __HAL_FLASH_SET_LATENCY(FLatency); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
604 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
605 /* Check that the new number of wait states is taken into account to access the Flash |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
606 memory by reading the FLASH_ACR register */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
607 if(__HAL_FLASH_GET_LATENCY() != FLatency) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
608 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
609 return HAL_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
610 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
611 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
612 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
613 /*-------------------------- HCLK Configuration --------------------------*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
614 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
615 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
616 /* Set the highest APBx dividers in order to ensure that we do not go through |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
617 a non-spec phase whatever we decrease or increase HCLK. */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
618 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
619 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
620 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
621 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
622 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
623 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
624 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
625 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
626 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
627 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
628 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
629 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
630 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
631 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
632 /*------------------------- SYSCLK Configuration ---------------------------*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
633 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
634 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
635 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
636 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
637 /* HSE is selected as System Clock Source */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
638 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
639 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
640 /* Check the HSE ready flag */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
641 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
642 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
643 return HAL_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
644 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
645 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
646 /* PLL is selected as System Clock Source */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
647 else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
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parents:
diff
changeset
|
648 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
649 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
650 /* Check the PLL ready flag */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
651 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
652 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
653 return HAL_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
654 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
655 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
656 /* HSI is selected as System Clock Source */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
657 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
658 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
659 /* Check the HSI ready flag */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
660 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
661 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
662 return HAL_ERROR; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
663 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
664 } |
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665 |
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666 __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); |
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667 |
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668 /* Get Start Tick */ |
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669 tickstart = HAL_GetTick(); |
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670 |
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671 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) |
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672 { |
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673 if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) |
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674 { |
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675 return HAL_TIMEOUT; |
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676 } |
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677 } |
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678 } |
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679 |
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680 /* Decreasing the number of wait states because of lower CPU frequency */ |
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681 if(FLatency < __HAL_FLASH_GET_LATENCY()) |
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682 { |
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683 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ |
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684 __HAL_FLASH_SET_LATENCY(FLatency); |
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685 |
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686 /* Check that the new number of wait states is taken into account to access the Flash |
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687 memory by reading the FLASH_ACR register */ |
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688 if(__HAL_FLASH_GET_LATENCY() != FLatency) |
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689 { |
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690 return HAL_ERROR; |
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691 } |
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692 } |
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693 |
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694 /*-------------------------- PCLK1 Configuration ---------------------------*/ |
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695 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) |
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696 { |
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697 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); |
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698 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); |
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699 } |
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700 |
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701 /*-------------------------- PCLK2 Configuration ---------------------------*/ |
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702 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) |
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703 { |
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704 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); |
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705 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); |
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706 } |
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|
707 |
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|
708 /* Update the SystemCoreClock global variable */ |
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709 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; |
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710 |
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711 /* Configure the source of time base considering new system clocks settings */ |
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712 HAL_InitTick (TICK_INT_PRIORITY); |
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713 |
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714 return HAL_OK; |
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715 } |
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716 |
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717 /** |
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718 * @} |
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719 */ |
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720 |
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721 /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions |
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722 * @brief RCC clocks control functions |
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723 * |
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724 @verbatim |
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725 =============================================================================== |
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726 ##### Peripheral Control functions ##### |
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727 =============================================================================== |
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728 [..] |
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729 This subsection provides a set of functions allowing to control the RCC Clocks |
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730 frequencies. |
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731 |
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732 @endverbatim |
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733 * @{ |
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734 */ |
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735 |
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736 /** |
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737 * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9). |
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738 * @note PA8/PC9 should be configured in alternate function mode. |
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739 * @param RCC_MCOx specifies the output direction for the clock source. |
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740 * This parameter can be one of the following values: |
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741 * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8). |
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742 * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9). |
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743 * @param RCC_MCOSource specifies the clock source to output. |
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744 * This parameter can be one of the following values: |
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745 * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source |
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746 * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source |
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747 * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source |
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748 * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source |
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749 * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source |
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750 * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for all STM32F4 devices except STM32F410xx |
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751 * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for STM32F410Rx devices |
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752 * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source |
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753 * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source |
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754 * @param RCC_MCODiv specifies the MCOx prescaler. |
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755 * This parameter can be one of the following values: |
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756 * @arg RCC_MCODIV_1: no division applied to MCOx clock |
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757 * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock |
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758 * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock |
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759 * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock |
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760 * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock |
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761 * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have |
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762 * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5). |
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763 * @retval None |
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764 */ |
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765 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) |
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766 { |
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767 GPIO_InitTypeDef GPIO_InitStruct; |
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768 /* Check the parameters */ |
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769 assert_param(IS_RCC_MCO(RCC_MCOx)); |
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770 assert_param(IS_RCC_MCODIV(RCC_MCODiv)); |
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771 /* RCC_MCO1 */ |
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772 if(RCC_MCOx == RCC_MCO1) |
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773 { |
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774 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); |
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775 |
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776 /* MCO1 Clock Enable */ |
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777 __MCO1_CLK_ENABLE(); |
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778 |
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779 /* Configure the MCO1 pin in alternate function mode */ |
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780 GPIO_InitStruct.Pin = MCO1_PIN; |
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781 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
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782 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; |
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783 GPIO_InitStruct.Pull = GPIO_NOPULL; |
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784 GPIO_InitStruct.Alternate = GPIO_AF0_MCO; |
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785 HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); |
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786 |
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787 /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */ |
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788 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv)); |
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789 |
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790 /* This RCC MCO1 enable feature is available only on STM32F410xx devices */ |
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791 #if defined(RCC_CFGR_MCO1EN) |
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792 __HAL_RCC_MCO1_ENABLE(); |
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793 #endif /* RCC_CFGR_MCO1EN */ |
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794 } |
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795 #if defined(RCC_CFGR_MCO2) |
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796 else |
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797 { |
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798 assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource)); |
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|
799 |
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800 /* MCO2 Clock Enable */ |
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801 __MCO2_CLK_ENABLE(); |
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|
802 |
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|
803 /* Configure the MCO2 pin in alternate function mode */ |
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804 GPIO_InitStruct.Pin = MCO2_PIN; |
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805 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
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806 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; |
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807 GPIO_InitStruct.Pull = GPIO_NOPULL; |
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808 GPIO_InitStruct.Alternate = GPIO_AF0_MCO; |
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809 HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); |
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|
810 |
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|
811 /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */ |
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812 MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U))); |
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813 |
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814 /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */ |
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815 #if defined(RCC_CFGR_MCO2EN) |
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816 __HAL_RCC_MCO2_ENABLE(); |
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817 #endif /* RCC_CFGR_MCO2EN */ |
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818 } |
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819 #endif /* RCC_CFGR_MCO2 */ |
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820 } |
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821 |
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822 /** |
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823 * @brief Enables the Clock Security System. |
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824 * @note If a failure is detected on the HSE oscillator clock, this oscillator |
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825 * is automatically disabled and an interrupt is generated to inform the |
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826 * software about the failure (Clock Security System Interrupt, CSSI), |
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827 * allowing the MCU to perform rescue operations. The CSSI is linked to |
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828 * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. |
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829 * @retval None |
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|
830 */ |
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831 void HAL_RCC_EnableCSS(void) |
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832 { |
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833 *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; |
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834 } |
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835 |
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836 /** |
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837 * @brief Disables the Clock Security System. |
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838 * @retval None |
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|
839 */ |
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840 void HAL_RCC_DisableCSS(void) |
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841 { |
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842 *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; |
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843 } |
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|
844 |
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845 /** |
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846 * @brief Returns the SYSCLK frequency |
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847 * |
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848 * @note The system frequency computed by this function is not the real |
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849 * frequency in the chip. It is calculated based on the predefined |
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850 * constant and the selected clock source: |
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851 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) |
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852 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) |
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853 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**) |
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854 * or HSI_VALUE(*) multiplied/divided by the PLL factors. |
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855 * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value |
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856 * 16 MHz) but the real value may vary depending on the variations |
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857 * in voltage and temperature. |
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858 * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value |
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859 * 25 MHz), user has to ensure that HSE_VALUE is same as the real |
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860 * frequency of the crystal used. Otherwise, this function may |
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861 * have wrong result. |
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862 * |
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863 * @note The result of this function could be not correct when using fractional |
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864 * value for HSE crystal. |
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865 * |
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866 * @note This function can be used by the user application to compute the |
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867 * baudrate for the communication peripherals or configure other parameters. |
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868 * |
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869 * @note Each time SYSCLK changes, this function must be called to update the |
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870 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. |
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871 * |
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872 * |
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873 * @retval SYSCLK frequency |
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874 */ |
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875 __weak uint32_t HAL_RCC_GetSysClockFreq(void) |
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876 { |
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877 uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; |
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878 uint32_t sysclockfreq = 0U; |
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879 |
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880 /* Get SYSCLK source -------------------------------------------------------*/ |
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881 switch (RCC->CFGR & RCC_CFGR_SWS) |
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882 { |
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883 case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ |
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884 { |
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885 sysclockfreq = HSI_VALUE; |
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886 break; |
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887 } |
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888 case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ |
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889 { |
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890 sysclockfreq = HSE_VALUE; |
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891 break; |
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892 } |
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893 case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ |
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894 { |
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895 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN |
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896 SYSCLK = PLL_VCO / PLLP */ |
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897 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; |
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898 if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) |
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899 { |
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900 /* HSE used as PLL clock source */ |
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901 pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); |
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902 } |
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903 else |
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904 { |
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905 /* HSI used as PLL clock source */ |
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906 pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); |
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907 } |
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908 pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); |
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909 |
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910 sysclockfreq = pllvco/pllp; |
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911 break; |
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912 } |
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913 default: |
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914 { |
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915 sysclockfreq = HSI_VALUE; |
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916 break; |
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917 } |
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918 } |
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919 return sysclockfreq; |
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920 } |
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921 |
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922 /** |
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diff
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|
923 * @brief Returns the HCLK frequency |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
924 * @note Each time HCLK changes, this function must be called to update the |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
925 * right HCLK value. Otherwise, any configuration based on this function will be incorrect. |
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diff
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|
926 * |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
927 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency |
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Added current STM32 standandard libraries in version independend folder structure
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|
928 * and updated within this function |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
929 * @retval HCLK frequency |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
930 */ |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
931 uint32_t HAL_RCC_GetHCLKFreq(void) |
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diff
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|
932 { |
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diff
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|
933 return SystemCoreClock; |
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diff
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|
934 } |
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diff
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|
935 |
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diff
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|
936 /** |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
937 * @brief Returns the PCLK1 frequency |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
938 * @note Each time PCLK1 changes, this function must be called to update the |
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diff
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|
939 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. |
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|
940 * @retval PCLK1 frequency |
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|
941 */ |
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|
942 uint32_t HAL_RCC_GetPCLK1Freq(void) |
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|
943 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
944 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ |
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Added current STM32 standandard libraries in version independend folder structure
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|
945 return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]); |
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|
946 } |
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|
947 |
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|
948 /** |
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|
949 * @brief Returns the PCLK2 frequency |
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|
950 * @note Each time PCLK2 changes, this function must be called to update the |
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|
951 * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. |
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|
952 * @retval PCLK2 frequency |
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|
953 */ |
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|
954 uint32_t HAL_RCC_GetPCLK2Freq(void) |
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|
955 { |
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|
956 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ |
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|
957 return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]); |
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|
958 } |
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|
959 |
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|
960 /** |
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|
961 * @brief Configures the RCC_OscInitStruct according to the internal |
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962 * RCC configuration registers. |
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963 * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that |
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964 * will be configured. |
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965 * @retval None |
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|
966 */ |
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|
967 __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) |
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|
968 { |
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|
969 /* Set all possible values for the Oscillator type parameter ---------------*/ |
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970 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI; |
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971 |
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972 /* Get the HSE configuration -----------------------------------------------*/ |
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973 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) |
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974 { |
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975 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; |
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976 } |
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977 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) |
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978 { |
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979 RCC_OscInitStruct->HSEState = RCC_HSE_ON; |
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980 } |
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|
981 else |
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|
982 { |
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983 RCC_OscInitStruct->HSEState = RCC_HSE_OFF; |
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984 } |
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985 |
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986 /* Get the HSI configuration -----------------------------------------------*/ |
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987 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) |
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|
988 { |
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989 RCC_OscInitStruct->HSIState = RCC_HSI_ON; |
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990 } |
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991 else |
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|
992 { |
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993 RCC_OscInitStruct->HSIState = RCC_HSI_OFF; |
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994 } |
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|
995 |
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996 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos); |
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997 |
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998 /* Get the LSE configuration -----------------------------------------------*/ |
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999 if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) |
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1000 { |
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1001 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; |
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1002 } |
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1003 else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) |
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1004 { |
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1005 RCC_OscInitStruct->LSEState = RCC_LSE_ON; |
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1006 } |
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1007 else |
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1008 { |
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1009 RCC_OscInitStruct->LSEState = RCC_LSE_OFF; |
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1010 } |
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1011 |
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1012 /* Get the LSI configuration -----------------------------------------------*/ |
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1013 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) |
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1014 { |
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1015 RCC_OscInitStruct->LSIState = RCC_LSI_ON; |
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1016 } |
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1017 else |
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1018 { |
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1019 RCC_OscInitStruct->LSIState = RCC_LSI_OFF; |
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1020 } |
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1021 |
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1022 /* Get the PLL configuration -----------------------------------------------*/ |
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1023 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) |
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1024 { |
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1025 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; |
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1026 } |
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1027 else |
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1028 { |
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1029 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; |
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1030 } |
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1031 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); |
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1032 RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM); |
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1033 RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); |
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1034 RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0) << 1U) >> RCC_PLLCFGR_PLLP_Pos); |
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1035 RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos); |
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1036 } |
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1037 |
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1038 /** |
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1039 * @brief Configures the RCC_ClkInitStruct according to the internal |
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1040 * RCC configuration registers. |
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1041 * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that |
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1042 * will be configured. |
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1043 * @param pFLatency Pointer on the Flash Latency. |
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1044 * @retval None |
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1045 */ |
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1046 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) |
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1047 { |
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1048 /* Set all possible values for the Clock type parameter --------------------*/ |
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1049 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
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1050 |
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1051 /* Get the SYSCLK configuration --------------------------------------------*/ |
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1052 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); |
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1053 |
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1054 /* Get the HCLK configuration ----------------------------------------------*/ |
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1055 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); |
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1056 |
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1057 /* Get the APB1 configuration ----------------------------------------------*/ |
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1058 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); |
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1059 |
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1060 /* Get the APB2 configuration ----------------------------------------------*/ |
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1061 RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); |
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1062 |
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1063 /* Get the Flash Wait State (Latency) configuration ------------------------*/ |
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1064 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); |
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1065 } |
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1066 |
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1067 /** |
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1068 * @brief This function handles the RCC CSS interrupt request. |
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1069 * @note This API should be called under the NMI_Handler(). |
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1070 * @retval None |
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1071 */ |
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1072 void HAL_RCC_NMI_IRQHandler(void) |
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1073 { |
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1074 /* Check RCC CSSF flag */ |
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1075 if(__HAL_RCC_GET_IT(RCC_IT_CSS)) |
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1076 { |
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1077 /* RCC Clock Security System interrupt user callback */ |
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1078 HAL_RCC_CSSCallback(); |
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1079 |
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1080 /* Clear RCC CSS pending bit */ |
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1081 __HAL_RCC_CLEAR_IT(RCC_IT_CSS); |
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1082 } |
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1083 } |
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1084 |
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1085 /** |
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1086 * @brief RCC Clock Security System interrupt callback |
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1087 * @retval None |
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1088 */ |
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1089 __weak void HAL_RCC_CSSCallback(void) |
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1090 { |
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1091 /* NOTE : This function Should not be modified, when the callback is needed, |
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1092 the HAL_RCC_CSSCallback could be implemented in the user file |
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1093 */ |
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1094 } |
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1095 |
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1096 /** |
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1097 * @} |
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1098 */ |
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1099 |
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1100 /** |
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1101 * @} |
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1102 */ |
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1103 |
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1104 #endif /* HAL_RCC_MODULE_ENABLED */ |
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1105 /** |
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1106 * @} |
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1107 */ |
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1108 |
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1109 /** |
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1110 * @} |
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1111 */ |
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1112 |
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1113 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |