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annotate Documentations/dump-rte.cfg @ 263:a6c0375bc950 IPC_Sync_Improvment_2
Forward 100ms time stamp to RTE and handle logbook in main loop
Because of code execution variance between 100ms cycle event and start of SPI communication, the synchronization between Main and RTE may shift. To avoid these shifts the time stamp of the 100ms event is forwarded to the RTE which is now able to adapt to small variations.
One variation point was the storage of dive samples within the external flash. Taking a closer look how this function works, moving it from the timer callback to the main loop should not be an issue.
A critical point of having the function in the timer call back was the sector clean function which is called (depending on dive data) every ~300minutes and may take 250ms - 1500ms.
author | ideenmodellierer |
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date | Sun, 14 Apr 2019 11:38:14 +0200 |
parents | 01cc5959f199 |
children |
rev | line source |
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34 | 1 #! openocd -f |
2 # Define the prob used: | |
3 source [find interface/stlink-v2.cfg] | |
4 set WORKAREASIZE 0x8000 | |
5 transport select hla_swd | |
6 | |
7 # Reset options | |
8 set ENABLE_LOW_POWER 1 | |
9 set STOP_WATCHDOG 1 | |
10 reset_config srst_only srst_nogate connect_assert_srst | |
11 | |
12 # Seelct the right chip | |
13 set CHIPNAME stm32f411RETx | |
14 set CONNECT_UNDER_RESET 1 | |
15 source [find target/stm32f4x.cfg] | |
16 | |
17 # Allow to continue execution after a connection: | |
18 init_reset run | |
19 | |
20 #puts "Flash banks:" | |
21 #flash banks | |
22 | |
23 #puts "Reading..." | |
24 #flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000 | |
25 | |
26 #puts "Done." | |
27 #exit |