annotate Discovery/Src/stm32f4xx_hal_msp_hw2.c @ 289:8466c994f3e6 div-fixes-6

cleanup: remove unused code While searching for simulator vs. real dive switching I found these 2 unused functions. Trivial cleanup. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
author Jan Mulder <jlmulder@xs4all.nl>
date Mon, 29 Apr 2019 19:45:25 +0200
parents b7689d9e888a
children 879709909dd6
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1 ///////////////////////////////////////////////////////////////////////////////
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2 /// -*- coding: UTF-8 -*-
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3 ///
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4 /// \file Discovery/Src/stm32f4xx_hal_msp_hw2.c
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5 /// \brief This file provides code for the MSP Initialization and de-Initialization codes.
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6 /// \author Heinrichs Weikamp gmbh
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7 /// \date 2018
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8 ///
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9 /// \details
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10 ///
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11 /// $Id$
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12 ///////////////////////////////////////////////////////////////////////////////
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13 /// \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh
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14 ///
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15 /// This program is free software: you can redistribute it and/or modify
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16 /// it under the terms of the GNU General Public License as published by
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17 /// the Free Software Foundation, either version 3 of the License, or
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18 /// (at your option) any later version.
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19 ///
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20 /// This program is distributed in the hope that it will be useful,
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21 /// but WITHOUT ANY WARRANTY; without even the implied warranty of
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22 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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23 /// GNU General Public License for more details.
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24 ///
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25 /// You should have received a copy of the GNU General Public License
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26 /// along with this program. If not, see <http://www.gnu.org/licenses/>.
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27 ///////////////////////////////////////////////////////////////////////////////
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28 /// \par Copyright (c) 2014 STMicroelectronics
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29 ///
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30 /// Redistribution and use in source and binary forms, with or without modification,
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31 /// are permitted provided that the following conditions are met:
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32 /// 1. Redistributions of source code must retain the above copyright notice,
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33 /// this list of conditions and the following disclaimer.
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34 /// 2. Redistributions in binary form must reproduce the above copyright notice,
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35 /// this list of conditions and the following disclaimer in the documentation
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36 /// and/or other materials provided with the distribution.
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37 /// 3. Neither the name of STMicroelectronics nor the names of its contributors
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38 /// may be used to endorse or promote products derived from this software
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39 /// without specific prior written permission.
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40 ///
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41 /// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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42 /// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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43 /// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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44 /// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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45 /// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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46 /// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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47 /// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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48 /// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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49 /// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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50 /// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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51 ///////////////////////////////////////////////////////////////////////////////
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52
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53 /* Includes ------------------------------------------------------------------*/
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54 #include "stm32f4xx_hal.h"
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55 #include "ostc.h"
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56
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57 DMA_HandleTypeDef hdma_spi1_tx;
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58
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59 DMA_HandleTypeDef hdma_spi1_rx;
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60
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61 /**
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62 * Initializes the Global MSP.
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63 */
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64 void HAL_MspInit(void)
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65 {
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66 /* USER CODE BEGIN MspInit 0 */
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67 /* USER CODE END MspInit 0 */
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68
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69 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_2);
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70
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71 /* System interrupt init*/
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72 /** SysTick_IRQn interrupt configuration
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73 */
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74 HAL_NVIC_SetPriority(SysTick_IRQn, 1, 0);
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75
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76 /* USER CODE BEGIN MspInit 1 */
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77 /* always set priority right */
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78 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_2);
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79 /* USER CODE END MspInit 1 */
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80 }
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81
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82 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
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83 {
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84
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85 if(hdma2d->Instance==DMA2D)
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86 {
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87 /* USER CODE BEGIN DMA2D_MspInit 0 */
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88
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89 /* USER CODE END DMA2D_MspInit 0 */
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90 /* Peripheral clock enable */
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91 __DMA2D_CLK_ENABLE();
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92 /* USER CODE BEGIN DMA2D_MspInit 1 */
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93 HAL_NVIC_SetPriority(DMA2D_IRQn, 1, 2);
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94 HAL_NVIC_EnableIRQ(DMA2D_IRQn);
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95 /* USER CODE END DMA2D_MspInit 1 */
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96 }
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97
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98 }
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99
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100 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
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101 {
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102
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103 if(hdma2d->Instance==DMA2D)
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104 {
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105 /* USER CODE BEGIN DMA2D_MspDeInit 0 */
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106
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107 /* USER CODE END DMA2D_MspDeInit 0 */
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108 /* Peripheral clock disable */
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109 __DMA2D_CLK_DISABLE();
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110 /* USER CODE BEGIN DMA2D_MspDeInit 1 */
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111 __DMA2D_RELEASE_RESET();
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112 /* USER CODE END DMA2D_MspDeInit 1 */
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113 }
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114
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115 }
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116
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117 void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
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118 {
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119
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120 GPIO_InitTypeDef GPIO_InitStruct;
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121 if(hltdc->Instance==LTDC)
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122 {
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123 /* USER CODE BEGIN LTDC_MspInit 0 */
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124 __GPIOE_CLK_ENABLE();
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125 __GPIOF_CLK_ENABLE();
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126 __GPIOG_CLK_ENABLE();
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127 __GPIOH_CLK_ENABLE();
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128 __GPIOI_CLK_ENABLE();
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129
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130 /* USER CODE END LTDC_MspInit 0 */
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131 /* Peripheral clock enable */
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132 __LTDC_CLK_ENABLE();
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133
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134 /**LTDC GPIO Configuration
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135 PE4 ------> LTDC_B0
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136 PE5 ------> LTDC_G0
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137 PE6 ------> LTDC_G1
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138 PI9 ------> LTDC_VSYNC
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139 PI10 ------> LTDC_HSYNC
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140 PF10 ------> LTDC_DE
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141 PH2 ------> LTDC_R0
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142 PH3 ------> LTDC_R1
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143 PH8 ------> LTDC_R2
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144 PH9 ------> LTDC_R3
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145 PH10 ------> LTDC_R4
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146 PH11 ------> LTDC_R5
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147 PH12 ------> LTDC_R6
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148 PG6 ------> LTDC_R7
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149 PG7 ------> LTDC_CLK
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150 PH13 ------> LTDC_G2
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151 PH14 ------> LTDC_G3
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152 PH15 ------> LTDC_G4
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153 PI0 ------> LTDC_G5
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154 PI1 ------> LTDC_G6
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155 PI2 ------> LTDC_G7
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156 PG10 ------> LTDC_B2
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157 PG11 ------> LTDC_B3
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158 PG12 ------> LTDC_B1
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159 PI4 ------> LTDC_B4
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160 PI5 ------> LTDC_B5
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161 PI6 ------> LTDC_B6
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162 PI7 ------> LTDC_B7
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163 */
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164 GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
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165 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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166 GPIO_InitStruct.Pull = GPIO_NOPULL;
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167 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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168 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
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169 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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170
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171 GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
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172 |GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6
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173 |GPIO_PIN_7;
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174 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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175 GPIO_InitStruct.Pull = GPIO_NOPULL;
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176 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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177 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
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178 HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
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179
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180 GPIO_InitStruct.Pin = GPIO_PIN_10;
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181 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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182 GPIO_InitStruct.Pull = GPIO_NOPULL;
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183 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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184 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
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185 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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186
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187 GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_9
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188 |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
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189 |GPIO_PIN_14|GPIO_PIN_15;
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190 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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191 GPIO_InitStruct.Pull = GPIO_NOPULL;
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192 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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193 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
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194 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
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195
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196 GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11
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197 |GPIO_PIN_12;
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198 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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199 GPIO_InitStruct.Pull = GPIO_NOPULL;
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200 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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201 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
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202 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
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203
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204 /* USER CODE BEGIN LTDC_MspInit 1 */
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205
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206 /* USER CODE END LTDC_MspInit 1 */
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207 }
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208
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209 }
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210
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211 void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
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212 {
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213
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214 if(hltdc->Instance==LTDC)
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215 {
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216 /* USER CODE BEGIN LTDC_MspDeInit 0 */
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217
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218 /* USER CODE END LTDC_MspDeInit 0 */
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219 /* Peripheral clock disable */
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220 __LTDC_CLK_DISABLE();
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221
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222 /**LTDC GPIO Configuration
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223 PE4 ------> LTDC_B0
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224 PE5 ------> LTDC_G0
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225 PE6 ------> LTDC_G1
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226 PI9 ------> LTDC_VSYNC
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227 PI10 ------> LTDC_HSYNC
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228 PF10 ------> LTDC_DE
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229 PH2 ------> LTDC_R0
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230 PH3 ------> LTDC_R1
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231 PH8 ------> LTDC_R2
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232 PH9 ------> LTDC_R3
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233 PH10 ------> LTDC_R4
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234 PH11 ------> LTDC_R5
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235 PH12 ------> LTDC_R6
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236 PG6 ------> LTDC_R7
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237 PG7 ------> LTDC_CLK
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238 PH13 ------> LTDC_G2
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239 PH14 ------> LTDC_G3
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240 PH15 ------> LTDC_G4
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241 PI0 ------> LTDC_G5
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242 PI1 ------> LTDC_G6
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243 PI2 ------> LTDC_G7
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244 PG10 ------> LTDC_B2
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245 PG11 ------> LTDC_B3
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246 PG12 ------> LTDC_B1
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247 PI4 ------> LTDC_B4
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248 PI5 ------> LTDC_B5
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249 PI6 ------> LTDC_B6
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250 PI7 ------> LTDC_B7
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251 */
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252 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
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253
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254 HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
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255 |GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6
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256 |GPIO_PIN_7);
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257
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258 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_10);
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259
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260 HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_9
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261 |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
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262 |GPIO_PIN_14|GPIO_PIN_15);
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263
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264 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11
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265 |GPIO_PIN_12);
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266
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267 /* USER CODE BEGIN LTDC_MspDeInit 1 */
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268 __LTDC_RELEASE_RESET();
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269
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270 /* USER CODE END LTDC_MspDeInit 1 */
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271 }
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272
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273 }
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274
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275 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
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276 {
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277
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278 GPIO_InitTypeDef GPIO_InitStruct;
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279 if(hspi->Instance==SPI1)
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280 {
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281 /* USER CODE BEGIN SPI1_MspInit 0 */
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282 __GPIOA_CLK_ENABLE();
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283 __GPIOB_CLK_ENABLE();
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284 __DMA2_CLK_ENABLE();
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285
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286 /* USER CODE END SPI1_MspInit 0 */
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287 /* Peripheral clock enable */
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288 __SPI1_CLK_ENABLE();
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289
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290 /**SPI1 GPIO Configuration
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291 alt: PA4 ------> SPI1_NSS, jetzt soft
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292 PA5 ------> SPI1_SCK
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293 alt: PA6 ------> SPI1_MISO
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294 neu: PB4 ------> SPI1_MISO
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295 PA7 ------> SPI1_MOSI
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296 */
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297 // GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
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298 GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
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299 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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300 GPIO_InitStruct.Pull = GPIO_NOPULL;
125
626191e1fed1 Change GPIO speed for SPI communication as recommended by STM32 Errata
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301 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */
38
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302 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
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303 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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304 GPIO_InitStruct.Pin = GPIO_PIN_4;
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305 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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306
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307 /* Peripheral DMA init*/
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308
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309 hdma_spi1_tx.Instance = DMA2_Stream3;
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310 hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3;
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311 hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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312 hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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313 hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
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314 hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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315 hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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316 hdma_spi1_tx.Init.Mode = DMA_NORMAL;
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317 hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
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318 hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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319 hdma_spi1_tx.Init.MemBurst = DMA_MBURST_INC4;
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320 hdma_spi1_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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321 HAL_DMA_Init(&hdma_spi1_tx);
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322
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323 __HAL_LINKDMA(hspi,hdmatx,hdma_spi1_tx);
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324
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325 hdma_spi1_rx.Instance = DMA2_Stream0;
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326 hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3;
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327 hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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328 hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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329 hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
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330 hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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331 hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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332 hdma_spi1_rx.Init.Mode = DMA_NORMAL;
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333 hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH;
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334 hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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335 hdma_spi1_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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336
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337 hdma_spi1_rx.Init.MemBurst = DMA_MBURST_INC4;
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338 hdma_spi1_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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339 HAL_DMA_Init(&hdma_spi1_rx);
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340
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341 __HAL_LINKDMA(hspi, hdmarx, hdma_spi1_rx);
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342
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343 /*##-4- Configure the NVIC for DMA #########################################*/
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344 /* NVIC configuration for DMA transfer complete interrupt (SPI1_TX) */
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345 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 0, 1);
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346 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
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347
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348
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349 /* NVIC configuration for DMA transfer complete interrupt (SPI1_RX) */
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350 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0);
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351 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
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352
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353 }
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354 else if(hspi->Instance==SPI2)
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355 {
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356 /* USER CODE BEGIN SPI2_MspInit 0 */
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357 __GPIOB_CLK_ENABLE();
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358
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359 /* USER CODE END SPI2_MspInit 0 */
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360 /* Peripheral clock enable */
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361 __SPI2_CLK_ENABLE();
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362
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363 /**SPI2 GPIO Configuration
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364 PB13 ------> SPI2_SCK
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365 PB14 ------> SPI2_MISO
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366 PB15 ------> SPI2_MOSI
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367 */
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368 GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
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369 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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370 GPIO_InitStruct.Pull = GPIO_NOPULL;
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371 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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372 GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
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373 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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374
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375 /* USER CODE BEGIN SPI2_MspInit 1 */
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376
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377 /* USER CODE END SPI2_MspInit 1 */
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378 }
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379 else if(hspi->Instance==SPI5)
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380 {
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381 /* USER CODE BEGIN SPI5_MspInit 0 */
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382 __GPIOF_CLK_ENABLE();
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383
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384 /* USER CODE END SPI5_MspInit 0 */
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385 /* Peripheral clock enable */
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386 __SPI5_CLK_ENABLE();
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387
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388 /**SPI5 GPIO Configuration
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389 PF7 ------> SPI5_SCK
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390 PF8 ------> SPI5_MISO
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391 PF9 ------> SPI5_MOSI
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392 */
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393 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
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394 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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395 GPIO_InitStruct.Pull = GPIO_NOPULL;
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396 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */
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397 GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
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398 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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399
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400 /* USER CODE BEGIN SPI5_MspInit 1 */
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401
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402 /* USER CODE END SPI5_MspInit 1 */
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403 }
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404
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405 }
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406
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407 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
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408 {
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409
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410 if(hspi->Instance==SPI1)
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411 {
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412 /* USER CODE BEGIN SPI1_MspDeInit 0 */
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413 __SPI1_FORCE_RESET();
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414 __SPI1_RELEASE_RESET();
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415
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416 /* USER CODE END SPI1_MspDeInit 0 */
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417 /* Peripheral clock disable */
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418 __SPI1_CLK_DISABLE();
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419
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420 /**SPI1 GPIO Configuration
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421 PA4 ------> SPI1_NSS
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422 PA5 ------> SPI1_SCK
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423 PA6 ------> SPI1_MISO
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424 PA7 ------> SPI1_MOSI
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425 */
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426 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
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427
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428 /* Peripheral DMA DeInit*/
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429 HAL_DMA_DeInit(hspi->hdmatx);
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430 HAL_DMA_DeInit(hspi->hdmarx);
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431 /* USER CODE BEGIN SPI1_MspDeInit 1 */
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432
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433 /* USER CODE END SPI1_MspDeInit 1 */
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434 }
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435 else if(hspi->Instance==SPI2)
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436 {
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437 /* USER CODE BEGIN SPI2_MspDeInit 0 */
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438
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439 /* USER CODE END SPI2_MspDeInit 0 */
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440 /* Peripheral clock disable */
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441 __SPI2_CLK_DISABLE();
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442
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443 /**SPI2 GPIO Configuration
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444 PB13 ------> SPI2_SCK
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445 PB14 ------> SPI2_MISO
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446 PB15 ------> SPI2_MOSI
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447 */
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448 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
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449
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450 /* USER CODE BEGIN SPI2_MspDeInit 1 */
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451
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452 /* USER CODE END SPI2_MspDeInit 1 */
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453 }
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454 else if(hspi->Instance==SPI5)
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455 {
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456 /* USER CODE BEGIN SPI5_MspDeInit 0 */
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457 __SPI5_FORCE_RESET();
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458 __SPI5_RELEASE_RESET();
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459
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460 /* USER CODE END SPI5_MspDeInit 0 */
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461 /* Peripheral clock disable */
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462 __SPI5_CLK_DISABLE();
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463
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464 /**SPI5 GPIO Configuration
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465 PF7 ------> SPI5_SCK
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466 PF8 ------> SPI5_MISO
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467 PF9 ------> SPI5_MOSI
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468 */
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469 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9);
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470
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471 /* USER CODE BEGIN SPI5_MspDeInit 1 */
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472
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473 /* USER CODE END SPI5_MspDeInit 1 */
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474 }
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475
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476 }
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477
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478 void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
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479 {
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480 GPIO_InitTypeDef GPIO_InitStruct;
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481 if(htim_pwm->Instance==TIM_BACKLIGHT)
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482 {
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483 TIM_BACKLIGHT_GPIO_ENABLE();
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484 TIM_BACKLIGHT_CLK_ENABLE();
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485
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486 GPIO_InitStruct.Pin = TIM_BACKLIGHT_PIN;
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487 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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488 GPIO_InitStruct.Pull = GPIO_NOPULL;
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489 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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490 GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
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491 HAL_GPIO_Init(TIM_BACKLIGHT_GPIO_PORT, &GPIO_InitStruct);
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492 }
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493
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494 }
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495
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496 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
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497 {
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498 if(htim_base->Instance==TIMx)
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499 {
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500 TIMx_CLK_ENABLE();
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501
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502 HAL_NVIC_SetPriority(TIMx_IRQn, 2, 1);
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503 HAL_NVIC_EnableIRQ(TIMx_IRQn);
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504 }
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505 #ifdef DEMOMODE
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506 if(htim_base->Instance==TIM7)
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507 {
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508 __TIM7_CLK_ENABLE();
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509
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510 HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0);
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511 HAL_NVIC_EnableIRQ(TIM7_IRQn);
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512 }
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513 #endif
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514 }
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515
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516 void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
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517 {
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518
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519 if(htim_pwm->Instance==TIM2)
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520 {
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521 /* USER CODE BEGIN TIM2_MspDeInit 0 */
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522
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523 /* USER CODE END TIM2_MspDeInit 0 */
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524 /* Peripheral clock disable */
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525 __TIM2_CLK_DISABLE();
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526
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527 /**TIM2 GPIO Configuration
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528 PA15 ------> TIM2_CH1
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529 */
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530 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15);
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531
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532 /* USER CODE BEGIN TIM2_MspDeInit 1 */
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533
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534 /* USER CODE END TIM2_MspDeInit 1 */
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535 }
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536
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537 }
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538
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539 void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
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540 {
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541
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542 if(htim_base->Instance==TIM3)
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543 {
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544 /* USER CODE BEGIN TIM3_MspDeInit 0 */
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545
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parents:
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546 /* USER CODE END TIM3_MspDeInit 0 */
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heinrichsweikamp
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547 /* Peripheral clock disable */
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548 __TIM3_CLK_DISABLE();
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549
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550 /**TIM3 GPIO Configuration
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diff changeset
551 PC7 ------> TIM3_CH2
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552 */
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553 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_7);
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554
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555 /* USER CODE BEGIN TIM3_MspDeInit 1 */
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556
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557 /* USER CODE END TIM3_MspDeInit 1 */
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558 }
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559
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560 }
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561
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562 void HAL_UART_MspInit(UART_HandleTypeDef* huart)
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563 {
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564
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565 GPIO_InitTypeDef GPIO_InitStruct;
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566 if(huart->Instance==USART1)
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567 {
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568 /* USER CODE BEGIN USART1_MspInit 0 */
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569 __GPIOA_CLK_ENABLE();
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570
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571 /* USER CODE END USART1_MspInit 0 */
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572 /* Peripheral clock enable */
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573 __USART1_CLK_ENABLE();
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574
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575 /**USART1 GPIO Configuration
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576 PA9 ------> USART1_TX
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577 PA10 ------> USART1_RX
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578 PA11 ------> USART1_CTS
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579 PA12 ------> USART1_RTS
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580 */
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581 #ifdef USARTx_CTS_PIN
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582 GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
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583 #else
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584 GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
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585 #endif
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586 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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587 GPIO_InitStruct.Pull = GPIO_PULLUP;
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588 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;//GPIO_SPEED_LOW;
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589 GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
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590 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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591
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592 HAL_NVIC_SetPriority(USART1_IRQn, 0, 1);
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593 HAL_NVIC_EnableIRQ(USART1_IRQn);
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594 }
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595 #ifdef USART_IR_HUD
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596 else if(huart->Instance==USART_IR_HUD) /* USART2 */
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597 {
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598 USART_IR_HUD_CLK_ENABLE();
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599 USART_IR_HUD_TX_GPIO_CLK_ENABLE();
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600 USART_IR_HUD_RX_GPIO_CLK_ENABLE();
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601
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602 /**USART2 GPIO Configuration
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diff changeset
603 PD5 ------> USART2_TX
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diff changeset
604 PD6 ------> USART2_RX
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605 */
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606
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607 GPIO_InitStruct.Pin = USART_IR_HUD_TX_PIN;
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608 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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609 GPIO_InitStruct.Pull = GPIO_PULLUP;
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610 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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611 GPIO_InitStruct.Alternate = USART_IR_HUD_TX_AF;
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612 HAL_GPIO_Init(USART_IR_HUD_TX_GPIO_PORT, &GPIO_InitStruct);
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613
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614 GPIO_InitStruct.Pin = USART_IR_HUD_RX_PIN;
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615 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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616 GPIO_InitStruct.Pull = GPIO_PULLUP;
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617 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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618 GPIO_InitStruct.Alternate = USART_IR_HUD_RX_AF;
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619 HAL_GPIO_Init(USART_IR_HUD_RX_GPIO_PORT, &GPIO_InitStruct);
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620
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621 HAL_NVIC_SetPriority(USART_IR_HUD_IRQn, 0, 1);
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622 HAL_NVIC_EnableIRQ(USART_IR_HUD_IRQn);
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623 }
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624 #endif
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625 else if(huart->Instance==USART3)
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626 {
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627 /* USER CODE BEGIN USART3_MspInit 0 */
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628
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629 /* USER CODE END USART3_MspInit 0 */
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630 /* Peripheral clock enable */
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631 __USART3_CLK_ENABLE();
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632
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633 /**USART3 GPIO Configuration
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634 PC10 ------> USART3_TX
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635 PC11 ------> USART3_RX
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636 */
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637 GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
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638 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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639 GPIO_InitStruct.Pull = GPIO_PULLUP;
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640 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
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641 GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
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642 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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643
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644 /* USER CODE BEGIN USART3_MspInit 1 */
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645
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646 /* USER CODE END USART3_MspInit 1 */
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647 }
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648
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649 }
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650
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651 void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
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652 {
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653
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654 if(huart->Instance==USART1)
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655 {
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656 /* USER CODE BEGIN USART1_MspDeInit 0 */
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diff changeset
657
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658 /* USER CODE END USART1_MspDeInit 0 */
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659 /* Peripheral clock disable */
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660 HAL_NVIC_DisableIRQ(USART1_IRQn);
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661 __USART1_CLK_DISABLE();
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diff changeset
662
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663 /**USART1 GPIO Configuration
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diff changeset
664 PA9 ------> USART1_TX
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665 PA10 ------> USART1_RX
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666 */
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667 #ifdef USARTx_CTS_PIN
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668 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12);
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diff changeset
669 #else
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670 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
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671 #endif
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672
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673 /* USER CODE BEGIN USART1_MspDeInit 1 */
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674
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675 /* USER CODE END USART1_MspDeInit 1 */
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676 }
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677 else if(huart->Instance==USART2)
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parents:
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678 {
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679 /* USER CODE BEGIN USART2_MspDeInit 0 */
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diff changeset
680
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681 /* USER CODE END USART2_MspDeInit 0 */
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parents:
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682 /* Peripheral clock disable */
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683 __USART2_CLK_DISABLE();
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684
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685 /**USART2 GPIO Configuration
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diff changeset
686 PD5 ------> USART2_TX
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687 PD6 ------> USART2_RX
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688 */
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689 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6);
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690
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691 /* USER CODE BEGIN USART2_MspDeInit 1 */
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692
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693 /* USER CODE END USART2_MspDeInit 1 */
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694 }
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695 else if(huart->Instance==USART3)
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696 {
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697 /* USER CODE BEGIN USART3_MspDeInit 0 */
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diff changeset
698
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699 /* USER CODE END USART3_MspDeInit 0 */
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heinrichsweikamp
parents:
diff changeset
700 /* Peripheral clock disable */
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701 __USART3_CLK_DISABLE();
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diff changeset
702
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diff changeset
703 /**USART3 GPIO Configuration
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parents:
diff changeset
704 PC10 ------> USART3_TX
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diff changeset
705 PC11 ------> USART3_RX
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706 */
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707 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
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parents:
diff changeset
708
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709 /* USER CODE BEGIN USART3_MspDeInit 1 */
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diff changeset
710
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711 /* USER CODE END USART3_MspDeInit 1 */
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712 }
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diff changeset
713
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714 }
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715
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diff changeset
716 static int FMC_Initialized = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
717
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heinrichsweikamp
parents:
diff changeset
718 static void HAL_FMC_MspInit(void){
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
719 GPIO_InitTypeDef GPIO_InitStruct;
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heinrichsweikamp
parents:
diff changeset
720 if (FMC_Initialized) {
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heinrichsweikamp
parents:
diff changeset
721 return;
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heinrichsweikamp
parents:
diff changeset
722 }
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heinrichsweikamp
parents:
diff changeset
723 FMC_Initialized = 1;
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heinrichsweikamp
parents:
diff changeset
724 /* Peripheral clock enable */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
725 __GPIOC_CLK_ENABLE();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
726 __GPIOD_CLK_ENABLE();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
727 __GPIOE_CLK_ENABLE();
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heinrichsweikamp
parents:
diff changeset
728 __GPIOF_CLK_ENABLE();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
729 __GPIOG_CLK_ENABLE();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
730 __GPIOH_CLK_ENABLE();
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
731
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heinrichsweikamp
parents:
diff changeset
732 __FMC_CLK_ENABLE();
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heinrichsweikamp
parents:
diff changeset
733
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heinrichsweikamp
parents:
diff changeset
734 /** FMC GPIO Configuration
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heinrichsweikamp
parents:
diff changeset
735 PF0 ------> FMC_A0
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heinrichsweikamp
parents:
diff changeset
736 PF1 ------> FMC_A1
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heinrichsweikamp
parents:
diff changeset
737 PF2 ------> FMC_A2
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heinrichsweikamp
parents:
diff changeset
738 PF3 ------> FMC_A3
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heinrichsweikamp
parents:
diff changeset
739 PF4 ------> FMC_A4
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heinrichsweikamp
parents:
diff changeset
740 PF5 ------> FMC_A5
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heinrichsweikamp
parents:
diff changeset
741 PC0 ------> FMC_SDNWE
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
742 PF11 ------> FMC_SDNRAS
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heinrichsweikamp
parents:
diff changeset
743 PF12 ------> FMC_A6
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heinrichsweikamp
parents:
diff changeset
744 PF13 ------> FMC_A7
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heinrichsweikamp
parents:
diff changeset
745 PF14 ------> FMC_A8
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heinrichsweikamp
parents:
diff changeset
746 PF15 ------> FMC_A9
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heinrichsweikamp
parents:
diff changeset
747 PG0 ------> FMC_A10
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heinrichsweikamp
parents:
diff changeset
748 PG1 ------> FMC_A11
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heinrichsweikamp
parents:
diff changeset
749 PE7 ------> FMC_D4
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heinrichsweikamp
parents:
diff changeset
750 PE8 ------> FMC_D5
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heinrichsweikamp
parents:
diff changeset
751 PE9 ------> FMC_D6
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heinrichsweikamp
parents:
diff changeset
752 PE10 ------> FMC_D7
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heinrichsweikamp
parents:
diff changeset
753 PE11 ------> FMC_D8
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heinrichsweikamp
parents:
diff changeset
754 PE12 ------> FMC_D9
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heinrichsweikamp
parents:
diff changeset
755 PE13 ------> FMC_D10
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heinrichsweikamp
parents:
diff changeset
756 PE14 ------> FMC_D11
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heinrichsweikamp
parents:
diff changeset
757 PE15 ------> FMC_D12
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heinrichsweikamp
parents:
diff changeset
758 PH6 ------> FMC_SDNE1 neu
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heinrichsweikamp
parents:
diff changeset
759 PH7 ------> FMC_SDCKE1 neu
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heinrichsweikamp
parents:
diff changeset
760 PD8 ------> FMC_D13
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heinrichsweikamp
parents:
diff changeset
761 PD9 ------> FMC_D14
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heinrichsweikamp
parents:
diff changeset
762 PD10 ------> FMC_D15
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heinrichsweikamp
parents:
diff changeset
763 PD14 ------> FMC_D0
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heinrichsweikamp
parents:
diff changeset
764 PD15 ------> FMC_D1
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heinrichsweikamp
parents:
diff changeset
765 PG2 ------> FMC_A12
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heinrichsweikamp
parents:
diff changeset
766 PG4 ------> FMC_BA0
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
767 PG5 ------> FMC_BA1
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
768 PG8 ------> FMC_SDCLK
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heinrichsweikamp
parents:
diff changeset
769 PD0 ------> FMC_D2
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heinrichsweikamp
parents:
diff changeset
770 PD1 ------> FMC_D3
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heinrichsweikamp
parents:
diff changeset
771 PG15 ------> FMC_SDNCAS
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heinrichsweikamp
parents:
diff changeset
772 PE0 ------> FMC_NBL0
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heinrichsweikamp
parents:
diff changeset
773 PE1 ------> FMC_NBL1
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heinrichsweikamp
parents:
diff changeset
774 */
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heinrichsweikamp
parents:
diff changeset
775
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heinrichsweikamp
parents:
diff changeset
776 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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heinrichsweikamp
parents:
diff changeset
777 GPIO_InitStruct.Pull = GPIO_NOPULL;
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diff changeset
778 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
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heinrichsweikamp
parents:
diff changeset
779 GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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heinrichsweikamp
parents:
diff changeset
780
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heinrichsweikamp
parents:
diff changeset
781
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heinrichsweikamp
parents:
diff changeset
782 GPIO_InitStruct.Pin = GPIO_PIN_0;
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heinrichsweikamp
parents:
diff changeset
783 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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heinrichsweikamp
parents:
diff changeset
784
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heinrichsweikamp
parents:
diff changeset
785 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
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heinrichsweikamp
parents:
diff changeset
786 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
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heinrichsweikamp
parents:
diff changeset
787 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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heinrichsweikamp
parents:
diff changeset
788
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heinrichsweikamp
parents:
diff changeset
789 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
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heinrichsweikamp
parents:
diff changeset
790 |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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heinrichsweikamp
parents:
diff changeset
791 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
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heinrichsweikamp
parents:
diff changeset
792 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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heinrichsweikamp
parents:
diff changeset
793
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heinrichsweikamp
parents:
diff changeset
794 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
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heinrichsweikamp
parents:
diff changeset
795 |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
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heinrichsweikamp
parents:
diff changeset
796 |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
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heinrichsweikamp
parents:
diff changeset
797 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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heinrichsweikamp
parents:
diff changeset
798
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heinrichsweikamp
parents:
diff changeset
799 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4
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heinrichsweikamp
parents:
diff changeset
800 |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15;
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heinrichsweikamp
parents:
diff changeset
801 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
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heinrichsweikamp
parents:
diff changeset
802
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heinrichsweikamp
parents:
diff changeset
803 GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
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heinrichsweikamp
parents:
diff changeset
804 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
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heinrichsweikamp
parents:
diff changeset
805
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heinrichsweikamp
parents:
diff changeset
806
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heinrichsweikamp
parents:
diff changeset
807 }
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heinrichsweikamp
parents:
diff changeset
808
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heinrichsweikamp
parents:
diff changeset
809 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
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heinrichsweikamp
parents:
diff changeset
810 HAL_FMC_MspInit();
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heinrichsweikamp
parents:
diff changeset
811 }
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heinrichsweikamp
parents:
diff changeset
812
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heinrichsweikamp
parents:
diff changeset
813 static int FMC_DeInitialized = 0;
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heinrichsweikamp
parents:
diff changeset
814
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heinrichsweikamp
parents:
diff changeset
815 static void HAL_FMC_MspDeInit(void){
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heinrichsweikamp
parents:
diff changeset
816 if (FMC_DeInitialized) {
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heinrichsweikamp
parents:
diff changeset
817 return;
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heinrichsweikamp
parents:
diff changeset
818 }
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heinrichsweikamp
parents:
diff changeset
819 FMC_DeInitialized = 1;
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heinrichsweikamp
parents:
diff changeset
820 /* Peripheral clock enable */
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heinrichsweikamp
parents:
diff changeset
821 __FMC_CLK_DISABLE();
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heinrichsweikamp
parents:
diff changeset
822
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heinrichsweikamp
parents:
diff changeset
823 /** FMC GPIO Configuration
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heinrichsweikamp
parents:
diff changeset
824 PF0 ------> FMC_A0
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heinrichsweikamp
parents:
diff changeset
825 PF1 ------> FMC_A1
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heinrichsweikamp
parents:
diff changeset
826 PF2 ------> FMC_A2
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heinrichsweikamp
parents:
diff changeset
827 PF3 ------> FMC_A3
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heinrichsweikamp
parents:
diff changeset
828 PF4 ------> FMC_A4
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heinrichsweikamp
parents:
diff changeset
829 PF5 ------> FMC_A5
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
830 PC0 ------> FMC_SDNWE
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heinrichsweikamp
parents:
diff changeset
831 PF11 ------> FMC_SDNRAS
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
832 PF12 ------> FMC_A6
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heinrichsweikamp
parents:
diff changeset
833 PF13 ------> FMC_A7
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heinrichsweikamp
parents:
diff changeset
834 PF14 ------> FMC_A8
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heinrichsweikamp
parents:
diff changeset
835 PF15 ------> FMC_A9
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
836 PG0 ------> FMC_A10
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
837 PG1 ------> FMC_A11
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
838 PE7 ------> FMC_D4
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
839 PE8 ------> FMC_D5
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heinrichsweikamp
parents:
diff changeset
840 PE9 ------> FMC_D6
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
841 PE10 ------> FMC_D7
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
842 PE11 ------> FMC_D8
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
843 PE12 ------> FMC_D9
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
844 PE13 ------> FMC_D10
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heinrichsweikamp
parents:
diff changeset
845 PE14 ------> FMC_D11
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
846 PE15 ------> FMC_D12
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
847 PH6 ------> FMC_SDNE1
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
848 PH7 ------> FMC_SDCKE1
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
849 PD8 ------> FMC_D13
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
850 PD9 ------> FMC_D14
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heinrichsweikamp
parents:
diff changeset
851 PD10 ------> FMC_D15
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heinrichsweikamp
parents:
diff changeset
852 PD14 ------> FMC_D0
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heinrichsweikamp
parents:
diff changeset
853 PD15 ------> FMC_D1
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heinrichsweikamp
parents:
diff changeset
854 PG2 ------> FMC_A12
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heinrichsweikamp
parents:
diff changeset
855 PG4 ------> FMC_BA0
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
856 PG5 ------> FMC_BA1
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heinrichsweikamp
parents:
diff changeset
857 PG8 ------> FMC_SDCLK
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heinrichsweikamp
parents:
diff changeset
858 PD0 ------> FMC_D2
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heinrichsweikamp
parents:
diff changeset
859 PD1 ------> FMC_D3
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heinrichsweikamp
parents:
diff changeset
860 PG15 ------> FMC_SDNCAS
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
861 PE0 ------> FMC_NBL0
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
862 PE1 ------> FMC_NBL1
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heinrichsweikamp
parents:
diff changeset
863 */
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heinrichsweikamp
parents:
diff changeset
864 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
865 |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
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heinrichsweikamp
parents:
diff changeset
866 |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
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heinrichsweikamp
parents:
diff changeset
867
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heinrichsweikamp
parents:
diff changeset
868 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
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heinrichsweikamp
parents:
diff changeset
869
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heinrichsweikamp
parents:
diff changeset
870 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4
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heinrichsweikamp
parents:
diff changeset
871 |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15);
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heinrichsweikamp
parents:
diff changeset
872
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heinrichsweikamp
parents:
diff changeset
873 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
874 |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
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heinrichsweikamp
parents:
diff changeset
875 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
876
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heinrichsweikamp
parents:
diff changeset
877 HAL_GPIO_DeInit(GPIOH, GPIO_PIN_6|GPIO_PIN_7);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
878
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
879 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
880 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
881
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heinrichsweikamp
parents:
diff changeset
882 }
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heinrichsweikamp
parents:
diff changeset
883
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heinrichsweikamp
parents:
diff changeset
884 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){
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heinrichsweikamp
parents:
diff changeset
885 HAL_FMC_MspDeInit();
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heinrichsweikamp
parents:
diff changeset
886 }