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38
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1 /* File: startup_ARMCM4.S
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2 * Purpose: startup file for Cortex-M4 devices. Should use with
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3 * GCC for ARM Embedded Processors
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4 * Version: V1.3
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5 * Date: 08 Feb 2012
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6 *
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7 * Copyright (c) 2012, ARM Limited
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8 * All rights reserved.
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9 *
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10 * Redistribution and use in source and binary forms, with or without
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11 * modification, are permitted provided that the following conditions are met:
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12 * Redistributions of source code must retain the above copyright
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13 notice, this list of conditions and the following disclaimer.
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14 * Redistributions in binary form must reproduce the above copyright
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15 notice, this list of conditions and the following disclaimer in the
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16 documentation and/or other materials provided with the distribution.
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17 * Neither the name of the ARM Limited nor the
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18 names of its contributors may be used to endorse or promote products
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19 derived from this software without specific prior written permission.
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20 *
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21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
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25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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31 */
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32 .syntax unified
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33 .arch armv7-m
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34
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35 .section .stack
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36 .align 3
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37 #ifdef __STACK_SIZE
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38 .equ Stack_Size, __STACK_SIZE
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39 #else
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40 .equ Stack_Size, 0x400
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41 #endif
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42 .globl __StackTop
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43 .globl __StackLimit
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44 __StackLimit:
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45 .space Stack_Size
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46 .size __StackLimit, . - __StackLimit
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47 __StackTop:
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48 .size __StackTop, . - __StackTop
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49
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50 .section .heap
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51 .align 3
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52 #ifdef __HEAP_SIZE
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53 .equ Heap_Size, __HEAP_SIZE
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54 #else
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55 .equ Heap_Size, 0xC00
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56 #endif
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57 .globl __HeapBase
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58 .globl __HeapLimit
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59 __HeapBase:
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60 .if Heap_Size
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61 .space Heap_Size
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62 .endif
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63 .size __HeapBase, . - __HeapBase
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64 __HeapLimit:
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65 .size __HeapLimit, . - __HeapLimit
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66
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67 .section .isr_vector
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68 .align 2
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69 .globl __isr_vector
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70 __isr_vector:
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71 .long __StackTop /* Top of Stack */
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72 .long Reset_Handler /* Reset Handler */
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73 .long NMI_Handler /* NMI Handler */
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74 .long HardFault_Handler /* Hard Fault Handler */
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75 .long MemManage_Handler /* MPU Fault Handler */
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76 .long BusFault_Handler /* Bus Fault Handler */
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77 .long UsageFault_Handler /* Usage Fault Handler */
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78 .long 0 /* Reserved */
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79 .long 0 /* Reserved */
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80 .long 0 /* Reserved */
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81 .long 0 /* Reserved */
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82 .long SVC_Handler /* SVCall Handler */
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83 .long DebugMon_Handler /* Debug Monitor Handler */
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84 .long 0 /* Reserved */
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85 .long PendSV_Handler /* PendSV Handler */
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86 .long SysTick_Handler /* SysTick Handler */
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87
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88 // External Interrupts
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89 .long WWDG_IRQHandler // Window WatchDog
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90 .long PVD_IRQHandler // PVD through EXTI Line detection
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91 .long TAMP_STAMP_IRQHandler // Tamper and TimeStamps through the EXTI line
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92 .long RTC_WKUP_IRQHandler // RTC Wakeup through the EXTI line
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93 .long FLASH_IRQHandler // FLASH
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94 .long RCC_IRQHandler // RCC
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95 .long EXTI0_IRQHandler // EXTI Line0
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96 .long EXTI1_IRQHandler // EXTI Line1
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97 .long EXTI2_IRQHandler // EXTI Line2
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98 .long EXTI3_IRQHandler // EXTI Line3
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99 .long EXTI4_IRQHandler // EXTI Line4
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100 .long DMA1_Stream0_IRQHandler // DMA1 Stream 0
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101 .long DMA1_Stream1_IRQHandler // DMA1 Stream 1
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102 .long DMA1_Stream2_IRQHandler // DMA1 Stream 2
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103 .long DMA1_Stream3_IRQHandler // DMA1 Stream 3
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104 .long DMA1_Stream4_IRQHandler // DMA1 Stream 4
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105 .long DMA1_Stream5_IRQHandler // DMA1 Stream 5
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106 .long DMA1_Stream6_IRQHandler // DMA1 Stream 6
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107 .long ADC_IRQHandler // ADC1, ADC2 and ADC3s
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108 .long CAN1_TX_IRQHandler // CAN1 TX
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109 .long CAN1_RX0_IRQHandler // CAN1 RX0
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110 .long CAN1_RX1_IRQHandler // CAN1 RX1
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111 .long CAN1_SCE_IRQHandler // CAN1 SCE
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112 .long EXTI9_5_IRQHandler // External Line[9:5]s
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113 .long TIM1_BRK_TIM9_IRQHandler // TIM1 Break and TIM9
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114 .long TIM1_UP_TIM10_IRQHandler // TIM1 Update and TIM10
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115 .long TIM1_TRG_COM_TIM11_IRQHandler // TIM1 Trigger and Commutation and TIM11
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116 .long TIM1_CC_IRQHandler // TIM1 Capture Compare
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117 .long TIM2_IRQHandler // TIM2
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118 .long TIM3_IRQHandler // TIM3
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119 .long TIM4_IRQHandler // TIM4
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120 .long I2C1_EV_IRQHandler // I2C1 Event
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121 .long I2C1_ER_IRQHandler // I2C1 Error
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122 .long I2C2_EV_IRQHandler // I2C2 Event
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123 .long I2C2_ER_IRQHandler // I2C2 Error
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124 .long SPI1_IRQHandler // SPI1
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125 .long SPI2_IRQHandler // SPI2
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126 .long USART1_IRQHandler // USART1
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127 .long USART2_IRQHandler // USART2
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128 .long USART3_IRQHandler // USART3
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129 .long EXTI15_10_IRQHandler // External Line[15:10]s
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130 .long RTC_Alarm_IRQHandler // RTC Alarm (A and B) through EXTI Line
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131 .long OTG_FS_WKUP_IRQHandler // USB OTG FS Wakeup through EXTI line
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132 .long TIM8_BRK_TIM12_IRQHandler // TIM8 Break and TIM12
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133 .long TIM8_UP_TIM13_IRQHandler // TIM8 Update and TIM13
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134 .long TIM8_TRG_COM_TIM14_IRQHandler // TIM8 Trigger and Commutation and TIM14
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135 .long TIM8_CC_IRQHandler // TIM8 Capture Compare
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136 .long DMA1_Stream7_IRQHandler // DMA1 Stream7
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137 .long FSMC_IRQHandler // FSMC
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138 .long SDIO_IRQHandler // SDIO
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139 .long TIM5_IRQHandler // TIM5
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140 .long SPI3_IRQHandler // SPI3
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141 .long UART4_IRQHandler // UART4
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142 .long UART5_IRQHandler // UART5
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143 .long TIM6_DAC_IRQHandler // TIM6 and DAC1&2 underrun errors
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144 .long TIM7_IRQHandler // TIM7
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145 .long DMA2_Stream0_IRQHandler // DMA2 Stream 0
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146 .long DMA2_Stream1_IRQHandler // DMA2 Stream 1
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147 .long DMA2_Stream2_IRQHandler // DMA2 Stream 2
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148 .long DMA2_Stream3_IRQHandler // DMA2 Stream 3
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149 .long DMA2_Stream4_IRQHandler // DMA2 Stream 4
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150 .long ETH_IRQHandler // Ethernet
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151 .long ETH_WKUP_IRQHandler // Ethernet Wakeup through EXTI line
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152 .long CAN2_TX_IRQHandler // CAN2 TX
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153 .long CAN2_RX0_IRQHandler // CAN2 RX0
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154 .long CAN2_RX1_IRQHandler // CAN2 RX1
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155 .long CAN2_SCE_IRQHandler // CAN2 SCE
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156 .long OTG_FS_IRQHandler // USB OTG FS
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157 .long DMA2_Stream5_IRQHandler // DMA2 Stream 5
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158 .long DMA2_Stream6_IRQHandler // DMA2 Stream 6
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159 .long DMA2_Stream7_IRQHandler // DMA2 Stream 7
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160 .long USART6_IRQHandler // USART6
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161 .long I2C3_EV_IRQHandler // I2C3 event
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162 .long I2C3_ER_IRQHandler // I2C3 error
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163 .long OTG_HS_EP1_OUT_IRQHandler // USB OTG HS End Point 1 Out
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164 .long OTG_HS_EP1_IN_IRQHandler // USB OTG HS End Point 1 In
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165 .long OTG_HS_WKUP_IRQHandler // USB OTG HS Wakeup through EXTI
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166 .long OTG_HS_IRQHandler // USB OTG HS
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167 .long DCMI_IRQHandler // DCMI
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168 .long CRYP_IRQHandler // CRYP crypto
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169 .long HASH_RNG_IRQHandler // Hash and Rng
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170 .long FPU_IRQHandler // FPU
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171
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172 .size __isr_vector, . - __isr_vector
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173
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174 .text
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175 .thumb
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176 .thumb_func
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177 .align 2
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178 .globl Reset_Handler
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179 .type Reset_Handler, %function
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180 Reset_Handler:
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181 /* Loop to copy data from read only memory to RAM. The ranges
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182 * of copy from/to are specified by following symbols evaluated in
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183 * linker script.
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184 * __etext: End of code section, i.e., begin of data sections to copy from.
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185 * __data_start__/__data_end__: RAM address range that data should be
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186 * copied to. Both must be aligned to 4 bytes boundary. */
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187
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188 ldr r1, =__etext
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189 ldr r2, =__data_start__
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190 ldr r3, =__data_end__
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191
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192 #if 1
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193 /* Here are two copies of loop implemenations. First one favors code size
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194 * and the second one favors performance. Default uses the first one.
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195 * Change to "#if 0" to use the second one */
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196 .flash_to_ram_loop:
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197 cmp r2, r3
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198 ittt lt
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199 ldrlt r0, [r1], #4
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200 strlt r0, [r2], #4
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201 blt .flash_to_ram_loop
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202 #else
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203 subs r3, r2
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204 ble .flash_to_ram_loop_end
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205 .flash_to_ram_loop:
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206 subs r3, #4
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207 ldr r0, [r1, r3]
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208 str r0, [r2, r3]
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209 bgt .flash_to_ram_loop
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210 .flash_to_ram_loop_end:
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211 #endif
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212
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213 #ifndef __NO_SYSTEM_INIT
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214 ldr r0, =SystemInit
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215 blx r0
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216 #endif
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217
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218 ldr r0, =_start
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219 bx r0
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220 .pool
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221 .size Reset_Handler, . - Reset_Handler
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222
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223 /* Our weak _start alternative if we don't use the library _start
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224 * The zero init section must be cleared, otherwise the librtary is
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225 * doing that */
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226 .align 1
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227 .thumb_func
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228 .weak _start
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229 .type _start, %function
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230 _start:
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231
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232 /* Zero fill the bss segment. */
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233 ldr r1, = __bss_start__
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234 ldr r2, = __bss_end__
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235 movs r3, #0
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236 b .fill_zero_bss
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237 .loop_zero_bss:
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238 str r3, [r1], #4
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239
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240 .fill_zero_bss:
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241 cmp r1, r2
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242 bcc .loop_zero_bss
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243
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244 /* Jump to our main */
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245 bl main
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246 b .
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247 .size _start, . - _start
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248
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249 /* Macro to define default handlers. Default handler
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250 * will be weak symbol and just dead loops. They can be
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251 * overwritten by other handlers */
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252 .macro def_irq_handler handler_name
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253 .align 1
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254 .thumb_func
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255 .weak \handler_name
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256 .type \handler_name, %function
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257 \handler_name :
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258 b .
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259 .size \handler_name, . - \handler_name
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260 .endm
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261
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262 def_irq_handler NMI_Handler
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263 def_irq_handler HardFault_Handler
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264 def_irq_handler MemManage_Handler
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265 def_irq_handler BusFault_Handler
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266 def_irq_handler UsageFault_Handler
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267 def_irq_handler SVC_Handler
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268 def_irq_handler DebugMon_Handler
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269 def_irq_handler PendSV_Handler
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270 def_irq_handler SysTick_Handler
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271 def_irq_handler Default_Handler
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272
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273 // External Interrupts
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274 def_irq_handler WWDG_IRQHandler // Window WatchDog
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275 def_irq_handler PVD_IRQHandler // PVD through EXTI Line detection
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276 def_irq_handler TAMP_STAMP_IRQHandler // Tamper and TimeStamps through the EXTI line
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277 def_irq_handler RTC_WKUP_IRQHandler // RTC Wakeup through the EXTI line
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278 def_irq_handler FLASH_IRQHandler // FLASH
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279 def_irq_handler RCC_IRQHandler // RCC
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280 def_irq_handler EXTI0_IRQHandler // EXTI Line0
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281 def_irq_handler EXTI1_IRQHandler // EXTI Line1
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282 def_irq_handler EXTI2_IRQHandler // EXTI Line2
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283 def_irq_handler EXTI3_IRQHandler // EXTI Line3
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284 def_irq_handler EXTI4_IRQHandler // EXTI Line4
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285 def_irq_handler DMA1_Stream0_IRQHandler // DMA1 Stream 0
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286 def_irq_handler DMA1_Stream1_IRQHandler // DMA1 Stream 1
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287 def_irq_handler DMA1_Stream2_IRQHandler // DMA1 Stream 2
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288 def_irq_handler DMA1_Stream3_IRQHandler // DMA1 Stream 3
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289 def_irq_handler DMA1_Stream4_IRQHandler // DMA1 Stream 4
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290 def_irq_handler DMA1_Stream5_IRQHandler // DMA1 Stream 5
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291 def_irq_handler DMA1_Stream6_IRQHandler // DMA1 Stream 6
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292 def_irq_handler ADC_IRQHandler // ADC1, ADC2 and ADC3s
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293 def_irq_handler CAN1_TX_IRQHandler // CAN1 TX
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294 def_irq_handler CAN1_RX0_IRQHandler // CAN1 RX0
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295 def_irq_handler CAN1_RX1_IRQHandler // CAN1 RX1
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296 def_irq_handler CAN1_SCE_IRQHandler // CAN1 SCE
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297 def_irq_handler EXTI9_5_IRQHandler // External Line[9:5]s
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298 def_irq_handler TIM1_BRK_TIM9_IRQHandler // TIM1 Break and TIM9
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299 def_irq_handler TIM1_UP_TIM10_IRQHandler // TIM1 Update and TIM10
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300 def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler // TIM1 Trigger and Commutation and TIM11
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301 def_irq_handler TIM1_CC_IRQHandler // TIM1 Capture Compare
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302 def_irq_handler TIM2_IRQHandler // TIM2
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303 def_irq_handler TIM3_IRQHandler // TIM3
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304 def_irq_handler TIM4_IRQHandler // TIM4
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305 def_irq_handler I2C1_EV_IRQHandler // I2C1 Event
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306 def_irq_handler I2C1_ER_IRQHandler // I2C1 Error
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307 def_irq_handler I2C2_EV_IRQHandler // I2C2 Event
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308 def_irq_handler I2C2_ER_IRQHandler // I2C2 Error
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309 def_irq_handler SPI1_IRQHandler // SPI1
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310 def_irq_handler SPI2_IRQHandler // SPI2
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311 def_irq_handler USART1_IRQHandler // USART1
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312 def_irq_handler USART2_IRQHandler // USART2
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313 def_irq_handler USART3_IRQHandler // USART3
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314 def_irq_handler EXTI15_10_IRQHandler // External Line[15:10]s
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315 def_irq_handler RTC_Alarm_IRQHandler // RTC Alarm (A and B) through EXTI Line
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316 def_irq_handler OTG_FS_WKUP_IRQHandler // USB OTG FS Wakeup through EXTI line
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317 def_irq_handler TIM8_BRK_TIM12_IRQHandler // TIM8 Break and TIM12
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318 def_irq_handler TIM8_UP_TIM13_IRQHandler // TIM8 Update and TIM13
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319 def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler // TIM8 Trigger and Commutation and TIM14
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320 def_irq_handler TIM8_CC_IRQHandler // TIM8 Capture Compare
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321 def_irq_handler DMA1_Stream7_IRQHandler // DMA1 Stream7
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322 def_irq_handler FSMC_IRQHandler // FSMC
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323 def_irq_handler SDIO_IRQHandler // SDIO
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324 def_irq_handler TIM5_IRQHandler // TIM5
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325 def_irq_handler SPI3_IRQHandler // SPI3
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326 def_irq_handler UART4_IRQHandler // UART4
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327 def_irq_handler UART5_IRQHandler // UART5
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328 def_irq_handler TIM6_DAC_IRQHandler // TIM6 and DAC1&2 underrun errors
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329 def_irq_handler TIM7_IRQHandler // TIM7
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330 def_irq_handler DMA2_Stream0_IRQHandler // DMA2 Stream 0
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331 def_irq_handler DMA2_Stream1_IRQHandler // DMA2 Stream 1
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332 def_irq_handler DMA2_Stream2_IRQHandler // DMA2 Stream 2
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333 def_irq_handler DMA2_Stream3_IRQHandler // DMA2 Stream 3
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334 def_irq_handler DMA2_Stream4_IRQHandler // DMA2 Stream 4
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335 def_irq_handler ETH_IRQHandler // Ethernet
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336 def_irq_handler ETH_WKUP_IRQHandler // Ethernet Wakeup through EXTI line
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337 def_irq_handler CAN2_TX_IRQHandler // CAN2 TX
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338 def_irq_handler CAN2_RX0_IRQHandler // CAN2 RX0
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339 def_irq_handler CAN2_RX1_IRQHandler // CAN2 RX1
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340 def_irq_handler CAN2_SCE_IRQHandler // CAN2 SCE
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341 def_irq_handler OTG_FS_IRQHandler // USB OTG FS
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342 def_irq_handler DMA2_Stream5_IRQHandler // DMA2 Stream 5
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343 def_irq_handler DMA2_Stream6_IRQHandler // DMA2 Stream 6
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344 def_irq_handler DMA2_Stream7_IRQHandler // DMA2 Stream 7
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345 def_irq_handler USART6_IRQHandler // USART6
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346 def_irq_handler I2C3_EV_IRQHandler // I2C3 event
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347 def_irq_handler I2C3_ER_IRQHandler // I2C3 error
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348 def_irq_handler OTG_HS_EP1_OUT_IRQHandler // USB OTG HS End Point 1 Out
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349 def_irq_handler OTG_HS_EP1_IN_IRQHandler // USB OTG HS End Point 1 In
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350 def_irq_handler OTG_HS_WKUP_IRQHandler // USB OTG HS Wakeup through EXTI
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351 def_irq_handler OTG_HS_IRQHandler // USB OTG HS
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352 def_irq_handler DCMI_IRQHandler // DCMI
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353 def_irq_handler CRYP_IRQHandler // CRYP crypto
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354 def_irq_handler HASH_RNG_IRQHandler // Hash and Rng
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355 def_irq_handler FPU_IRQHandler // FPU
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356
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357 .end
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