|
38
|
1 /**
|
|
|
2 ******************************************************************************
|
|
|
3 * @file stm32f4xx_hal_nor.h
|
|
|
4 * @author MCD Application Team
|
|
|
5 * @version V1.2.0
|
|
|
6 * @date 26-December-2014
|
|
|
7 * @brief Header file of NOR HAL module.
|
|
|
8 ******************************************************************************
|
|
|
9 * @attention
|
|
|
10 *
|
|
|
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
|
|
12 *
|
|
|
13 * Redistribution and use in source and binary forms, with or without modification,
|
|
|
14 * are permitted provided that the following conditions are met:
|
|
|
15 * 1. Redistributions of source code must retain the above copyright notice,
|
|
|
16 * this list of conditions and the following disclaimer.
|
|
|
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
|
18 * this list of conditions and the following disclaimer in the documentation
|
|
|
19 * and/or other materials provided with the distribution.
|
|
|
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
|
21 * may be used to endorse or promote products derived from this software
|
|
|
22 * without specific prior written permission.
|
|
|
23 *
|
|
|
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
|
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
|
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
|
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
|
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
|
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
|
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
|
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
|
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
|
34 *
|
|
|
35 ******************************************************************************
|
|
|
36 */
|
|
|
37
|
|
|
38 /* Define to prevent recursive inclusion -------------------------------------*/
|
|
|
39 #ifndef __STM32F4xx_HAL_NOR_H
|
|
|
40 #define __STM32F4xx_HAL_NOR_H
|
|
|
41
|
|
|
42 #ifdef __cplusplus
|
|
|
43 extern "C" {
|
|
|
44 #endif
|
|
|
45
|
|
|
46 /* Includes ------------------------------------------------------------------*/
|
|
|
47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
|
|
|
48 #include "stm32f4xx_ll_fsmc.h"
|
|
|
49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
|
|
50
|
|
|
51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
|
52 #include "stm32f4xx_ll_fmc.h"
|
|
|
53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
|
54
|
|
|
55 /** @addtogroup STM32F4xx_HAL_Driver
|
|
|
56 * @{
|
|
|
57 */
|
|
|
58
|
|
|
59 /** @addtogroup NOR
|
|
|
60 * @{
|
|
|
61 */
|
|
|
62
|
|
|
63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
|
|
64 /* Exported typedef ----------------------------------------------------------*/
|
|
|
65 /** @defgroup NOR_Exported_Types NOR Exported Types
|
|
|
66 * @{
|
|
|
67 */
|
|
|
68
|
|
|
69 /**
|
|
|
70 * @brief HAL SRAM State structures definition
|
|
|
71 */
|
|
|
72 typedef enum
|
|
|
73 {
|
|
|
74 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
|
|
|
75 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
|
|
|
76 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
|
|
|
77 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
|
|
|
78 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
|
|
|
79 }HAL_NOR_StateTypeDef;
|
|
|
80
|
|
|
81 /**
|
|
|
82 * @brief FMC NOR Status typedef
|
|
|
83 */
|
|
|
84 typedef enum
|
|
|
85 {
|
|
|
86 HAL_NOR_STATUS_SUCCESS = 0,
|
|
|
87 HAL_NOR_STATUS_ONGOING,
|
|
|
88 HAL_NOR_STATUS_ERROR,
|
|
|
89 HAL_NOR_STATUS_TIMEOUT
|
|
|
90 }HAL_NOR_StatusTypeDef;
|
|
|
91
|
|
|
92 /**
|
|
|
93 * @brief FMC NOR ID typedef
|
|
|
94 */
|
|
|
95 typedef struct
|
|
|
96 {
|
|
|
97 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
|
|
|
98
|
|
|
99 uint16_t Device_Code1;
|
|
|
100
|
|
|
101 uint16_t Device_Code2;
|
|
|
102
|
|
|
103 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
|
|
|
104 These codes can be accessed by performing read operations with specific
|
|
|
105 control signals and addresses set.They can also be accessed by issuing
|
|
|
106 an Auto Select command */
|
|
|
107 }NOR_IDTypeDef;
|
|
|
108
|
|
|
109 /**
|
|
|
110 * @brief FMC NOR CFI typedef
|
|
|
111 */
|
|
|
112 typedef struct
|
|
|
113 {
|
|
|
114 /*!< Defines the information stored in the memory's Common flash interface
|
|
|
115 which contains a description of various electrical and timing parameters,
|
|
|
116 density information and functions supported by the memory */
|
|
|
117
|
|
|
118 uint16_t CFI_1;
|
|
|
119
|
|
|
120 uint16_t CFI_2;
|
|
|
121
|
|
|
122 uint16_t CFI_3;
|
|
|
123
|
|
|
124 uint16_t CFI_4;
|
|
|
125 }NOR_CFITypeDef;
|
|
|
126
|
|
|
127 /**
|
|
|
128 * @brief NOR handle Structure definition
|
|
|
129 */
|
|
|
130 typedef struct
|
|
|
131 {
|
|
|
132 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
|
|
|
133
|
|
|
134 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
|
|
|
135
|
|
|
136 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
|
|
|
137
|
|
|
138 HAL_LockTypeDef Lock; /*!< NOR locking object */
|
|
|
139
|
|
|
140 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
|
|
|
141
|
|
|
142 }NOR_HandleTypeDef;
|
|
|
143 /**
|
|
|
144 * @}
|
|
|
145 */
|
|
|
146
|
|
|
147 /* Exported constants --------------------------------------------------------*/
|
|
|
148 /* Exported macro ------------------------------------------------------------*/
|
|
|
149 /** @defgroup NOR_Exported_Macros NOR Exported Macros
|
|
|
150 * @{
|
|
|
151 */
|
|
|
152 /** @brief Reset NOR handle state
|
|
|
153 * @param __HANDLE__: specifies the NOR handle.
|
|
|
154 * @retval None
|
|
|
155 */
|
|
|
156 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
|
|
|
157 /**
|
|
|
158 * @}
|
|
|
159 */
|
|
|
160
|
|
|
161 /* Exported functions --------------------------------------------------------*/
|
|
|
162 /** @addtogroup NOR_Exported_Functions
|
|
|
163 * @{
|
|
|
164 */
|
|
|
165
|
|
|
166 /** @addtogroup NOR_Exported_Functions_Group1
|
|
|
167 * @{
|
|
|
168 */
|
|
|
169 /* Initialization/de-initialization functions ********************************/
|
|
|
170 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
|
|
|
171 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
|
|
|
172 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
|
|
|
173 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
|
|
|
174 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
|
|
|
175 /**
|
|
|
176 * @}
|
|
|
177 */
|
|
|
178
|
|
|
179 /** @addtogroup NOR_Exported_Functions_Group2
|
|
|
180 * @{
|
|
|
181 */
|
|
|
182 /* I/O operation functions ***************************************************/
|
|
|
183 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
|
|
|
184 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
|
|
|
185 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
|
|
|
186 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
|
|
|
187
|
|
|
188 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
|
|
|
189 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
|
|
|
190
|
|
|
191 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
|
|
|
192 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
|
|
|
193 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
|
|
|
194 /**
|
|
|
195 * @}
|
|
|
196 */
|
|
|
197
|
|
|
198 /** @addtogroup NOR_Exported_Functions_Group3
|
|
|
199 * @{
|
|
|
200 */
|
|
|
201 /* NOR Control functions *****************************************************/
|
|
|
202 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
|
|
|
203 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
|
|
|
204 /**
|
|
|
205 * @}
|
|
|
206 */
|
|
|
207
|
|
|
208 /** @addtogroup NOR_Exported_Functions_Group4
|
|
|
209 * @{
|
|
|
210 */
|
|
|
211 /* NOR State functions ********************************************************/
|
|
|
212 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
|
|
|
213 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
|
|
|
214 /**
|
|
|
215 * @}
|
|
|
216 */
|
|
|
217
|
|
|
218 /**
|
|
|
219 * @}
|
|
|
220 */
|
|
|
221
|
|
|
222 /* Private types -------------------------------------------------------------*/
|
|
|
223 /* Private variables ---------------------------------------------------------*/
|
|
|
224 /* Private constants ---------------------------------------------------------*/
|
|
|
225 /** @defgroup NOR_Private_Constants NOR Private Constants
|
|
|
226 * @{
|
|
|
227 */
|
|
|
228 /* NOR device IDs addresses */
|
|
|
229 #define MC_ADDRESS ((uint16_t)0x0000)
|
|
|
230 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
|
|
|
231 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
|
|
|
232 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
|
|
|
233
|
|
|
234 /* NOR CFI IDs addresses */
|
|
|
235 #define CFI1_ADDRESS ((uint16_t)0x61)
|
|
|
236 #define CFI2_ADDRESS ((uint16_t)0x62)
|
|
|
237 #define CFI3_ADDRESS ((uint16_t)0x63)
|
|
|
238 #define CFI4_ADDRESS ((uint16_t)0x64)
|
|
|
239
|
|
|
240 /* NOR operation wait timeout */
|
|
|
241 #define NOR_TMEOUT ((uint16_t)0xFFFF)
|
|
|
242
|
|
|
243 /* NOR memory data width */
|
|
|
244 #define NOR_MEMORY_8B ((uint8_t)0x0)
|
|
|
245 #define NOR_MEMORY_16B ((uint8_t)0x1)
|
|
|
246
|
|
|
247 /* NOR memory device read/write start address */
|
|
|
248 #define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000)
|
|
|
249 #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000)
|
|
|
250 #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000)
|
|
|
251 #define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000)
|
|
|
252 /**
|
|
|
253 * @}
|
|
|
254 */
|
|
|
255
|
|
|
256 /* Private macros ------------------------------------------------------------*/
|
|
|
257 /** @defgroup NOR_Private_Macros NOR Private Macros
|
|
|
258 * @{
|
|
|
259 */
|
|
|
260 /**
|
|
|
261 * @brief NOR memory address shifting.
|
|
|
262 * @param __NOR_ADDRESS__: NOR base address
|
|
|
263 * @param NOR_MEMORY_WIDTH: NOR memory width
|
|
|
264 * @param ADDRESS: NOR memory address
|
|
|
265 * @retval NOR shifted address value
|
|
|
266 */
|
|
|
267 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, NOR_MEMORY_WIDTH, ADDRESS) (((NOR_MEMORY_WIDTH) == NOR_MEMORY_8B)? ((uint32_t)((__NOR_ADDRESS__) + (2 * (ADDRESS)))):\
|
|
|
268 ((uint32_t)((__NOR_ADDRESS__) + (ADDRESS))))
|
|
|
269
|
|
|
270 /**
|
|
|
271 * @brief NOR memory write data to specified address.
|
|
|
272 * @param ADDRESS: NOR memory address
|
|
|
273 * @param DATA: Data to write
|
|
|
274 * @retval None
|
|
|
275 */
|
|
|
276 #define NOR_WRITE(ADDRESS, DATA) (*(__IO uint16_t *)((uint32_t)(ADDRESS)) = (DATA))
|
|
|
277
|
|
|
278 /**
|
|
|
279 * @}
|
|
|
280 */
|
|
|
281 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
|
282 /**
|
|
|
283 * @}
|
|
|
284 */
|
|
|
285
|
|
|
286 /**
|
|
|
287 * @}
|
|
|
288 */
|
|
|
289
|
|
|
290 #ifdef __cplusplus
|
|
|
291 }
|
|
|
292 #endif
|
|
|
293
|
|
|
294 #endif /* __STM32F4xx_HAL_NOR_H */
|
|
|
295
|
|
|
296 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
