annotate Documentations/dump-rte.cfg @ 277:580822b5d3d1 IPC_Sync_Improvment_3

Rework SPI error handling. SPI_Start_single_TxRx_with_Master evaluated the incoming data for a condition to send device instead of life data. In case of invalid input data this may cause unintended transmission of device data => now lifedata is send if incoming data is expected to be invalid The SPI timeout monitoring was done at the beginning of the mode loop. A timeout may have been detected even if meanwhile valid data was received (this is evaluated at x20ms) => Moved the timeout monitoring after the handling of incoming data
author ideenmodellierer
date Sun, 28 Apr 2019 10:16:38 +0200
parents 01cc5959f199
children
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1 #! openocd -f
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2 # Define the prob used:
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3 source [find interface/stlink-v2.cfg]
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4 set WORKAREASIZE 0x8000
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5 transport select hla_swd
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6
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7 # Reset options
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8 set ENABLE_LOW_POWER 1
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9 set STOP_WATCHDOG 1
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10 reset_config srst_only srst_nogate connect_assert_srst
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11
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12 # Seelct the right chip
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13 set CHIPNAME stm32f411RETx
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14 set CONNECT_UNDER_RESET 1
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15 source [find target/stm32f4x.cfg]
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16
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17 # Allow to continue execution after a connection:
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18 init_reset run
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19
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20 #puts "Flash banks:"
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21 #flash banks
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22
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23 #puts "Reading..."
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24 #flash dump_image CPU2-RTE-dump.hex 0x00000000 0x8000
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25
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26 #puts "Done."
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27 #exit