Mercurial > public > ostc4
annotate Small_CPU/Src/uart.c @ 916:4832981f9af8 Evo_2_23
External sensor UART: Switch to DMA TX transfers:
The previous version used polling tx function to transfer data. Because of the short command length of the protocols supported this was no big issue. New protocolls (like GNSS) have longer command sequence which have an impact to the program flow. That's why the implementation has been changed to DMA transmission.
author | Ideenmodellierer |
---|---|
date | Mon, 28 Oct 2024 20:34:58 +0100 |
parents | 9e2f9b91e827 |
children | f72613a152dd |
rev | line source |
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38 | 1 /** |
2 ****************************************************************************** | |
3 * @file uart.c | |
4 * @author heinrichs weikamp gmbh | |
5 * @version V0.0.1 | |
6 * @date 27-March-2014 | |
7 * @brief button control | |
8 * | |
9 @verbatim | |
10 ============================================================================== | |
11 ##### How to use ##### | |
12 ============================================================================== | |
13 @endverbatim | |
14 ****************************************************************************** | |
15 * @attention | |
16 * | |
17 * <h2><center>© COPYRIGHT(c) 2015 heinrichs weikamp</center></h2> | |
18 * | |
19 ****************************************************************************** | |
20 */ | |
21 /* Includes ------------------------------------------------------------------*/ | |
22 #include "uart.h" | |
794 | 23 #include "uartProtocol_O2.h" |
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24 #include "uartProtocol_Co2.h" |
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25 #include "uartProtocol_Sentinel.h" |
662 | 26 #include "externalInterface.h" |
27 #include "data_exchange.h" | |
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28 #include <string.h> /* memset */ |
38 | 29 |
889 | 30 |
38 | 31 /* Private variables ---------------------------------------------------------*/ |
32 | |
794 | 33 |
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34 |
781 | 35 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ |
36 #define CHUNKS_PER_BUFFER (5u) | |
794 | 37 |
889 | 38 |
662 | 39 |
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40 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart1_tx, hdma_usart6_rx, hdma_usart6_tx; |
38 | 41 |
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42 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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43 uint8_t txBuffer[CHUNK_SIZE]; /* tx uses less bytes */ |
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44 uint8_t txBufferQue[CHUNK_SIZE]; /* In MUX mode command may be send shortly after each other => allow q 1 entry que */ |
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45 uint8_t txBufferQueLen; |
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46 |
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47 uint8_t rxBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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48 uint8_t txBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
889 | 49 |
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50 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ |
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51 static uint8_t rxReadIndex; /* Index at which new data is stared */ |
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52 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */ |
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53 static uint8_t dmaRxActive; /* Indicator if DMA reception needs to be started */ |
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54 static uint8_t dmaTxActive; /* Indicator if DMA reception needs to be started */ |
794 | 55 |
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56 |
889 | 57 |
58 | |
38 | 59 /* Exported functions --------------------------------------------------------*/ |
60 | |
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61 void clearRxBuffer(void) |
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62 { |
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63 uint16_t index = 0; |
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64 do |
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65 { |
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66 rxBuffer[index++] = BUFFER_NODATA_LOW; |
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67 rxBuffer[index++] = BUFFER_NODATA_HIGH; |
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68 } while (index < sizeof(rxBuffer)); |
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69 } |
794 | 70 |
662 | 71 void MX_USART1_UART_Init(void) |
38 | 72 { |
662 | 73 /* regular init */ |
74 huart1.Instance = USART1; | |
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75 huart1.Init.BaudRate = 19200; |
662 | 76 huart1.Init.WordLength = UART_WORDLENGTH_8B; |
77 huart1.Init.StopBits = UART_STOPBITS_1; | |
78 huart1.Init.Parity = UART_PARITY_NONE; | |
79 huart1.Init.Mode = UART_MODE_TX_RX; | |
80 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
81 huart1.Init.OverSampling = UART_OVERSAMPLING_16; | |
82 | |
83 HAL_UART_Init(&huart1); | |
84 | |
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85 MX_USART1_DMA_Init(); |
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86 |
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87 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3); |
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88 HAL_NVIC_EnableIRQ(USART1_IRQn); |
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89 |
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90 clearRxBuffer(); |
662 | 91 rxReadIndex = 0; |
92 lastCmdIndex = 0; | |
93 rxWriteIndex = 0; | |
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94 dmaRxActive = 0; |
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95 dmaTxActive = 0; |
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96 txBufferQueLen = 0; |
662 | 97 } |
38 | 98 |
889 | 99 |
100 | |
662 | 101 void MX_USART1_UART_DeInit(void) |
102 { | |
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103 HAL_DMA_Abort(&hdma_usart1_rx); |
662 | 104 HAL_DMA_DeInit(&hdma_usart1_rx); |
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105 HAL_DMA_Abort(&hdma_usart1_tx); |
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106 HAL_DMA_DeInit(&hdma_usart1_tx); |
662 | 107 HAL_UART_DeInit(&huart1); |
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108 dmaRxActive = 0; |
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109 dmaTxActive = 0; |
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110 txBufferQueLen = 0; |
662 | 111 } |
112 | |
113 void MX_USART1_DMA_Init() | |
114 { | |
115 /* DMA controller clock enable */ | |
116 __DMA2_CLK_ENABLE(); | |
117 | |
118 /* Peripheral DMA init*/ | |
119 hdma_usart1_rx.Instance = DMA2_Stream5; | |
120 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; | |
121 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH; | |
122 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
123 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
124 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
125 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
126 hdma_usart1_rx.Init.Mode = DMA_NORMAL; | |
127 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; | |
128 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
129 HAL_DMA_Init(&hdma_usart1_rx); | |
130 | |
131 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | |
132 | |
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133 hdma_usart1_tx.Instance = DMA2_Stream7; |
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134 hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4; |
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135 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
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136 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; |
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137 hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; |
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138 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
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139 hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
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140 hdma_usart1_tx.Init.Mode = DMA_NORMAL; |
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141 hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; |
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142 hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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143 HAL_DMA_Init(&hdma_usart1_tx); |
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144 |
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145 __HAL_LINKDMA(&huart1,hdmatx,hdma_usart1_tx); |
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146 |
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147 |
662 | 148 /* DMA interrupt init */ |
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149 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 2, 2); |
662 | 150 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); |
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151 HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 1); |
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152 HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); |
38 | 153 } |
154 | |
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155 |
889 | 156 void GNSS_IO_init() { |
157 | |
158 GPIO_InitTypeDef GPIO_InitStruct = { 0 }; | |
159 /* Peripheral clock enable */ | |
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160 __HAL_RCC_USART6_CLK_ENABLE() |
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161 ; |
889 | 162 |
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163 __HAL_RCC_GPIOA_CLK_ENABLE() |
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164 ; |
889 | 165 /**USART6 GPIO Configuration |
166 PA11 ------> USART6_TX | |
167 PA12 ------> USART6_RX | |
168 */ | |
169 GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; | |
170 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
171 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
894 | 172 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; |
889 | 173 GPIO_InitStruct.Alternate = GPIO_AF8_USART6; |
174 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
175 | |
176 /* USART6 DMA Init */ | |
177 /* USART6_RX Init */ | |
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178 hdma_usart6_rx.Instance = DMA2_Stream1; |
889 | 179 hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; |
180 hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
181 hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
182 hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; | |
894 | 183 hdma_usart6_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
889 | 184 hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
185 hdma_usart6_rx.Init.Mode = DMA_NORMAL; | |
186 hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; | |
187 hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
188 HAL_DMA_Init(&hdma_usart6_rx); | |
189 | |
190 __HAL_LINKDMA(&huart6, hdmarx, hdma_usart6_rx); | |
191 | |
192 /* USART6_TX Init */ | |
193 hdma_usart6_tx.Instance = DMA2_Stream6; | |
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194 hdma_usart6_tx.Init.Channel = DMA_CHANNEL_6; |
889 | 195 hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
196 hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; | |
197 hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; | |
894 | 198 hdma_usart6_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
889 | 199 hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
200 hdma_usart6_tx.Init.Mode = DMA_NORMAL; | |
201 hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; | |
202 hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
203 HAL_DMA_Init(&hdma_usart6_tx); | |
204 | |
205 __HAL_LINKDMA(&huart6, hdmatx, hdma_usart6_tx); | |
206 | |
207 /* USART6 interrupt Init */ | |
208 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); | |
209 HAL_NVIC_EnableIRQ(USART6_IRQn); | |
210 | |
211 MX_USART6_DMA_Init(); | |
212 | |
213 } | |
214 | |
215 void MX_USART6_DMA_Init() { | |
216 /* DMA controller clock enable */ | |
217 __HAL_RCC_DMA2_CLK_ENABLE(); | |
218 | |
219 /* DMA interrupt init */ | |
220 /* DMA2_Stream2_IRQn interrupt configuration */ | |
221 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); | |
222 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); | |
223 /* DMA2_Stream6_IRQn interrupt configuration */ | |
224 HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); | |
225 HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); | |
226 } | |
227 | |
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228 |
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229 void MX_USART6_UART_DeInit(void) |
889 | 230 { |
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231 HAL_DMA_Abort(&hdma_usart6_rx); |
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232 HAL_DMA_DeInit(&hdma_usart6_rx); |
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233 HAL_DMA_Abort(&hdma_usart6_tx); |
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234 HAL_DMA_DeInit(&hdma_usart6_tx); |
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235 HAL_UART_DeInit(&huart6); |
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236 HAL_UART_DeInit(&huart6); |
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237 } |
889 | 238 |
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239 void MX_USART6_UART_Init(void) { |
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240 huart6.Instance = USART6; |
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241 huart6.Init.BaudRate = 9600; |
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242 huart6.Init.WordLength = UART_WORDLENGTH_8B; |
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243 huart6.Init.StopBits = UART_STOPBITS_1; |
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244 huart6.Init.Parity = UART_PARITY_NONE; |
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245 huart6.Init.Mode = UART_MODE_TX_RX; |
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246 huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; |
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247 huart6.Init.OverSampling = UART_OVERSAMPLING_16; |
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248 HAL_UART_Init(&huart6); |
889 | 249 } |
250 | |
794 | 251 void UART_MUX_SelectAddress(uint8_t muxAddress) |
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252 { |
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253 uint8_t indexstr[4]; |
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254 |
794 | 255 if(muxAddress <= MAX_MUX_CHANNEL) |
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256 { |
794 | 257 indexstr[0] = '~'; |
258 indexstr[1] = muxAddress; | |
259 indexstr[2] = 0x0D; | |
260 indexstr[3] = 0x0A; | |
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261 if(!dmaTxActive) |
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262 { |
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263 memcpy(txBuffer, indexstr, 4); |
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264 dmaTxActive = 0; |
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265 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,4)) |
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266 { |
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267 dmaTxActive = 1; |
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268 while(dmaTxActive) |
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269 { |
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270 HAL_Delay(1); |
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271 } |
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272 } |
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273 } |
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274 else |
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275 { |
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276 memcpy(txBufferQue, indexstr, 4); |
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277 txBufferQueLen = 4; |
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278 } |
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279 } |
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280 } |
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281 |
794 | 282 |
283 void UART_SendCmdString(uint8_t *cmdString) | |
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284 { |
794 | 285 uint8_t cmdLength = strlen((char*)cmdString); |
286 | |
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287 if(dmaTxActive == 0) |
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288 { |
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289 if(cmdLength < CHUNK_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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290 { |
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291 if(dmaRxActive == 0) |
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292 { |
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293 UART_StartDMA_Receiption(); |
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294 } |
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295 memcpy(txBuffer, cmdString, cmdLength); |
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296 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,cmdLength)) |
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297 { |
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298 dmaTxActive = 1; |
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299 } |
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300 } |
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301 } |
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302 else |
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303 { |
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304 memcpy(txBufferQue, cmdString, cmdLength); |
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305 txBufferQueLen = cmdLength; |
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306 } |
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307 } |
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308 |
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309 void UART_SendCmdUbx(uint8_t *cmd, uint8_t len) |
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310 { |
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311 if(len < CHUNK_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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312 { |
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313 if(dmaRxActive == 0) |
794 | 314 { |
315 UART_StartDMA_Receiption(); | |
316 } | |
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317 memcpy(txBuffer, cmd, len); |
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318 HAL_UART_Transmit_DMA(&huart1,txBuffer,len); |
794 | 319 } |
320 } | |
321 | |
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322 |
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323 void StringToInt(char *pstr, uint32_t *puInt32) |
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324 { |
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325 uint8_t index = 0; |
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326 uint32_t result = 0; |
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327 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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328 { |
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329 result *=10; |
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330 result += pstr[index] - '0'; |
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331 index++; |
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332 } |
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333 *puInt32 = result; |
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334 } |
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335 |
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336 void StringToUInt64(char *pstr, uint64_t *puint64) |
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337 { |
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338 uint8_t index = 0; |
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339 uint64_t result = 0; |
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340 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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341 { |
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342 result *=10; |
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343 result += pstr[index] - '0'; |
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344 index++; |
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345 } |
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346 *puint64 = result; |
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347 } |
662 | 348 |
742 | 349 void UART_StartDMA_Receiption() |
350 { | |
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351 if(dmaRxActive == 0) |
742 | 352 { |
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353 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE)) |
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354 { |
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355 dmaRxActive = 1; |
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356 } |
742 | 357 } |
358 } | |
690 | 359 |
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360 void UART_ChangeBaudrate(uint32_t newBaudrate) |
38 | 361 { |
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362 uint8_t dmaWasActive = dmaRxActive; |
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363 // HAL_DMA_Abort(&hdma_usart1_rx); |
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364 MX_USART1_UART_DeInit(); |
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365 //HAL_UART_Abort(&huart1); |
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366 //HAL_DMA_DeInit(&hdma_usart1_rx); |
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367 |
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368 |
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369 // huart1.Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq()/2, newBaudrate); |
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370 huart1.Init.BaudRate = newBaudrate; |
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371 HAL_UART_Init(&huart1); |
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372 MX_USART1_DMA_Init(); |
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373 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3); |
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374 HAL_NVIC_EnableIRQ(USART1_IRQn); |
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375 |
809 | 376 if(dmaWasActive) |
794 | 377 { |
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378 clearRxBuffer(); |
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379 rxReadIndex = 0; |
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380 rxWriteIndex = 0; |
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381 dmaRxActive = 0; |
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382 txBufferQueLen = 0; |
742 | 383 UART_StartDMA_Receiption(); |
662 | 384 } |
38 | 385 } |
690 | 386 |
662 | 387 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) |
38 | 388 { |
662 | 389 if(huart == &huart1) |
390 { | |
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391 dmaRxActive = 0; |
662 | 392 rxWriteIndex+=CHUNK_SIZE; |
393 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
394 { | |
395 rxWriteIndex = 0; | |
396 } | |
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397 if((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE) || (rxWriteIndex == rxReadIndex)) /* start next transfer if we did not catch up with read index */ |
662 | 398 { |
809 | 399 UART_StartDMA_Receiption(); |
662 | 400 } |
401 } | |
38 | 402 } |
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403 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) |
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404 { |
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405 if(huart == &huart1) |
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406 { |
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407 dmaTxActive = 0; |
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408 UART_WriteData(); |
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409 if(txBufferQueLen) |
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410 { |
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411 memcpy(txBuffer, txBufferQue, txBufferQueLen); |
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412 HAL_UART_Transmit_DMA(&huart1,txBuffer,txBufferQueLen); |
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413 dmaTxActive = 1; |
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414 txBufferQueLen = 0; |
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415 } |
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416 } |
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417 } |
38 | 418 |
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419 uint8_t isEndIndication(uint8_t index) |
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420 { |
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421 uint8_t ret = 0; |
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422 if(index % 2) |
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423 { |
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424 if(rxBuffer[index] == BUFFER_NODATA_HIGH) |
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425 { |
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426 ret = 1; |
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427 } |
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428 } |
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429 else |
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430 { |
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431 if(rxBuffer[index] == BUFFER_NODATA_LOW) |
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432 { |
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433 ret = 1; |
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434 } |
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435 } |
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436 |
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437 return ret; |
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438 } |
794 | 439 void UART_ReadData(uint8_t sensorType) |
440 { | |
441 uint8_t localRX = rxReadIndex; | |
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442 uint8_t futureIndex = rxReadIndex + 1; |
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443 uint8_t moreData = 0; |
38 | 444 |
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445 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
794 | 446 { |
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447 futureIndex = 0; |
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448 } |
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449 |
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450 if((!isEndIndication(localRX)) || (!isEndIndication(futureIndex))) do |
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451 { |
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452 while((!isEndIndication(localRX)) || (moreData)) |
794 | 453 { |
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454 moreData = 0; |
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455 switch (sensorType) |
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456 { |
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457 case SENSOR_MUX: |
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458 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]); |
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459 break; |
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460 #ifdef ENABLE_CO2_SUPPORT |
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461 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]); |
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462 break; |
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463 #endif |
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464 #ifdef ENABLE_GNSS_SUPPORT |
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465 case SENSOR_GNSS: uartGnss_ProcessData(rxBuffer[localRX]); |
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466 break; |
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467 #endif |
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468 #ifdef ENABLE_SENTINEL_MODE |
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469 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]); |
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470 break; |
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471 #endif |
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472 default: |
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473 break; |
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474 } |
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475 if(localRX % 2) |
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476 { |
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477 rxBuffer[localRX] = BUFFER_NODATA_HIGH; |
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478 } |
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479 else |
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480 { |
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481 rxBuffer[localRX] = BUFFER_NODATA_LOW; |
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482 } |
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483 |
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484 localRX++; |
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485 rxReadIndex++; |
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486 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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487 { |
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488 localRX = 0; |
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489 rxReadIndex = 0; |
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490 } |
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491 futureIndex++; |
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492 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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493 { |
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494 futureIndex = 0; |
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495 } |
794 | 496 } |
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497 if(!isEndIndication(futureIndex)) |
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498 { |
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499 moreData = 1; |
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500 } |
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501 } while(moreData); |
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502 } |
794 | 503 |
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504 void UART_WriteData(void) |
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505 { |
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506 if(huart1.hdmatx->State == HAL_DMA_STATE_READY) |
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507 { |
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508 huart1.gState = HAL_UART_STATE_READY; |
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509 dmaTxActive = 0; |
794 | 510 } |
511 } | |
512 | |
513 void UART_FlushRxBuffer(void) | |
514 { | |
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515 uint8_t futureIndex = rxReadIndex + 1; |
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516 |
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517 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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518 { |
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519 futureIndex = 0; |
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520 } |
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521 while((rxBuffer[rxReadIndex] != BUFFER_NODATA_LOW) && (rxBuffer[futureIndex] != BUFFER_NODATA_HIGH)) |
794 | 522 { |
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523 if(rxReadIndex % 2) |
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524 { |
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525 rxBuffer[rxReadIndex++] = BUFFER_NODATA_HIGH; |
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526 } |
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527 else |
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528 { |
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529 rxBuffer[rxReadIndex++] = BUFFER_NODATA_LOW; |
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530 } |
794 | 531 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
532 { | |
533 rxReadIndex = 0; | |
534 } | |
916
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535 futureIndex++; |
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536 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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537 { |
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538 futureIndex = 0; |
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539 } |
794 | 540 } |
541 } | |
662 | 542 |
861 | 543 uint8_t UART_isComActive(uint8_t sensorId) |
544 { | |
545 uint8_t active = 1; | |
809 | 546 |
861 | 547 uint8_t ComState = externalInterface_GetSensorState(sensorId + EXT_INTERFACE_MUX_OFFSET); |
548 | |
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549 if((ComState == UART_COMMON_INIT) || (ComState == UART_COMMON_IDLE) || (ComState == UART_COMMON_ERROR) || (ComState == COMMON_SENSOR_STATE_INVALID)) |
861 | 550 { |
551 active = 0; | |
552 } | |
553 return active; | |
554 } | |
809 | 555 |
38 | 556 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |