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1 ///////////////////////////////////////////////////////////////////////////////
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2 /// -*- coding: UTF-8 -*-
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3 ///
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4 /// \file Discovery/Inc/ostc_hw2.h
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5 /// \brief
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6 /// \author Heinrichs Weikamp
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7 /// \date 2018
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8 ///
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9 /// $Id$
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10 ///////////////////////////////////////////////////////////////////////////////
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11 /// \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh
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12 ///
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13 /// This program is free software: you can redistribute it and/or modify
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14 /// it under the terms of the GNU General Public License as published by
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15 /// the Free Software Foundation, either version 3 of the License, or
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16 /// (at your option) any later version.
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17 ///
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18 /// This program is distributed in the hope that it will be useful,
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19 /// but WITHOUT ANY WARRANTY; without even the implied warranty of
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20 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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21 /// GNU General Public License for more details.
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22 ///
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23 /// You should have received a copy of the GNU General Public License
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24 /// along with this program. If not, see <http://www.gnu.org/licenses/>.
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25 //////////////////////////////////////////////////////////////////////////////
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26
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27 /* Define to prevent recursive inclusion -------------------------------------*/
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28 #ifndef OSTC_HW2_H
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29 #define OSTC_HW2_H
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30
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31 #include "stm32f429xx.h"
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32
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33 /*
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34 #define DISPLAY_BACKLIGHT_PIN GPIO_PIN_7
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35 #define DISPLAY_BACKLIGHT_GPIO_PORT GPIOC
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36 #define DISPLAY_BACKLIGHT_GPIO_ENABLE() __GPIOC_CLK_ENABLE()
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37 */
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38 #define SMALL_BOARD_PCB9_AND_LATER
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39 #define TESTPIN
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40
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41 #define DISPLAY_RESETB_PIN GPIO_PIN_13
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42 #define DISPLAY_RESETB_GPIO_PORT GPIOC
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43 #define DISPLAY_RESETB_GPIO_ENABLE() __GPIOC_CLK_ENABLE()
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44
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45 #define DISPLAY_CSB_PIN GPIO_PIN_8
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46 #define DISPLAY_CSB_GPIO_PORT GPIOI
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47 #define DISPLAY_CSB_GPIO_ENABLE() __GPIOI_CLK_ENABLE()
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48
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49 #define VSYNC_IRQ_PIN GPIO_PIN_3
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50 #define VSYNC_IRQ_GPIO_PORT GPIOE
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51 #define VSYNC_IRQ_GPIO_ENABLE() __GPIOE_CLK_ENABLE()
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52 #define VSYNC_IRQ_EXTI_IRQn EXTI3_IRQn
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53
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54 #ifdef SMALL_BOARD_PCB9_AND_LATER
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55 #define BUTTON_BACK_PIN GPIO_PIN_0
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56 #define BUTTON_BACK_EXTI_IRQn EXTI0_IRQn
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57 #define BUTTON_BACK_GPIO_PORT GPIOB
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58 #define BUTTON_BACK_GPIO_ENABLE() __GPIOB_CLK_ENABLE()
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59
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60 #define BUTTON_ENTER_PIN GPIO_PIN_1
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61 #define BUTTON_ENTER_EXTI_IRQn EXTI1_IRQn
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62 #define BUTTON_ENTER_GPIO_PORT GPIOA
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63 #define BUTTON_ENTER_GPIO_ENABLE() __GPIOA_CLK_ENABLE()
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64
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65 #define BUTTON_NEXT_PIN GPIO_PIN_2
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66 #define BUTTON_NEXT_EXTI_IRQn EXTI2_IRQn
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67 #define BUTTON_NEXT_GPIO_PORT GPIOA
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68 #define BUTTON_NEXT_GPIO_ENABLE() __GPIOA_CLK_ENABLE()
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69 #else
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70 #define BUTTON_BACK_PIN GPIO_PIN_0
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71 #define BUTTON_BACK_EXTI_IRQn EXTI0_IRQn
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72 #define BUTTON_BACK_GPIO_PORT GPIOB
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73 #define BUTTON_BACK_GPIO_ENABLE() __GPIOB_CLK_ENABLE()
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74
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75 #define BUTTON_ENTER_PIN GPIO_PIN_4
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76 #define BUTTON_ENTER_EXTI_IRQn EXTI4_IRQn
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77 #define BUTTON_ENTER_GPIO_PORT GPIOH
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78 #define BUTTON_ENTER_GPIO_ENABLE() __GPIOH_CLK_ENABLE()
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79
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80 #define BUTTON_NEXT_PIN GPIO_PIN_2
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81 #define BUTTON_NEXT_EXTI_IRQn EXTI2_IRQn
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82 #define BUTTON_NEXT_GPIO_PORT GPIOA
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83 #define BUTTON_NEXT_GPIO_ENABLE() __GPIOA_CLK_ENABLE()
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84
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85 #define BUTTON_CUSTOM_PIN GPIO_PIN_1
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86 #define BUTTON_CUSTOM_EXTI_IRQn EXTI1_IRQn
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87 #define BUTTON_CUSTOM_GPIO_PORT GPIOA
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88 #define BUTTON_CUSTOM_GPIO_ENABLE() __GPIOA_CLK_ENABLE()
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89 #endif
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90
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91
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92 #ifdef TESTPIN
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93 #define TEST_PIN GPIO_PIN_4
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94 #define TEST_GPIO_PORT GPIOH
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95 #define TEST_GPIO_ENABLE() __GPIOH_CLK_ENABLE()
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96 #endif
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97
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98
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99 #define EXTFLASH_CSB_PIN GPIO_PIN_6
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100 #define EXTFLASH_CSB_GPIO_PORT GPIOF
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101 #define EXTFLASH_CSB_GPIO_ENABLE() __GPIOF_CLK_ENABLE()
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102
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103 #define OSCILLOSCOPE_PIN GPIO_PIN_3
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104 #define OSCILLOSCOPE_GPIO_PORT GPIOA
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105 #define OSCILLOSCOPE_GPIO_ENABLE() __GPIOA_CLK_ENABLE()
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106
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107 #define OSCILLOSCOPE2_PIN GPIO_PIN_11
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108 #define OSCILLOSCOPE2_GPIO_PORT GPIOB
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109 #define OSCILLOSCOPE2_GPIO_ENABLE() __GPIOB_CLK_ENABLE()
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110
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111 /* Bluetooth */
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112 #define BLE_NENABLE_PIN GPIO_PIN_7
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113 #define BLE_NENABLE_GPIO_PORT GPIOB
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114 #define BLE_NENABLE_GPIO_ENABLE() __GPIOB_CLK_ENABLE()
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115 /*
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116 #define BLE_NENABLE_PIN GPIO_PIN_11
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117 #define BLE_NENABLE_GPIO_PORT GPIOD
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118 #define BLE_NENABLE_GPIO_ENABLE() __GPIOD_CLK_ENABLE()
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119 */
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120 #define USARTx USART1
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121 #define USARTx_CLK_ENABLE() __USART1_CLK_ENABLE();
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122 #define USARTx_FORCE_RESET() __USART1_FORCE_RESET()
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123 #define USARTx_RELEASE_RESET() __USART1_RELEASE_RESET()
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124
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125 #define USARTx_TX_AF GPIO_AF7_USART1
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126 #define USARTx_TX_PIN GPIO_PIN_9
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127 #define USARTx_TX_GPIO_PORT GPIOA
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128 #define USARTx_TX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
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129
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130 #define USARTx_RX_AF GPIO_AF7_USART1
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131 #define USARTx_RX_PIN GPIO_PIN_10
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132 #define USARTx_RX_GPIO_PORT GPIOA
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133 #define USARTx_RX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
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134
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135 #define USARTx_CTS_AF GPIO_AF7_USART1
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136 #define USARTx_CTS_PIN GPIO_PIN_11
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137 #define USARTx_CTS_GPIO_PORT GPIOA
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138 #define USARTx_CTS_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
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139
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140 #define USARTx_RTS_AF GPIO_AF7_USART1
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141 #define USARTx_RTS_PIN GPIO_PIN_12
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142 #define USARTx_RTS_GPIO_PORT GPIOA
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143 #define USARTx_RTS_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
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144
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145 #define USARTx_IRQn USART1_IRQn
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146 // to it directly#define USARTx_IRQHandler USART1_IRQHandler
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147
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148 /*
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149 #define IR_HUD_ENABLE_PIN GPIO_PIN_7
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150 #define IR_HUD_ENABLE_GPIO_PORT GPIOD
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151 #define IR_HUD_ENABLE_GPIO_ENABLE() __GPIOD_CLK_ENABLE()
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152 */
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153
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154 #define USART_IR_HUD USART2
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155 #define USART_IR_HUD_CLK_ENABLE() __USART2_CLK_ENABLE();
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156 #define USART_IR_HUD_FORCE_RESET() __USART2_FORCE_RESET()
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157 #define USART_IR_HUD_RELEASE_RESET() __USART2_RELEASE_RESET()
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158 #define USART_IR_HUD_TX_AF GPIO_AF7_USART2
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159 #define USART_IR_HUD_TX_PIN GPIO_PIN_5
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160 #define USART_IR_HUD_TX_GPIO_PORT GPIOD
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161 #define USART_IR_HUD_TX_GPIO_CLK_ENABLE() __GPIOD_CLK_ENABLE()
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162
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163 #define USART_IR_HUD_RX_AF GPIO_AF7_USART2
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164 #define USART_IR_HUD_RX_PIN GPIO_PIN_6
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165 #define USART_IR_HUD_RX_GPIO_PORT GPIOD
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166 #define USART_IR_HUD_RX_GPIO_CLK_ENABLE() __GPIOD_CLK_ENABLE()
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167 #define USART_IR_HUD_IRQn USART2_IRQn
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168 // to it directly#define USART_IR_HUD_IRQHandler USART2_IRQHandler
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169
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170 #define TIMx TIM4
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171 #define TIMx_CLK_ENABLE __TIM4_CLK_ENABLE
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172 #define TIMx_IRQn TIM4_IRQn
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173 // to it directly #define TIMx_IRQHandler TIM4_IRQHandler
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174
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175 #define TIM_BACKLIGHT TIM3
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176 #define TIM_BACKLIGHT_CLK_ENABLE __TIM3_CLK_ENABLE
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177 #define TIM_BACKLIGHT_IRQn TIM3_IRQn
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178 #define TIM_BACKLIGHT_IRQHandler TIM3_IRQHandler
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179 #define TIM_BACKLIGHT_CHANNEL TIM_CHANNEL_2
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180 #define TIM_BACKLIGHT_PIN GPIO_PIN_7
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181 #define TIM_BACKLIGHT_GPIO_PORT GPIOC
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182 #define TIM_BACKLIGHT_GPIO_ENABLE() __GPIOC_CLK_ENABLE()
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183
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184 #define SMALLCPU_CSB_PIN GPIO_PIN_5
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185 #define SMALLCPU_CSB_GPIO_PORT GPIOC
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186 #define SMALLCPU_CSB_GPIO_ENABLE() __GPIOC_CLK_ENABLE()
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187
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188 #define SMALLCPU_BOOT0_PIN GPIO_PIN_9
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189 #define SMALLCPU_BOOT0_GPIO_PORT GPIOC
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190 #define SMALLCPU_BOOT0_GPIO_ENABLE() __GPIOC_CLK_ENABLE()
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191
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192 #define SMALLCPU_NRESET_PIN GPIO_PIN_8
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193 #define SMALLCPU_NRESET_GPIO_PORT GPIOC
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194 #define SMALLCPU_NRESET_GPIO_ENABLE() __GPIOC_CLK_ENABLE()
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195
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196 #define RESET_LOGIC_ALLES_OK_PIN GPIO_PIN_15
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197 #define RESET_LOGIC_ALLES_OK_GPIO_PORT GPIOB
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198 #define RESET_LOGIC_ALLES_OK_GPIO_ENABLE() __GPIOB_CLK_ENABLE()
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199
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200 #endif // OSTC_HW2_H
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