38
|
1 /**
|
|
2 ******************************************************************************
|
|
3 * @file stm32f4xx_hal_flash_ex.c
|
|
4 * @author MCD Application Team
|
|
5 * @version V1.2.0
|
|
6 * @date 26-December-2014
|
|
7 * @brief Extended FLASH HAL module driver.
|
|
8 * This file provides firmware functions to manage the following
|
|
9 * functionalities of the FLASH extension peripheral:
|
|
10 * + Extended programming operations functions
|
|
11 *
|
|
12 @verbatim
|
|
13 ==============================================================================
|
|
14 ##### Flash Extension features #####
|
|
15 ==============================================================================
|
|
16
|
|
17 [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
|
|
18 STM32F429xx/439xx devices contains the following additional features
|
|
19
|
|
20 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
|
|
21 capability (RWW)
|
|
22 (+) Dual bank memory organization
|
|
23 (+) PCROP protection for all banks
|
|
24
|
|
25 ##### How to use this driver #####
|
|
26 ==============================================================================
|
|
27 [..] This driver provides functions to configure and program the FLASH memory
|
|
28 of all STM32F427xx/437xx andSTM32F429xx/439xx devices. It includes
|
|
29 (#) FLASH Memory Erase functions:
|
|
30 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
|
|
31 HAL_FLASH_Lock() functions
|
|
32 (++) Erase function: Erase sector, erase all sectors
|
|
33 (++) There are two modes of erase :
|
|
34 (+++) Polling Mode using HAL_FLASHEx_Erase()
|
|
35 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
|
|
36
|
|
37 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
|
|
38 (++) Set/Reset the write protection
|
|
39 (++) Set the Read protection Level
|
|
40 (++) Set the BOR level
|
|
41 (++) Program the user Option Bytes
|
|
42 (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
|
|
43 (++) Extended space (bank 2) erase function
|
|
44 (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
|
|
45 (++) Dual Boot activation
|
|
46 (++) Write protection configuration for bank 2
|
|
47 (++) PCROP protection configuration and control for both banks
|
|
48
|
|
49 @endverbatim
|
|
50 ******************************************************************************
|
|
51 * @attention
|
|
52 *
|
|
53 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
|
54 *
|
|
55 * Redistribution and use in source and binary forms, with or without modification,
|
|
56 * are permitted provided that the following conditions are met:
|
|
57 * 1. Redistributions of source code must retain the above copyright notice,
|
|
58 * this list of conditions and the following disclaimer.
|
|
59 * 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
60 * this list of conditions and the following disclaimer in the documentation
|
|
61 * and/or other materials provided with the distribution.
|
|
62 * 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
63 * may be used to endorse or promote products derived from this software
|
|
64 * without specific prior written permission.
|
|
65 *
|
|
66 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
67 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
69 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
72 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
73 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
74 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
75 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
76 *
|
|
77 ******************************************************************************
|
|
78 */
|
|
79
|
|
80 /* Includes ------------------------------------------------------------------*/
|
|
81 #include "stm32f4xx_hal.h"
|
|
82
|
|
83 /** @addtogroup STM32F4xx_HAL_Driver
|
|
84 * @{
|
|
85 */
|
|
86
|
|
87 /** @defgroup FLASHEx FLASHEx
|
|
88 * @brief FLASH HAL Extension module driver
|
|
89 * @{
|
|
90 */
|
|
91
|
|
92 #ifdef HAL_FLASH_MODULE_ENABLED
|
|
93
|
|
94 /* Private typedef -----------------------------------------------------------*/
|
|
95 /* Private define ------------------------------------------------------------*/
|
|
96 /** @addtogroup FLASHEx_Private_Constants
|
|
97 * @{
|
|
98 */
|
|
99 #define SECTOR_MASK ((uint32_t)0xFFFFFF07)
|
|
100 #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
|
|
101 /**
|
|
102 * @}
|
|
103 */
|
|
104
|
|
105 /* Private macro -------------------------------------------------------------*/
|
|
106 /* Private variables ---------------------------------------------------------*/
|
|
107 /** @addtogroup FLASHEx_Private_Variables
|
|
108 * @{
|
|
109 */
|
|
110 extern FLASH_ProcessTypeDef pFlash;
|
|
111 /**
|
|
112 * @}
|
|
113 */
|
|
114
|
|
115 /* Private function prototypes -----------------------------------------------*/
|
|
116 /** @addtogroup FLASHEx_Private_Functions
|
|
117 * @{
|
|
118 */
|
|
119 /* Option bytes control */
|
|
120 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
|
|
121 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
|
|
122 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
|
|
123 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
|
|
124 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
|
|
125 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
|
|
126 static uint8_t FLASH_OB_GetUser(void);
|
|
127 static uint16_t FLASH_OB_GetWRP(void);
|
|
128 static FlagStatus FLASH_OB_GetRDP(void);
|
|
129 static uint8_t FLASH_OB_GetBOR(void);
|
|
130
|
|
131 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
132 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
|
|
133 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
|
|
134 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
135
|
|
136 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
137 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
|
|
138 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
|
|
139 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
|
|
140 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
141
|
|
142 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
|
|
143 /**
|
|
144 * @}
|
|
145 */
|
|
146
|
|
147 /* Exported functions --------------------------------------------------------*/
|
|
148 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
|
|
149 * @{
|
|
150 */
|
|
151
|
|
152 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
|
|
153 * @brief Extended IO operation functions
|
|
154 *
|
|
155 @verbatim
|
|
156 ===============================================================================
|
|
157 ##### Extended programming operation functions #####
|
|
158 ===============================================================================
|
|
159 [..]
|
|
160 This subsection provides a set of functions allowing to manage the Extension FLASH
|
|
161 programming operations Operations.
|
|
162
|
|
163 @endverbatim
|
|
164 * @{
|
|
165 */
|
|
166 /**
|
|
167 * @brief Perform a mass erase or erase the specified FLASH memory sectors
|
|
168 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
|
|
169 * contains the configuration information for the erasing.
|
|
170 *
|
|
171 * @param[out] SectorError: pointer to variable that
|
|
172 * contains the configuration information on faulty sector in case of error
|
|
173 * (0xFFFFFFFF means that all the sectors have been correctly erased)
|
|
174 *
|
|
175 * @retval HAL Status
|
|
176 */
|
|
177 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
|
|
178 {
|
|
179 HAL_StatusTypeDef status = HAL_ERROR;
|
|
180 uint32_t index = 0;
|
|
181
|
|
182 /* Process Locked */
|
|
183 __HAL_LOCK(&pFlash);
|
|
184
|
|
185 /* Check the parameters */
|
|
186 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
|
|
187
|
|
188 /* Wait for last operation to be completed */
|
|
189 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
190
|
|
191 if(status == HAL_OK)
|
|
192 {
|
|
193 /*Initialization of SectorError variable*/
|
|
194 *SectorError = 0xFFFFFFFF;
|
|
195
|
|
196 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
|
|
197 {
|
|
198 /*Mass erase to be done*/
|
|
199 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
|
|
200
|
|
201 /* Wait for last operation to be completed */
|
|
202 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
203
|
|
204 /* if the erase operation is completed, disable the MER Bit */
|
|
205 FLASH->CR &= (~FLASH_MER_BIT);
|
|
206 }
|
|
207 else
|
|
208 {
|
|
209 /* Check the parameters */
|
|
210 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
|
|
211
|
|
212 /* Erase by sector by sector to be done*/
|
|
213 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
|
|
214 {
|
|
215 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
|
|
216
|
|
217 /* Wait for last operation to be completed */
|
|
218 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
219
|
|
220 /* If the erase operation is completed, disable the SER Bit */
|
|
221 FLASH->CR &= (~FLASH_CR_SER);
|
|
222 FLASH->CR &= SECTOR_MASK;
|
|
223
|
|
224 if(status != HAL_OK)
|
|
225 {
|
|
226 /* In case of error, stop erase procedure and return the faulty sector*/
|
|
227 *SectorError = index;
|
|
228 break;
|
|
229 }
|
|
230 }
|
|
231 }
|
|
232 }
|
|
233
|
|
234 /* Process Unlocked */
|
|
235 __HAL_UNLOCK(&pFlash);
|
|
236
|
|
237 return status;
|
|
238 }
|
|
239
|
|
240 /**
|
|
241 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
|
|
242 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
|
|
243 * contains the configuration information for the erasing.
|
|
244 *
|
|
245 * @retval HAL Status
|
|
246 */
|
|
247 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
|
|
248 {
|
|
249 HAL_StatusTypeDef status = HAL_OK;
|
|
250
|
|
251 /* Process Locked */
|
|
252 __HAL_LOCK(&pFlash);
|
|
253
|
|
254 /* Check the parameters */
|
|
255 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
|
|
256
|
|
257 /* Enable End of FLASH Operation interrupt */
|
|
258 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
|
|
259
|
|
260 /* Enable Error source interrupt */
|
|
261 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
|
|
262
|
|
263 /* Clear pending flags (if any) */
|
|
264 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
|
|
265 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
|
|
266
|
|
267 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
|
|
268 {
|
|
269 /*Mass erase to be done*/
|
|
270 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
|
|
271 pFlash.Bank = pEraseInit->Banks;
|
|
272 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
|
|
273 }
|
|
274 else
|
|
275 {
|
|
276 /* Erase by sector to be done*/
|
|
277
|
|
278 /* Check the parameters */
|
|
279 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
|
|
280
|
|
281 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
|
|
282 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
|
|
283 pFlash.Sector = pEraseInit->Sector;
|
|
284 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
|
|
285
|
|
286 /*Erase 1st sector and wait for IT*/
|
|
287 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
|
|
288 }
|
|
289
|
|
290 return status;
|
|
291 }
|
|
292
|
|
293 /**
|
|
294 * @brief Program option bytes
|
|
295 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
|
|
296 * contains the configuration information for the programming.
|
|
297 *
|
|
298 * @retval HAL Status
|
|
299 */
|
|
300 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
|
|
301 {
|
|
302 HAL_StatusTypeDef status = HAL_ERROR;
|
|
303
|
|
304 /* Process Locked */
|
|
305 __HAL_LOCK(&pFlash);
|
|
306
|
|
307 /* Check the parameters */
|
|
308 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
|
|
309
|
|
310 /*Write protection configuration*/
|
|
311 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
|
|
312 {
|
|
313 assert_param(IS_WRPSTATE(pOBInit->WRPState));
|
|
314 if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
|
|
315 {
|
|
316 /*Enable of Write protection on the selected Sector*/
|
|
317 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
|
|
318 }
|
|
319 else
|
|
320 {
|
|
321 /*Disable of Write protection on the selected Sector*/
|
|
322 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
|
|
323 }
|
|
324 }
|
|
325
|
|
326 /*Read protection configuration*/
|
|
327 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
|
|
328 {
|
|
329 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
|
|
330 }
|
|
331
|
|
332 /*USER configuration*/
|
|
333 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
|
|
334 {
|
|
335 status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
|
|
336 pOBInit->USERConfig&OB_STOP_NO_RST,
|
|
337 pOBInit->USERConfig&OB_STDBY_NO_RST);
|
|
338 }
|
|
339
|
|
340 /*BOR Level configuration*/
|
|
341 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
|
|
342 {
|
|
343 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
|
|
344 }
|
|
345
|
|
346 /* Process Unlocked */
|
|
347 __HAL_UNLOCK(&pFlash);
|
|
348
|
|
349 return status;
|
|
350 }
|
|
351
|
|
352 /**
|
|
353 * @brief Get the Option byte configuration
|
|
354 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
|
|
355 * contains the configuration information for the programming.
|
|
356 *
|
|
357 * @retval None
|
|
358 */
|
|
359 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
|
|
360 {
|
|
361 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
|
|
362
|
|
363 /*Get WRP*/
|
|
364 pOBInit->WRPSector = FLASH_OB_GetWRP();
|
|
365
|
|
366 /*Get RDP Level*/
|
|
367 pOBInit->RDPLevel = FLASH_OB_GetRDP();
|
|
368
|
|
369 /*Get USER*/
|
|
370 pOBInit->USERConfig = FLASH_OB_GetUser();
|
|
371
|
|
372 /*Get BOR Level*/
|
|
373 pOBInit->BORLevel = FLASH_OB_GetBOR();
|
|
374 }
|
|
375
|
|
376 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
|
|
377 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
378 /**
|
|
379 * @brief Program option bytes
|
|
380 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
|
|
381 * contains the configuration information for the programming.
|
|
382 *
|
|
383 * @retval HAL Status
|
|
384 */
|
|
385 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
|
|
386 {
|
|
387 HAL_StatusTypeDef status = HAL_ERROR;
|
|
388
|
|
389 /* Check the parameters */
|
|
390 assert_param(IS_OBEX(pAdvOBInit->OptionType));
|
|
391
|
|
392 /*Program PCROP option byte*/
|
|
393 if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
|
|
394 {
|
|
395 /* Check the parameters */
|
|
396 assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
|
|
397 if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
|
|
398 {
|
|
399 /*Enable of Write protection on the selected Sector*/
|
|
400 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
401 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
|
|
402 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
403 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
|
|
404 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
405 }
|
|
406 else
|
|
407 {
|
|
408 /*Disable of Write protection on the selected Sector*/
|
|
409 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
410 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
|
|
411 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
412 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
|
|
413 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
414 }
|
|
415 }
|
|
416
|
|
417 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
418 /*Program BOOT config option byte*/
|
|
419 if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
|
|
420 {
|
|
421 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
|
|
422 }
|
|
423 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
424
|
|
425 return status;
|
|
426 }
|
|
427
|
|
428 /**
|
|
429 * @brief Get the OBEX byte configuration
|
|
430 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
|
|
431 * contains the configuration information for the programming.
|
|
432 *
|
|
433 * @retval None
|
|
434 */
|
|
435 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
|
|
436 {
|
|
437 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
438 /*Get Sector*/
|
|
439 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
|
440 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
|
|
441 /*Get Sector for Bank1*/
|
|
442 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
|
443
|
|
444 /*Get Sector for Bank2*/
|
|
445 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
|
446
|
|
447 /*Get Boot config OB*/
|
|
448 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
|
|
449 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
450 }
|
|
451
|
|
452 /**
|
|
453 * @brief Select the Protection Mode
|
|
454 *
|
|
455 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
|
|
456 * Global Read Out Protection modification (from level1 to level0)
|
|
457 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
|
|
458 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
|
|
459 * @note This function can be used only for STM32F427xx/STM32F429xx/STM32F437xx/STM32F439xx/STM32F401xx devices.
|
|
460 *
|
|
461 * @retval HAL Status
|
|
462 */
|
|
463 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
|
|
464 {
|
|
465 uint8_t optiontmp = 0xFF;
|
|
466
|
|
467 /* Mask SPRMOD bit */
|
|
468 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
|
|
469
|
|
470 /* Update Option Byte */
|
|
471 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
|
|
472
|
|
473 return HAL_OK;
|
|
474 }
|
|
475
|
|
476 /**
|
|
477 * @brief Deselect the Protection Mode
|
|
478 *
|
|
479 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
|
|
480 * Global Read Out Protection modification (from level1 to level0)
|
|
481 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
|
|
482 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
|
|
483 * @note This function can be used only for STM32F427xx/STM32F429xx/STM32F437xx/STM32F439xx/STM32F401xx devices.
|
|
484 *
|
|
485 * @retval HAL Status
|
|
486 */
|
|
487 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
|
|
488 {
|
|
489 uint8_t optiontmp = 0xFF;
|
|
490
|
|
491 /* Mask SPRMOD bit */
|
|
492 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
|
|
493
|
|
494 /* Update Option Byte */
|
|
495 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
|
|
496
|
|
497 return HAL_OK;
|
|
498 }
|
|
499 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
500
|
|
501 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
502 /**
|
|
503 * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
|
|
504 * @note This function can be used only for STM32F427X and STM32F429X devices.
|
|
505 * @retval The FLASH Write Protection Option Bytes value
|
|
506 */
|
|
507 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
|
|
508 {
|
|
509 /* Return the FLASH write protection Register value */
|
|
510 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
|
511 }
|
|
512 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
513
|
|
514 /**
|
|
515 * @}
|
|
516 */
|
|
517
|
|
518 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
|
519 /**
|
|
520 * @brief Full erase of FLASH memory sectors
|
|
521 * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
522 * This parameter can be one of the following values:
|
|
523 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
524 * the operation will be done by byte (8-bit)
|
|
525 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
526 * the operation will be done by half word (16-bit)
|
|
527 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
528 * the operation will be done by word (32-bit)
|
|
529 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
530 * the operation will be done by double word (64-bit)
|
|
531 *
|
|
532 * @param Banks: Banks to be erased
|
|
533 * This parameter can be one of the following values:
|
|
534 * @arg FLASH_BANK_1: Bank1 to be erased
|
|
535 * @arg FLASH_BANK_2: Bank2 to be erased
|
|
536 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
|
|
537 *
|
|
538 * @retval HAL Status
|
|
539 */
|
|
540 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
|
|
541 {
|
|
542 uint32_t tmp_psize = 0;
|
|
543
|
|
544 /* Check the parameters */
|
|
545 assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
546 assert_param(IS_FLASH_BANK(Banks));
|
|
547
|
|
548 /* if the previous operation is completed, proceed to erase all sectors */
|
|
549 FLASH->CR &= CR_PSIZE_MASK;
|
|
550 FLASH->CR |= tmp_psize;
|
|
551 if(Banks == FLASH_BANK_BOTH)
|
|
552 {
|
|
553 /* bank1 & bank2 will be erased*/
|
|
554 FLASH->CR |= FLASH_MER_BIT;
|
|
555 }
|
|
556 else if(Banks == FLASH_BANK_1)
|
|
557 {
|
|
558 /*Only bank1 will be erased*/
|
|
559 FLASH->CR |= FLASH_CR_MER1;
|
|
560 }
|
|
561 else
|
|
562 {
|
|
563 /*Only bank2 will be erased*/
|
|
564 FLASH->CR |= FLASH_CR_MER2;
|
|
565 }
|
|
566 FLASH->CR |= FLASH_CR_STRT;
|
|
567 }
|
|
568
|
|
569 /**
|
|
570 * @brief Erase the specified FLASH memory sector
|
|
571 * @param Sector: FLASH sector to erase
|
|
572 * The value of this parameter depend on device used within the same series
|
|
573 * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
574 * This parameter can be one of the following values:
|
|
575 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
576 * the operation will be done by byte (8-bit)
|
|
577 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
578 * the operation will be done by half word (16-bit)
|
|
579 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
580 * the operation will be done by word (32-bit)
|
|
581 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
582 * the operation will be done by double word (64-bit)
|
|
583 *
|
|
584 * @retval None
|
|
585 */
|
|
586 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
|
|
587 {
|
|
588 uint32_t tmp_psize = 0;
|
|
589
|
|
590 /* Check the parameters */
|
|
591 assert_param(IS_FLASH_SECTOR(Sector));
|
|
592 assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
593
|
|
594 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
|
|
595 {
|
|
596 tmp_psize = FLASH_PSIZE_BYTE;
|
|
597 }
|
|
598 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
|
|
599 {
|
|
600 tmp_psize = FLASH_PSIZE_HALF_WORD;
|
|
601 }
|
|
602 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
|
|
603 {
|
|
604 tmp_psize = FLASH_PSIZE_WORD;
|
|
605 }
|
|
606 else
|
|
607 {
|
|
608 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
|
609 }
|
|
610
|
|
611 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
|
|
612 if(Sector > FLASH_SECTOR_11)
|
|
613 {
|
|
614 Sector += 4;
|
|
615 }
|
|
616 /* If the previous operation is completed, proceed to erase the sector */
|
|
617 FLASH->CR &= CR_PSIZE_MASK;
|
|
618 FLASH->CR |= tmp_psize;
|
|
619 FLASH->CR &= SECTOR_MASK;
|
|
620 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
|
|
621 FLASH->CR |= FLASH_CR_STRT;
|
|
622 }
|
|
623
|
|
624 /**
|
|
625 * @brief Enable the write protection of the desired bank1 or bank 2 sectors
|
|
626 *
|
|
627 * @note When the memory read protection level is selected (RDP level = 1),
|
|
628 * it is not possible to program or erase the flash sector i if CortexM4
|
|
629 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
630 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
631 *
|
|
632 * @param WRPSector: specifies the sector(s) to be write protected.
|
|
633 * This parameter can be one of the following values:
|
|
634 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
|
|
635 * @arg OB_WRP_SECTOR_All
|
|
636 * @note BANK2 starts from OB_WRP_SECTOR_12
|
|
637 *
|
|
638 * @param Banks: Enable write protection on all the sectors for the specific bank
|
|
639 * This parameter can be one of the following values:
|
|
640 * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
641 * @arg FLASH_BANK_2: WRP on all sectors of bank2
|
|
642 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
|
643 *
|
|
644 * @retval HAL FLASH State
|
|
645 */
|
|
646 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
647 {
|
|
648 HAL_StatusTypeDef status = HAL_OK;
|
|
649
|
|
650 /* Check the parameters */
|
|
651 assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
652 assert_param(IS_FLASH_BANK(Banks));
|
|
653
|
|
654 /* Wait for last operation to be completed */
|
|
655 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
656
|
|
657 if(status == HAL_OK)
|
|
658 {
|
|
659 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
|
|
660 (WRPSector < OB_WRP_SECTOR_12))
|
|
661 {
|
|
662 if(WRPSector == OB_WRP_SECTOR_All)
|
|
663 {
|
|
664 /*Write protection on all sector of BANK1*/
|
|
665 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
|
666 }
|
|
667 else
|
|
668 {
|
|
669 /*Write protection done on sectors of BANK1*/
|
|
670 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
|
|
671 }
|
|
672 }
|
|
673 else
|
|
674 {
|
|
675 /*Write protection done on sectors of BANK2*/
|
|
676 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
|
677 }
|
|
678
|
|
679 /*Write protection on all sector of BANK2*/
|
|
680 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
|
|
681 {
|
|
682 /* Wait for last operation to be completed */
|
|
683 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
684
|
|
685 if(status == HAL_OK)
|
|
686 {
|
|
687 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
|
|
688 }
|
|
689 }
|
|
690
|
|
691 }
|
|
692 return status;
|
|
693 }
|
|
694
|
|
695 /**
|
|
696 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
|
|
697 *
|
|
698 * @note When the memory read protection level is selected (RDP level = 1),
|
|
699 * it is not possible to program or erase the flash sector i if CortexM4
|
|
700 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
701 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
702 *
|
|
703 * @param WRPSector: specifies the sector(s) to be write protected.
|
|
704 * This parameter can be one of the following values:
|
|
705 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
|
|
706 * @arg OB_WRP_Sector_All
|
|
707 * @note BANK2 starts from OB_WRP_SECTOR_12
|
|
708 *
|
|
709 * @param Banks: Disable write protection on all the sectors for the specific bank
|
|
710 * This parameter can be one of the following values:
|
|
711 * @arg FLASH_BANK_1: Bank1 to be erased
|
|
712 * @arg FLASH_BANK_2: Bank2 to be erased
|
|
713 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
|
|
714 *
|
|
715 * @retval HAL Status
|
|
716 */
|
|
717 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
718 {
|
|
719 HAL_StatusTypeDef status = HAL_OK;
|
|
720
|
|
721 /* Check the parameters */
|
|
722 assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
723 assert_param(IS_FLASH_BANK(Banks));
|
|
724
|
|
725 /* Wait for last operation to be completed */
|
|
726 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
727
|
|
728 if(status == HAL_OK)
|
|
729 {
|
|
730 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
|
|
731 (WRPSector < OB_WRP_SECTOR_12))
|
|
732 {
|
|
733 if(WRPSector == OB_WRP_SECTOR_All)
|
|
734 {
|
|
735 /*Write protection on all sector of BANK1*/
|
|
736 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
|
737 }
|
|
738 else
|
|
739 {
|
|
740 /*Write protection done on sectors of BANK1*/
|
|
741 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
|
|
742 }
|
|
743 }
|
|
744 else
|
|
745 {
|
|
746 /*Write protection done on sectors of BANK2*/
|
|
747 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
|
748 }
|
|
749
|
|
750 /*Write protection on all sector of BANK2*/
|
|
751 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
|
|
752 {
|
|
753 /* Wait for last operation to be completed */
|
|
754 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
755
|
|
756 if(status == HAL_OK)
|
|
757 {
|
|
758 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
|
|
759 }
|
|
760 }
|
|
761
|
|
762 }
|
|
763
|
|
764 return status;
|
|
765 }
|
|
766
|
|
767 /**
|
|
768 * @brief Configure the Dual Bank Boot.
|
|
769 *
|
|
770 * @note This function can be used only for STM32F42xxx/43xxx devices.
|
|
771 *
|
|
772 * @param BootConfig specifies the Dual Bank Boot Option byte.
|
|
773 * This parameter can be one of the following values:
|
|
774 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
|
|
775 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
|
|
776 * @retval None
|
|
777 */
|
|
778 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
|
|
779 {
|
|
780 HAL_StatusTypeDef status = HAL_OK;
|
|
781
|
|
782 /* Check the parameters */
|
|
783 assert_param(IS_OB_BOOT(BootConfig));
|
|
784
|
|
785 /* Wait for last operation to be completed */
|
|
786 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
787
|
|
788 if(status == HAL_OK)
|
|
789 {
|
|
790 /* Set Dual Bank Boot */
|
|
791 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
|
|
792 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
|
|
793 }
|
|
794
|
|
795 return status;
|
|
796 }
|
|
797
|
|
798 /**
|
|
799 * @brief Enable the read/write protection (PCROP) of the desired
|
|
800 * sectors of Bank 1 and/or Bank 2.
|
|
801 * @note This function can be used only for STM32F42xxx/43xxx devices.
|
|
802 * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
|
|
803 * This parameter can be one of the following values:
|
|
804 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
|
|
805 * @arg OB_PCROP_SECTOR__All
|
|
806 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
|
|
807 * This parameter can be one of the following values:
|
|
808 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
|
|
809 * @arg OB_PCROP_SECTOR__All
|
|
810 * @param Banks Enable PCROP protection on all the sectors for the specific bank
|
|
811 * This parameter can be one of the following values:
|
|
812 * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
813 * @arg FLASH_BANK_2: WRP on all sectors of bank2
|
|
814 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
|
815 *
|
|
816 * @retval HAL Status
|
|
817 */
|
|
818 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
|
|
819 {
|
|
820 HAL_StatusTypeDef status = HAL_OK;
|
|
821
|
|
822 assert_param(IS_FLASH_BANK(Banks));
|
|
823
|
|
824 /* Wait for last operation to be completed */
|
|
825 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
826
|
|
827 if(status == HAL_OK)
|
|
828 {
|
|
829 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
|
|
830 {
|
|
831 assert_param(IS_OB_PCROP(SectorBank1));
|
|
832 /*Write protection done on sectors of BANK1*/
|
|
833 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
|
|
834 }
|
|
835 else
|
|
836 {
|
|
837 assert_param(IS_OB_PCROP(SectorBank2));
|
|
838 /*Write protection done on sectors of BANK2*/
|
|
839 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
|
|
840 }
|
|
841
|
|
842 /*Write protection on all sector of BANK2*/
|
|
843 if(Banks == FLASH_BANK_BOTH)
|
|
844 {
|
|
845 assert_param(IS_OB_PCROP(SectorBank2));
|
|
846 /* Wait for last operation to be completed */
|
|
847 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
848
|
|
849 if(status == HAL_OK)
|
|
850 {
|
|
851 /*Write protection done on sectors of BANK2*/
|
|
852 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
|
|
853 }
|
|
854 }
|
|
855
|
|
856 }
|
|
857
|
|
858 return status;
|
|
859 }
|
|
860
|
|
861
|
|
862 /**
|
|
863 * @brief Disable the read/write protection (PCROP) of the desired
|
|
864 * sectors of Bank 1 and/or Bank 2.
|
|
865 * @note This function can be used only for STM32F42xxx/43xxx devices.
|
|
866 * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
|
|
867 * This parameter can be one of the following values:
|
|
868 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
|
|
869 * @arg OB_PCROP_SECTOR__All
|
|
870 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
|
|
871 * This parameter can be one of the following values:
|
|
872 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
|
|
873 * @arg OB_PCROP_SECTOR__All
|
|
874 * @param Banks Disable PCROP protection on all the sectors for the specific bank
|
|
875 * This parameter can be one of the following values:
|
|
876 * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
877 * @arg FLASH_BANK_2: WRP on all sectors of bank2
|
|
878 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
|
|
879 *
|
|
880 * @retval HAL Status
|
|
881 */
|
|
882 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
|
|
883 {
|
|
884 HAL_StatusTypeDef status = HAL_OK;
|
|
885
|
|
886 /* Check the parameters */
|
|
887 assert_param(IS_FLASH_BANK(Banks));
|
|
888
|
|
889 /* Wait for last operation to be completed */
|
|
890 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
891
|
|
892 if(status == HAL_OK)
|
|
893 {
|
|
894 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
|
|
895 {
|
|
896 assert_param(IS_OB_PCROP(SectorBank1));
|
|
897 /*Write protection done on sectors of BANK1*/
|
|
898 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
|
|
899 }
|
|
900 else
|
|
901 {
|
|
902 /*Write protection done on sectors of BANK2*/
|
|
903 assert_param(IS_OB_PCROP(SectorBank2));
|
|
904 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
|
|
905 }
|
|
906
|
|
907 /*Write protection on all sector of BANK2*/
|
|
908 if(Banks == FLASH_BANK_BOTH)
|
|
909 {
|
|
910 assert_param(IS_OB_PCROP(SectorBank2));
|
|
911 /* Wait for last operation to be completed */
|
|
912 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
913
|
|
914 if(status == HAL_OK)
|
|
915 {
|
|
916 /*Write protection done on sectors of BANK2*/
|
|
917 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
|
|
918 }
|
|
919 }
|
|
920
|
|
921 }
|
|
922
|
|
923 return status;
|
|
924
|
|
925 }
|
|
926
|
|
927 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
928
|
|
929 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
|
|
930 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
931 /**
|
|
932 * @brief Mass erase of FLASH memory
|
|
933 * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
934 * This parameter can be one of the following values:
|
|
935 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
936 * the operation will be done by byte (8-bit)
|
|
937 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
938 * the operation will be done by half word (16-bit)
|
|
939 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
940 * the operation will be done by word (32-bit)
|
|
941 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
942 * the operation will be done by double word (64-bit)
|
|
943 *
|
|
944 * @param Banks: Banks to be erased
|
|
945 * This parameter can be one of the following values:
|
|
946 * @arg FLASH_BANK_1: Bank1 to be erased
|
|
947 *
|
|
948 * @retval None
|
|
949 */
|
|
950 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
|
|
951 {
|
|
952 uint32_t tmp_psize = 0;
|
|
953
|
|
954 /* Check the parameters */
|
|
955 assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
956 assert_param(IS_FLASH_BANK(Banks));
|
|
957
|
|
958 /* If the previous operation is completed, proceed to erase all sectors */
|
|
959 FLASH->CR &= CR_PSIZE_MASK;
|
|
960 FLASH->CR |= tmp_psize;
|
|
961 FLASH->CR |= FLASH_CR_MER;
|
|
962 FLASH->CR |= FLASH_CR_STRT;
|
|
963 }
|
|
964
|
|
965 /**
|
|
966 * @brief Erase the specified FLASH memory sector
|
|
967 * @param Sector: FLASH sector to erase
|
|
968 * The value of this parameter depend on device used within the same series
|
|
969 * @param VoltageRange: The device voltage range which defines the erase parallelism.
|
|
970 * This parameter can be one of the following values:
|
|
971 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
|
|
972 * the operation will be done by byte (8-bit)
|
|
973 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
|
|
974 * the operation will be done by half word (16-bit)
|
|
975 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
|
|
976 * the operation will be done by word (32-bit)
|
|
977 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
|
|
978 * the operation will be done by double word (64-bit)
|
|
979 *
|
|
980 * @retval None
|
|
981 */
|
|
982 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
|
|
983 {
|
|
984 uint32_t tmp_psize = 0;
|
|
985
|
|
986 /* Check the parameters */
|
|
987 assert_param(IS_FLASH_SECTOR(Sector));
|
|
988 assert_param(IS_VOLTAGERANGE(VoltageRange));
|
|
989
|
|
990 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
|
|
991 {
|
|
992 tmp_psize = FLASH_PSIZE_BYTE;
|
|
993 }
|
|
994 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
|
|
995 {
|
|
996 tmp_psize = FLASH_PSIZE_HALF_WORD;
|
|
997 }
|
|
998 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
|
|
999 {
|
|
1000 tmp_psize = FLASH_PSIZE_WORD;
|
|
1001 }
|
|
1002 else
|
|
1003 {
|
|
1004 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
|
|
1005 }
|
|
1006
|
|
1007 /* If the previous operation is completed, proceed to erase the sector */
|
|
1008 FLASH->CR &= CR_PSIZE_MASK;
|
|
1009 FLASH->CR |= tmp_psize;
|
|
1010 FLASH->CR &= SECTOR_MASK;
|
|
1011 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
|
|
1012 FLASH->CR |= FLASH_CR_STRT;
|
|
1013 }
|
|
1014
|
|
1015 /**
|
|
1016 * @brief Enable the write protection of the desired bank 1 sectors
|
|
1017 *
|
|
1018 * @note When the memory read protection level is selected (RDP level = 1),
|
|
1019 * it is not possible to program or erase the flash sector i if CortexM4
|
|
1020 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
1021 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
1022 *
|
|
1023 * @param WRPSector: specifies the sector(s) to be write protected.
|
|
1024 * The value of this parameter depend on device used within the same series
|
|
1025 *
|
|
1026 * @param Banks: Enable write protection on all the sectors for the specific bank
|
|
1027 * This parameter can be one of the following values:
|
|
1028 * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
1029 *
|
|
1030 * @retval HAL Status
|
|
1031 */
|
|
1032 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
1033 {
|
|
1034 HAL_StatusTypeDef status = HAL_OK;
|
|
1035
|
|
1036 /* Check the parameters */
|
|
1037 assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
1038 assert_param(IS_FLASH_BANK(Banks));
|
|
1039
|
|
1040 /* Wait for last operation to be completed */
|
|
1041 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
1042
|
|
1043 if(status == HAL_OK)
|
|
1044 {
|
|
1045 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
|
|
1046 }
|
|
1047
|
|
1048 return status;
|
|
1049 }
|
|
1050
|
|
1051 /**
|
|
1052 * @brief Disable the write protection of the desired bank 1 sectors
|
|
1053 *
|
|
1054 * @note When the memory read protection level is selected (RDP level = 1),
|
|
1055 * it is not possible to program or erase the flash sector i if CortexM4
|
|
1056 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
|
1057 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
|
1058 *
|
|
1059 * @param WRPSector: specifies the sector(s) to be write protected.
|
|
1060 * The value of this parameter depend on device used within the same series
|
|
1061 *
|
|
1062 * @param Banks: Enable write protection on all the sectors for the specific bank
|
|
1063 * This parameter can be one of the following values:
|
|
1064 * @arg FLASH_BANK_1: WRP on all sectors of bank1
|
|
1065 *
|
|
1066 * @retval HAL Status
|
|
1067 */
|
|
1068 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
|
|
1069 {
|
|
1070 HAL_StatusTypeDef status = HAL_OK;
|
|
1071
|
|
1072 /* Check the parameters */
|
|
1073 assert_param(IS_OB_WRP_SECTOR(WRPSector));
|
|
1074 assert_param(IS_FLASH_BANK(Banks));
|
|
1075
|
|
1076 /* Wait for last operation to be completed */
|
|
1077 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
1078
|
|
1079 if(status == HAL_OK)
|
|
1080 {
|
|
1081 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
|
|
1082 }
|
|
1083
|
|
1084 return status;
|
|
1085 }
|
|
1086 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE */
|
|
1087
|
|
1088 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
1089 /**
|
|
1090 * @brief Enable the read/write protection (PCROP) of the desired sectors.
|
|
1091 * @note This function can be used only for STM32F401xx devices.
|
|
1092 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
|
|
1093 * This parameter can be one of the following values:
|
|
1094 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
|
|
1095 * @arg OB_PCROP_Sector_All
|
|
1096 * @retval HAL Status
|
|
1097 */
|
|
1098 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
|
|
1099 {
|
|
1100 HAL_StatusTypeDef status = HAL_OK;
|
|
1101
|
|
1102 /* Check the parameters */
|
|
1103 assert_param(IS_OB_PCROP(Sector));
|
|
1104
|
|
1105 /* Wait for last operation to be completed */
|
|
1106 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
1107
|
|
1108 if(status == HAL_OK)
|
|
1109 {
|
|
1110 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
|
|
1111 }
|
|
1112
|
|
1113 return status;
|
|
1114 }
|
|
1115
|
|
1116
|
|
1117 /**
|
|
1118 * @brief Disable the read/write protection (PCROP) of the desired sectors.
|
|
1119 * @note This function can be used only for STM32F401xx devices.
|
|
1120 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
|
|
1121 * This parameter can be one of the following values:
|
|
1122 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
|
|
1123 * @arg OB_PCROP_Sector_All
|
|
1124 * @retval HAL Status
|
|
1125 */
|
|
1126 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
|
|
1127 {
|
|
1128 HAL_StatusTypeDef status = HAL_OK;
|
|
1129
|
|
1130 /* Check the parameters */
|
|
1131 assert_param(IS_OB_PCROP(Sector));
|
|
1132
|
|
1133 /* Wait for last operation to be completed */
|
|
1134 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
1135
|
|
1136 if(status == HAL_OK)
|
|
1137 {
|
|
1138 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
|
|
1139 }
|
|
1140
|
|
1141 return status;
|
|
1142
|
|
1143 }
|
|
1144 #endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
1145
|
|
1146 /**
|
|
1147 * @brief Set the read protection level.
|
|
1148 * @param Level: specifies the read protection level.
|
|
1149 * This parameter can be one of the following values:
|
|
1150 * @arg OB_RDP_LEVEL_0: No protection
|
|
1151 * @arg OB_RDP_LEVEL_1: Read protection of the memory
|
|
1152 * @arg OB_RDP_LEVEL_2: Full chip protection
|
|
1153 *
|
|
1154 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
|
|
1155 *
|
|
1156 * @retval HAL Status
|
|
1157 */
|
|
1158 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
|
|
1159 {
|
|
1160 HAL_StatusTypeDef status = HAL_OK;
|
|
1161
|
|
1162 /* Check the parameters */
|
|
1163 assert_param(IS_OB_RDP_LEVEL(Level));
|
|
1164
|
|
1165 /* Wait for last operation to be completed */
|
|
1166 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
1167
|
|
1168 if(status == HAL_OK)
|
|
1169 {
|
|
1170 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
|
|
1171 }
|
|
1172
|
|
1173 return status;
|
|
1174 }
|
|
1175
|
|
1176 /**
|
|
1177 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
|
|
1178 * @param Iwdg: Selects the IWDG mode
|
|
1179 * This parameter can be one of the following values:
|
|
1180 * @arg OB_IWDG_SW: Software IWDG selected
|
|
1181 * @arg OB_IWDG_HW: Hardware IWDG selected
|
|
1182 * @param Stop: Reset event when entering STOP mode.
|
|
1183 * This parameter can be one of the following values:
|
|
1184 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
|
|
1185 * @arg OB_STOP_RST: Reset generated when entering in STOP
|
|
1186 * @param Stdby: Reset event when entering Standby mode.
|
|
1187 * This parameter can be one of the following values:
|
|
1188 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
|
|
1189 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
|
|
1190 * @retval HAL Status
|
|
1191 */
|
|
1192 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
|
|
1193 {
|
|
1194 uint8_t optiontmp = 0xFF;
|
|
1195 HAL_StatusTypeDef status = HAL_OK;
|
|
1196
|
|
1197 /* Check the parameters */
|
|
1198 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
|
|
1199 assert_param(IS_OB_STOP_SOURCE(Stop));
|
|
1200 assert_param(IS_OB_STDBY_SOURCE(Stdby));
|
|
1201
|
|
1202 /* Wait for last operation to be completed */
|
|
1203 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
|
|
1204
|
|
1205 if(status == HAL_OK)
|
|
1206 {
|
|
1207 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
|
|
1208 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
|
|
1209
|
|
1210 /* Update User Option Byte */
|
|
1211 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
|
|
1212 }
|
|
1213
|
|
1214 return status;
|
|
1215
|
|
1216 }
|
|
1217
|
|
1218 /**
|
|
1219 * @brief Set the BOR Level.
|
|
1220 * @param Level: specifies the Option Bytes BOR Reset Level.
|
|
1221 * This parameter can be one of the following values:
|
|
1222 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
|
1223 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
|
1224 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
|
1225 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
|
|
1226 * @retval HAL Status
|
|
1227 */
|
|
1228 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
|
|
1229 {
|
|
1230 /* Check the parameters */
|
|
1231 assert_param(IS_OB_BOR_LEVEL(Level));
|
|
1232
|
|
1233 /* Set the BOR Level */
|
|
1234 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
|
|
1235 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
|
|
1236
|
|
1237 return HAL_OK;
|
|
1238
|
|
1239 }
|
|
1240
|
|
1241 /**
|
|
1242 * @brief Return the FLASH User Option Byte value.
|
|
1243 * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
|
|
1244 * and RST_STDBY(Bit2).
|
|
1245 */
|
|
1246 static uint8_t FLASH_OB_GetUser(void)
|
|
1247 {
|
|
1248 /* Return the User Option Byte */
|
|
1249 return ((uint8_t)(FLASH->OPTCR & 0xE0));
|
|
1250 }
|
|
1251
|
|
1252 /**
|
|
1253 * @brief Return the FLASH Write Protection Option Bytes value.
|
|
1254 * @retval uint16_t FLASH Write Protection Option Bytes value
|
|
1255 */
|
|
1256 static uint16_t FLASH_OB_GetWRP(void)
|
|
1257 {
|
|
1258 /* Return the FLASH write protection Register value */
|
|
1259 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
|
1260 }
|
|
1261
|
|
1262 /**
|
|
1263 * @brief Returns the FLASH Read Protection level.
|
|
1264 * @retval FlagStatus FLASH Readout Protection Status:
|
|
1265 * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
|
|
1266 * - RESET, when OB_RDP_Level_0 is set
|
|
1267 */
|
|
1268 static FlagStatus FLASH_OB_GetRDP(void)
|
|
1269 {
|
|
1270 FlagStatus readstatus = RESET;
|
|
1271
|
|
1272 if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_LEVEL_0))
|
|
1273 {
|
|
1274 readstatus = SET;
|
|
1275 }
|
|
1276
|
|
1277 return readstatus;
|
|
1278 }
|
|
1279
|
|
1280 /**
|
|
1281 * @brief Returns the FLASH BOR level.
|
|
1282 * @retval uint8_t The FLASH BOR level:
|
|
1283 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
|
1284 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
|
1285 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
|
1286 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
|
|
1287 */
|
|
1288 static uint8_t FLASH_OB_GetBOR(void)
|
|
1289 {
|
|
1290 /* Return the FLASH BOR level */
|
|
1291 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
|
|
1292 }
|
|
1293
|
|
1294 /**
|
|
1295 * @}
|
|
1296 */
|
|
1297
|
|
1298 #endif /* HAL_FLASH_MODULE_ENABLED */
|
|
1299
|
|
1300 /**
|
|
1301 * @}
|
|
1302 */
|
|
1303
|
|
1304 /**
|
|
1305 * @}
|
|
1306 */
|
|
1307
|
|
1308 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|