Mercurial > public > ostc4
annotate Discovery/Src/stm32f4xx_hal_msp_hw2.c @ 837:18946846b95b Evo_2_23
Bugfixes and code cleanup for BF views:
BF views gauge and apnoe were using "dive computer" T3 view functions which caused some problem because these legacy views were not intended to work with customer view selection. A switch condition has been added to skip these kind of functions in case a design other T3 is in use.
Another potential problem was that there were two definitions for T3 and T7 views which were basically the same. If they wold not be the same the switching functionality wold not work properly. To avoid this problem in futur the arrays have been merged => the view are handled sing the (newer) cv_view arrays instead of the standard_views which were in used before the user could the views which should be shown.
| author | ideenmodellierer |
|---|---|
| date | Wed, 27 Dec 2023 19:37:17 +0100 |
| parents | 879709909dd6 |
| children |
| rev | line source |
|---|---|
| 38 | 1 /////////////////////////////////////////////////////////////////////////////// |
| 2 /// -*- coding: UTF-8 -*- | |
| 3 /// | |
| 4 /// \file Discovery/Src/stm32f4xx_hal_msp_hw2.c | |
| 5 /// \brief This file provides code for the MSP Initialization and de-Initialization codes. | |
| 6 /// \author Heinrichs Weikamp gmbh | |
| 7 /// \date 2018 | |
| 8 /// | |
| 9 /// \details | |
| 10 /// | |
| 11 /// $Id$ | |
| 12 /////////////////////////////////////////////////////////////////////////////// | |
| 13 /// \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh | |
| 14 /// | |
| 15 /// This program is free software: you can redistribute it and/or modify | |
| 16 /// it under the terms of the GNU General Public License as published by | |
| 17 /// the Free Software Foundation, either version 3 of the License, or | |
| 18 /// (at your option) any later version. | |
| 19 /// | |
| 20 /// This program is distributed in the hope that it will be useful, | |
| 21 /// but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 22 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 23 /// GNU General Public License for more details. | |
| 24 /// | |
| 25 /// You should have received a copy of the GNU General Public License | |
| 26 /// along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 27 /////////////////////////////////////////////////////////////////////////////// | |
| 28 /// \par Copyright (c) 2014 STMicroelectronics | |
| 29 /// | |
| 30 /// Redistribution and use in source and binary forms, with or without modification, | |
| 31 /// are permitted provided that the following conditions are met: | |
| 32 /// 1. Redistributions of source code must retain the above copyright notice, | |
| 33 /// this list of conditions and the following disclaimer. | |
| 34 /// 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 35 /// this list of conditions and the following disclaimer in the documentation | |
| 36 /// and/or other materials provided with the distribution. | |
| 37 /// 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 38 /// may be used to endorse or promote products derived from this software | |
| 39 /// without specific prior written permission. | |
| 40 /// | |
| 41 /// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 42 /// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 43 /// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 44 /// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 45 /// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 46 /// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 47 /// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 48 /// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 49 /// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 50 /// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 51 /////////////////////////////////////////////////////////////////////////////// | |
| 52 | |
| 53 /* Includes ------------------------------------------------------------------*/ | |
| 54 #include "stm32f4xx_hal.h" | |
| 55 #include "ostc.h" | |
| 56 | |
| 57 DMA_HandleTypeDef hdma_spi1_tx; | |
| 58 | |
| 59 DMA_HandleTypeDef hdma_spi1_rx; | |
| 60 | |
| 61 /** | |
| 62 * Initializes the Global MSP. | |
| 63 */ | |
| 64 void HAL_MspInit(void) | |
| 65 { | |
| 66 /* USER CODE BEGIN MspInit 0 */ | |
| 67 /* USER CODE END MspInit 0 */ | |
| 68 | |
| 69 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_2); | |
| 70 | |
| 71 /* System interrupt init*/ | |
| 72 /** SysTick_IRQn interrupt configuration | |
| 73 */ | |
| 74 HAL_NVIC_SetPriority(SysTick_IRQn, 1, 0); | |
| 75 | |
| 76 /* USER CODE BEGIN MspInit 1 */ | |
| 77 /* always set priority right */ | |
| 78 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_2); | |
| 79 /* USER CODE END MspInit 1 */ | |
| 80 } | |
| 81 | |
| 82 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d) | |
| 83 { | |
| 84 | |
| 85 if(hdma2d->Instance==DMA2D) | |
| 86 { | |
| 87 /* USER CODE BEGIN DMA2D_MspInit 0 */ | |
| 88 | |
| 89 /* USER CODE END DMA2D_MspInit 0 */ | |
| 90 /* Peripheral clock enable */ | |
| 91 __DMA2D_CLK_ENABLE(); | |
| 92 /* USER CODE BEGIN DMA2D_MspInit 1 */ | |
| 93 HAL_NVIC_SetPriority(DMA2D_IRQn, 1, 2); | |
| 94 HAL_NVIC_EnableIRQ(DMA2D_IRQn); | |
| 95 /* USER CODE END DMA2D_MspInit 1 */ | |
| 96 } | |
| 97 | |
| 98 } | |
| 99 | |
| 100 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d) | |
| 101 { | |
| 102 | |
| 103 if(hdma2d->Instance==DMA2D) | |
| 104 { | |
| 105 /* USER CODE BEGIN DMA2D_MspDeInit 0 */ | |
| 106 | |
| 107 /* USER CODE END DMA2D_MspDeInit 0 */ | |
| 108 /* Peripheral clock disable */ | |
| 109 __DMA2D_CLK_DISABLE(); | |
| 110 /* USER CODE BEGIN DMA2D_MspDeInit 1 */ | |
| 111 __DMA2D_RELEASE_RESET(); | |
| 112 /* USER CODE END DMA2D_MspDeInit 1 */ | |
| 113 } | |
| 114 | |
| 115 } | |
| 116 | |
| 117 void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc) | |
| 118 { | |
| 119 | |
| 120 GPIO_InitTypeDef GPIO_InitStruct; | |
| 121 if(hltdc->Instance==LTDC) | |
| 122 { | |
| 123 /* USER CODE BEGIN LTDC_MspInit 0 */ | |
| 124 __GPIOE_CLK_ENABLE(); | |
| 125 __GPIOF_CLK_ENABLE(); | |
| 126 __GPIOG_CLK_ENABLE(); | |
| 127 __GPIOH_CLK_ENABLE(); | |
| 128 __GPIOI_CLK_ENABLE(); | |
| 129 | |
| 130 /* USER CODE END LTDC_MspInit 0 */ | |
| 131 /* Peripheral clock enable */ | |
| 132 __LTDC_CLK_ENABLE(); | |
| 133 | |
| 134 /**LTDC GPIO Configuration | |
| 135 PE4 ------> LTDC_B0 | |
| 136 PE5 ------> LTDC_G0 | |
| 137 PE6 ------> LTDC_G1 | |
| 138 PI9 ------> LTDC_VSYNC | |
| 139 PI10 ------> LTDC_HSYNC | |
| 140 PF10 ------> LTDC_DE | |
| 141 PH2 ------> LTDC_R0 | |
| 142 PH3 ------> LTDC_R1 | |
| 143 PH8 ------> LTDC_R2 | |
| 144 PH9 ------> LTDC_R3 | |
| 145 PH10 ------> LTDC_R4 | |
| 146 PH11 ------> LTDC_R5 | |
| 147 PH12 ------> LTDC_R6 | |
| 148 PG6 ------> LTDC_R7 | |
| 149 PG7 ------> LTDC_CLK | |
| 150 PH13 ------> LTDC_G2 | |
| 151 PH14 ------> LTDC_G3 | |
| 152 PH15 ------> LTDC_G4 | |
| 153 PI0 ------> LTDC_G5 | |
| 154 PI1 ------> LTDC_G6 | |
| 155 PI2 ------> LTDC_G7 | |
| 156 PG10 ------> LTDC_B2 | |
| 157 PG11 ------> LTDC_B3 | |
| 158 PG12 ------> LTDC_B1 | |
| 159 PI4 ------> LTDC_B4 | |
| 160 PI5 ------> LTDC_B5 | |
| 161 PI6 ------> LTDC_B6 | |
| 162 PI7 ------> LTDC_B7 | |
| 163 */ | |
| 164 GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6; | |
| 165 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 166 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 167 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 168 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC; | |
| 169 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); | |
| 170 | |
| 171 GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1 | |
| 172 |GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6 | |
| 173 |GPIO_PIN_7; | |
| 174 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 175 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 176 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 177 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC; | |
| 178 HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); | |
| 179 | |
| 180 GPIO_InitStruct.Pin = GPIO_PIN_10; | |
| 181 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 182 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 183 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 184 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC; | |
| 185 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); | |
| 186 | |
| 187 GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_9 | |
| 188 |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13 | |
| 189 |GPIO_PIN_14|GPIO_PIN_15; | |
| 190 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 191 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 192 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 193 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC; | |
| 194 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); | |
| 195 | |
| 196 GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11 | |
| 197 |GPIO_PIN_12; | |
| 198 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 199 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 200 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 201 GPIO_InitStruct.Alternate = GPIO_AF14_LTDC; | |
| 202 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); | |
| 203 | |
| 204 /* USER CODE BEGIN LTDC_MspInit 1 */ | |
| 205 | |
| 206 /* USER CODE END LTDC_MspInit 1 */ | |
| 207 } | |
| 208 | |
| 209 } | |
| 210 | |
| 211 void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc) | |
| 212 { | |
| 213 | |
| 214 if(hltdc->Instance==LTDC) | |
| 215 { | |
| 216 /* USER CODE BEGIN LTDC_MspDeInit 0 */ | |
| 217 | |
| 218 /* USER CODE END LTDC_MspDeInit 0 */ | |
| 219 /* Peripheral clock disable */ | |
| 220 __LTDC_CLK_DISABLE(); | |
| 221 | |
| 222 /**LTDC GPIO Configuration | |
| 223 PE4 ------> LTDC_B0 | |
| 224 PE5 ------> LTDC_G0 | |
| 225 PE6 ------> LTDC_G1 | |
| 226 PI9 ------> LTDC_VSYNC | |
| 227 PI10 ------> LTDC_HSYNC | |
| 228 PF10 ------> LTDC_DE | |
| 229 PH2 ------> LTDC_R0 | |
| 230 PH3 ------> LTDC_R1 | |
| 231 PH8 ------> LTDC_R2 | |
| 232 PH9 ------> LTDC_R3 | |
| 233 PH10 ------> LTDC_R4 | |
| 234 PH11 ------> LTDC_R5 | |
| 235 PH12 ------> LTDC_R6 | |
| 236 PG6 ------> LTDC_R7 | |
| 237 PG7 ------> LTDC_CLK | |
| 238 PH13 ------> LTDC_G2 | |
| 239 PH14 ------> LTDC_G3 | |
| 240 PH15 ------> LTDC_G4 | |
| 241 PI0 ------> LTDC_G5 | |
| 242 PI1 ------> LTDC_G6 | |
| 243 PI2 ------> LTDC_G7 | |
| 244 PG10 ------> LTDC_B2 | |
| 245 PG11 ------> LTDC_B3 | |
| 246 PG12 ------> LTDC_B1 | |
| 247 PI4 ------> LTDC_B4 | |
| 248 PI5 ------> LTDC_B5 | |
| 249 PI6 ------> LTDC_B6 | |
| 250 PI7 ------> LTDC_B7 | |
| 251 */ | |
| 252 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6); | |
| 253 | |
| 254 HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1 | |
| 255 |GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6 | |
| 256 |GPIO_PIN_7); | |
| 257 | |
| 258 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_10); | |
| 259 | |
| 260 HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_9 | |
| 261 |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13 | |
| 262 |GPIO_PIN_14|GPIO_PIN_15); | |
| 263 | |
| 264 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11 | |
| 265 |GPIO_PIN_12); | |
| 266 | |
| 267 /* USER CODE BEGIN LTDC_MspDeInit 1 */ | |
| 268 __LTDC_RELEASE_RESET(); | |
| 269 | |
| 270 /* USER CODE END LTDC_MspDeInit 1 */ | |
| 271 } | |
| 272 | |
| 273 } | |
| 274 | |
| 275 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) | |
| 276 { | |
| 277 | |
| 278 GPIO_InitTypeDef GPIO_InitStruct; | |
| 279 if(hspi->Instance==SPI1) | |
| 280 { | |
| 281 /* USER CODE BEGIN SPI1_MspInit 0 */ | |
| 282 __GPIOA_CLK_ENABLE(); | |
| 283 __GPIOB_CLK_ENABLE(); | |
| 284 __DMA2_CLK_ENABLE(); | |
| 285 | |
| 286 /* USER CODE END SPI1_MspInit 0 */ | |
| 287 /* Peripheral clock enable */ | |
| 288 __SPI1_CLK_ENABLE(); | |
| 289 | |
| 290 /**SPI1 GPIO Configuration | |
| 291 alt: PA4 ------> SPI1_NSS, jetzt soft | |
| 292 PA5 ------> SPI1_SCK | |
| 293 alt: PA6 ------> SPI1_MISO | |
| 294 neu: PB4 ------> SPI1_MISO | |
| 295 PA7 ------> SPI1_MOSI | |
| 296 */ | |
| 297 // GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; | |
| 298 GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7; | |
| 299 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 300 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
|
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301 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */ |
| 38 | 302 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; |
| 303 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 304 GPIO_InitStruct.Pin = GPIO_PIN_4; | |
| 305 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 306 | |
| 307 /* Peripheral DMA init*/ | |
| 308 | |
| 309 hdma_spi1_tx.Instance = DMA2_Stream3; | |
| 310 hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3; | |
| 311 hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; | |
| 312 hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 313 hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE; | |
| 314 hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; | |
| 315 hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 316 hdma_spi1_tx.Init.Mode = DMA_NORMAL; | |
| 317 hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW; | |
| 318 hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 319 hdma_spi1_tx.Init.MemBurst = DMA_MBURST_INC4; | |
| 320 hdma_spi1_tx.Init.PeriphBurst = DMA_PBURST_INC4; | |
| 321 HAL_DMA_Init(&hdma_spi1_tx); | |
| 322 | |
| 323 __HAL_LINKDMA(hspi,hdmatx,hdma_spi1_tx); | |
| 324 | |
| 325 hdma_spi1_rx.Instance = DMA2_Stream0; | |
| 326 hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3; | |
| 327 hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
| 328 hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 329 hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
| 330 hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; | |
| 331 hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 332 hdma_spi1_rx.Init.Mode = DMA_NORMAL; | |
| 333 hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH; | |
| 334 hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 335 hdma_spi1_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; | |
| 336 | |
| 337 hdma_spi1_rx.Init.MemBurst = DMA_MBURST_INC4; | |
| 338 hdma_spi1_rx.Init.PeriphBurst = DMA_PBURST_INC4; | |
| 339 HAL_DMA_Init(&hdma_spi1_rx); | |
| 340 | |
| 341 __HAL_LINKDMA(hspi, hdmarx, hdma_spi1_rx); | |
| 342 | |
| 343 /*##-4- Configure the NVIC for DMA #########################################*/ | |
| 344 /* NVIC configuration for DMA transfer complete interrupt (SPI1_TX) */ | |
| 345 HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 0, 1); | |
| 346 HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); | |
| 347 | |
| 348 | |
| 349 /* NVIC configuration for DMA transfer complete interrupt (SPI1_RX) */ | |
| 350 HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); | |
| 351 HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); | |
| 352 | |
| 353 } | |
| 354 else if(hspi->Instance==SPI2) | |
| 355 { | |
| 356 /* USER CODE BEGIN SPI2_MspInit 0 */ | |
| 357 __GPIOB_CLK_ENABLE(); | |
| 358 | |
| 359 /* USER CODE END SPI2_MspInit 0 */ | |
| 360 /* Peripheral clock enable */ | |
| 361 __SPI2_CLK_ENABLE(); | |
| 362 | |
| 363 /**SPI2 GPIO Configuration | |
| 364 PB13 ------> SPI2_SCK | |
| 365 PB14 ------> SPI2_MISO | |
| 366 PB15 ------> SPI2_MOSI | |
| 367 */ | |
| 368 GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; | |
| 369 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 370 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 371 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 372 GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; | |
| 373 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); | |
| 374 | |
| 375 /* USER CODE BEGIN SPI2_MspInit 1 */ | |
| 376 | |
| 377 /* USER CODE END SPI2_MspInit 1 */ | |
| 378 } | |
| 379 else if(hspi->Instance==SPI5) | |
| 380 { | |
| 381 /* USER CODE BEGIN SPI5_MspInit 0 */ | |
| 382 __GPIOF_CLK_ENABLE(); | |
| 383 | |
| 384 /* USER CODE END SPI5_MspInit 0 */ | |
| 385 /* Peripheral clock enable */ | |
| 386 __SPI5_CLK_ENABLE(); | |
| 387 | |
| 388 /**SPI5 GPIO Configuration | |
| 389 PF7 ------> SPI5_SCK | |
| 390 PF8 ------> SPI5_MISO | |
| 391 PF9 ------> SPI5_MOSI | |
| 392 */ | |
| 393 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9; | |
| 394 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 395 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
|
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396 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; /* Decision is based on errata which recommends FAST for GPIO at 90Mhz */ |
| 38 | 397 GPIO_InitStruct.Alternate = GPIO_AF5_SPI5; |
| 398 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); | |
| 399 | |
| 400 /* USER CODE BEGIN SPI5_MspInit 1 */ | |
| 401 | |
| 402 /* USER CODE END SPI5_MspInit 1 */ | |
| 403 } | |
| 404 | |
| 405 } | |
| 406 | |
| 407 void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) | |
| 408 { | |
| 409 | |
| 410 if(hspi->Instance==SPI1) | |
| 411 { | |
| 412 /* USER CODE BEGIN SPI1_MspDeInit 0 */ | |
| 413 __SPI1_FORCE_RESET(); | |
| 414 __SPI1_RELEASE_RESET(); | |
| 415 | |
| 416 /* USER CODE END SPI1_MspDeInit 0 */ | |
| 417 /* Peripheral clock disable */ | |
| 418 __SPI1_CLK_DISABLE(); | |
| 419 | |
| 420 /**SPI1 GPIO Configuration | |
| 421 PA4 ------> SPI1_NSS | |
| 422 PA5 ------> SPI1_SCK | |
| 423 PA6 ------> SPI1_MISO | |
| 424 PA7 ------> SPI1_MOSI | |
| 425 */ | |
| 426 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); | |
| 427 | |
| 428 /* Peripheral DMA DeInit*/ | |
| 429 HAL_DMA_DeInit(hspi->hdmatx); | |
| 430 HAL_DMA_DeInit(hspi->hdmarx); | |
| 431 /* USER CODE BEGIN SPI1_MspDeInit 1 */ | |
| 432 | |
| 433 /* USER CODE END SPI1_MspDeInit 1 */ | |
| 434 } | |
| 435 else if(hspi->Instance==SPI2) | |
| 436 { | |
| 437 /* USER CODE BEGIN SPI2_MspDeInit 0 */ | |
| 438 | |
| 439 /* USER CODE END SPI2_MspDeInit 0 */ | |
| 440 /* Peripheral clock disable */ | |
| 441 __SPI2_CLK_DISABLE(); | |
| 442 | |
| 443 /**SPI2 GPIO Configuration | |
| 444 PB13 ------> SPI2_SCK | |
| 445 PB14 ------> SPI2_MISO | |
| 446 PB15 ------> SPI2_MOSI | |
| 447 */ | |
| 448 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15); | |
| 449 | |
| 450 /* USER CODE BEGIN SPI2_MspDeInit 1 */ | |
| 451 | |
| 452 /* USER CODE END SPI2_MspDeInit 1 */ | |
| 453 } | |
| 454 else if(hspi->Instance==SPI5) | |
| 455 { | |
| 456 /* USER CODE BEGIN SPI5_MspDeInit 0 */ | |
| 457 __SPI5_FORCE_RESET(); | |
| 458 __SPI5_RELEASE_RESET(); | |
| 459 | |
| 460 /* USER CODE END SPI5_MspDeInit 0 */ | |
| 461 /* Peripheral clock disable */ | |
| 462 __SPI5_CLK_DISABLE(); | |
| 463 | |
| 464 /**SPI5 GPIO Configuration | |
| 465 PF7 ------> SPI5_SCK | |
| 466 PF8 ------> SPI5_MISO | |
| 467 PF9 ------> SPI5_MOSI | |
| 468 */ | |
| 469 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9); | |
| 470 | |
| 471 /* USER CODE BEGIN SPI5_MspDeInit 1 */ | |
| 472 | |
| 473 /* USER CODE END SPI5_MspDeInit 1 */ | |
| 474 } | |
| 475 | |
| 476 } | |
| 477 | |
| 478 void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) | |
| 479 { | |
| 480 GPIO_InitTypeDef GPIO_InitStruct; | |
| 481 if(htim_pwm->Instance==TIM_BACKLIGHT) | |
| 482 { | |
| 483 TIM_BACKLIGHT_GPIO_ENABLE(); | |
| 484 TIM_BACKLIGHT_CLK_ENABLE(); | |
| 485 | |
| 486 GPIO_InitStruct.Pin = TIM_BACKLIGHT_PIN; | |
| 487 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 488 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 489 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 490 GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; | |
| 491 HAL_GPIO_Init(TIM_BACKLIGHT_GPIO_PORT, &GPIO_InitStruct); | |
| 492 } | |
| 493 | |
| 494 } | |
| 495 | |
| 496 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) | |
| 497 { | |
| 498 if(htim_base->Instance==TIMx) | |
| 499 { | |
| 500 TIMx_CLK_ENABLE(); | |
| 501 | |
| 502 HAL_NVIC_SetPriority(TIMx_IRQn, 2, 1); | |
| 503 HAL_NVIC_EnableIRQ(TIMx_IRQn); | |
| 504 } | |
|
130
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505 #ifdef DEMOMODE |
| 38 | 506 if(htim_base->Instance==TIM7) |
| 507 { | |
| 508 __TIM7_CLK_ENABLE(); | |
| 509 | |
| 510 HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0); | |
| 511 HAL_NVIC_EnableIRQ(TIM7_IRQn); | |
| 512 } | |
|
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513 #endif |
| 38 | 514 } |
| 515 | |
| 516 void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) | |
| 517 { | |
| 518 | |
| 519 if(htim_pwm->Instance==TIM2) | |
| 520 { | |
| 521 /* USER CODE BEGIN TIM2_MspDeInit 0 */ | |
| 522 | |
| 523 /* USER CODE END TIM2_MspDeInit 0 */ | |
| 524 /* Peripheral clock disable */ | |
| 525 __TIM2_CLK_DISABLE(); | |
| 526 | |
| 527 /**TIM2 GPIO Configuration | |
| 528 PA15 ------> TIM2_CH1 | |
| 529 */ | |
| 530 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_15); | |
| 531 | |
| 532 /* USER CODE BEGIN TIM2_MspDeInit 1 */ | |
| 533 | |
| 534 /* USER CODE END TIM2_MspDeInit 1 */ | |
| 535 } | |
| 536 | |
| 537 } | |
| 538 | |
| 539 void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) | |
| 540 { | |
| 541 | |
| 542 if(htim_base->Instance==TIM3) | |
| 543 { | |
| 544 /* USER CODE BEGIN TIM3_MspDeInit 0 */ | |
| 545 | |
| 546 /* USER CODE END TIM3_MspDeInit 0 */ | |
| 547 /* Peripheral clock disable */ | |
| 548 __TIM3_CLK_DISABLE(); | |
| 549 | |
| 550 /**TIM3 GPIO Configuration | |
| 551 PC7 ------> TIM3_CH2 | |
| 552 */ | |
| 553 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_7); | |
| 554 | |
| 555 /* USER CODE BEGIN TIM3_MspDeInit 1 */ | |
| 556 | |
| 557 /* USER CODE END TIM3_MspDeInit 1 */ | |
| 558 } | |
| 559 | |
| 560 } | |
| 561 | |
| 562 void HAL_UART_MspInit(UART_HandleTypeDef* huart) | |
| 563 { | |
| 564 | |
| 565 GPIO_InitTypeDef GPIO_InitStruct; | |
| 566 if(huart->Instance==USART1) | |
| 567 { | |
| 568 /* USER CODE BEGIN USART1_MspInit 0 */ | |
| 569 __GPIOA_CLK_ENABLE(); | |
| 570 | |
| 571 /* USER CODE END USART1_MspInit 0 */ | |
| 572 /* Peripheral clock enable */ | |
| 573 __USART1_CLK_ENABLE(); | |
| 574 | |
| 575 /**USART1 GPIO Configuration | |
| 576 PA9 ------> USART1_TX | |
| 577 PA10 ------> USART1_RX | |
| 578 PA11 ------> USART1_CTS | |
| 579 PA12 ------> USART1_RTS | |
| 580 */ | |
| 581 GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; | |
| 582 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 583 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
| 584 GPIO_InitStruct.Speed = GPIO_SPEED_FAST;//GPIO_SPEED_LOW; | |
| 585 GPIO_InitStruct.Alternate = GPIO_AF7_USART1; | |
| 586 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 587 | |
| 393 | 588 #ifdef USARTx_CTS_PIN /* config control flow pins */ |
| 589 GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; | |
| 590 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 591 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 592 #endif | |
| 593 | |
| 38 | 594 HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); |
| 595 HAL_NVIC_EnableIRQ(USART1_IRQn); | |
| 596 } | |
| 597 #ifdef USART_IR_HUD | |
| 598 else if(huart->Instance==USART_IR_HUD) /* USART2 */ | |
| 599 { | |
| 600 USART_IR_HUD_CLK_ENABLE(); | |
| 601 USART_IR_HUD_TX_GPIO_CLK_ENABLE(); | |
| 602 USART_IR_HUD_RX_GPIO_CLK_ENABLE(); | |
| 603 | |
| 604 /**USART2 GPIO Configuration | |
| 605 PD5 ------> USART2_TX | |
| 606 PD6 ------> USART2_RX | |
| 607 */ | |
| 608 | |
| 609 GPIO_InitStruct.Pin = USART_IR_HUD_TX_PIN; | |
| 610 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 611 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
| 612 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 613 GPIO_InitStruct.Alternate = USART_IR_HUD_TX_AF; | |
| 614 HAL_GPIO_Init(USART_IR_HUD_TX_GPIO_PORT, &GPIO_InitStruct); | |
| 615 | |
| 616 GPIO_InitStruct.Pin = USART_IR_HUD_RX_PIN; | |
| 617 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 618 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
| 619 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 620 GPIO_InitStruct.Alternate = USART_IR_HUD_RX_AF; | |
| 621 HAL_GPIO_Init(USART_IR_HUD_RX_GPIO_PORT, &GPIO_InitStruct); | |
| 622 | |
| 623 HAL_NVIC_SetPriority(USART_IR_HUD_IRQn, 0, 1); | |
| 624 HAL_NVIC_EnableIRQ(USART_IR_HUD_IRQn); | |
| 625 } | |
| 626 #endif | |
| 627 else if(huart->Instance==USART3) | |
| 628 { | |
| 629 /* USER CODE BEGIN USART3_MspInit 0 */ | |
| 630 | |
| 631 /* USER CODE END USART3_MspInit 0 */ | |
| 632 /* Peripheral clock enable */ | |
| 633 __USART3_CLK_ENABLE(); | |
| 634 | |
| 635 /**USART3 GPIO Configuration | |
| 636 PC10 ------> USART3_TX | |
| 637 PC11 ------> USART3_RX | |
| 638 */ | |
| 639 GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; | |
| 640 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 641 GPIO_InitStruct.Pull = GPIO_PULLUP; | |
| 642 GPIO_InitStruct.Speed = GPIO_SPEED_LOW; | |
| 643 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; | |
| 644 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); | |
| 645 | |
| 646 /* USER CODE BEGIN USART3_MspInit 1 */ | |
| 647 | |
| 648 /* USER CODE END USART3_MspInit 1 */ | |
| 649 } | |
| 650 | |
| 651 } | |
| 652 | |
| 653 void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) | |
| 654 { | |
| 655 | |
| 656 if(huart->Instance==USART1) | |
| 657 { | |
| 658 /* USER CODE BEGIN USART1_MspDeInit 0 */ | |
| 659 | |
| 660 /* USER CODE END USART1_MspDeInit 0 */ | |
| 661 /* Peripheral clock disable */ | |
| 662 HAL_NVIC_DisableIRQ(USART1_IRQn); | |
| 663 __USART1_CLK_DISABLE(); | |
| 664 | |
| 665 /**USART1 GPIO Configuration | |
| 666 PA9 ------> USART1_TX | |
| 667 PA10 ------> USART1_RX | |
| 668 */ | |
| 669 #ifdef USARTx_CTS_PIN | |
| 670 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12); | |
| 671 #else | |
| 672 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); | |
| 673 #endif | |
| 674 | |
| 675 /* USER CODE BEGIN USART1_MspDeInit 1 */ | |
| 676 | |
| 677 /* USER CODE END USART1_MspDeInit 1 */ | |
| 678 } | |
| 679 else if(huart->Instance==USART2) | |
| 680 { | |
| 681 /* USER CODE BEGIN USART2_MspDeInit 0 */ | |
| 682 | |
| 683 /* USER CODE END USART2_MspDeInit 0 */ | |
| 684 /* Peripheral clock disable */ | |
| 685 __USART2_CLK_DISABLE(); | |
| 686 | |
| 687 /**USART2 GPIO Configuration | |
| 688 PD5 ------> USART2_TX | |
| 689 PD6 ------> USART2_RX | |
| 690 */ | |
| 691 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6); | |
| 692 | |
| 693 /* USER CODE BEGIN USART2_MspDeInit 1 */ | |
| 694 | |
| 695 /* USER CODE END USART2_MspDeInit 1 */ | |
| 696 } | |
| 697 else if(huart->Instance==USART3) | |
| 698 { | |
| 699 /* USER CODE BEGIN USART3_MspDeInit 0 */ | |
| 700 | |
| 701 /* USER CODE END USART3_MspDeInit 0 */ | |
| 702 /* Peripheral clock disable */ | |
| 703 __USART3_CLK_DISABLE(); | |
| 704 | |
| 705 /**USART3 GPIO Configuration | |
| 706 PC10 ------> USART3_TX | |
| 707 PC11 ------> USART3_RX | |
| 708 */ | |
| 709 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11); | |
| 710 | |
| 711 /* USER CODE BEGIN USART3_MspDeInit 1 */ | |
| 712 | |
| 713 /* USER CODE END USART3_MspDeInit 1 */ | |
| 714 } | |
| 715 | |
| 716 } | |
| 717 | |
| 718 static int FMC_Initialized = 0; | |
| 719 | |
| 720 static void HAL_FMC_MspInit(void){ | |
| 721 GPIO_InitTypeDef GPIO_InitStruct; | |
| 722 if (FMC_Initialized) { | |
| 723 return; | |
| 724 } | |
| 725 FMC_Initialized = 1; | |
| 726 /* Peripheral clock enable */ | |
| 727 __GPIOC_CLK_ENABLE(); | |
| 728 __GPIOD_CLK_ENABLE(); | |
| 729 __GPIOE_CLK_ENABLE(); | |
| 730 __GPIOF_CLK_ENABLE(); | |
| 731 __GPIOG_CLK_ENABLE(); | |
| 732 __GPIOH_CLK_ENABLE(); | |
| 733 | |
| 734 __FMC_CLK_ENABLE(); | |
| 735 | |
| 736 /** FMC GPIO Configuration | |
| 737 PF0 ------> FMC_A0 | |
| 738 PF1 ------> FMC_A1 | |
| 739 PF2 ------> FMC_A2 | |
| 740 PF3 ------> FMC_A3 | |
| 741 PF4 ------> FMC_A4 | |
| 742 PF5 ------> FMC_A5 | |
| 743 PC0 ------> FMC_SDNWE | |
| 744 PF11 ------> FMC_SDNRAS | |
| 745 PF12 ------> FMC_A6 | |
| 746 PF13 ------> FMC_A7 | |
| 747 PF14 ------> FMC_A8 | |
| 748 PF15 ------> FMC_A9 | |
| 749 PG0 ------> FMC_A10 | |
| 750 PG1 ------> FMC_A11 | |
| 751 PE7 ------> FMC_D4 | |
| 752 PE8 ------> FMC_D5 | |
| 753 PE9 ------> FMC_D6 | |
| 754 PE10 ------> FMC_D7 | |
| 755 PE11 ------> FMC_D8 | |
| 756 PE12 ------> FMC_D9 | |
| 757 PE13 ------> FMC_D10 | |
| 758 PE14 ------> FMC_D11 | |
| 759 PE15 ------> FMC_D12 | |
| 760 PH6 ------> FMC_SDNE1 neu | |
| 761 PH7 ------> FMC_SDCKE1 neu | |
| 762 PD8 ------> FMC_D13 | |
| 763 PD9 ------> FMC_D14 | |
| 764 PD10 ------> FMC_D15 | |
| 765 PD14 ------> FMC_D0 | |
| 766 PD15 ------> FMC_D1 | |
| 767 PG2 ------> FMC_A12 | |
| 768 PG4 ------> FMC_BA0 | |
| 769 PG5 ------> FMC_BA1 | |
| 770 PG8 ------> FMC_SDCLK | |
| 771 PD0 ------> FMC_D2 | |
| 772 PD1 ------> FMC_D3 | |
| 773 PG15 ------> FMC_SDNCAS | |
| 774 PE0 ------> FMC_NBL0 | |
| 775 PE1 ------> FMC_NBL1 | |
| 776 */ | |
| 777 | |
| 778 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 779 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 780 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; | |
| 781 GPIO_InitStruct.Alternate = GPIO_AF12_FMC; | |
| 782 | |
| 783 | |
| 784 GPIO_InitStruct.Pin = GPIO_PIN_0; | |
| 785 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); | |
| 786 | |
| 787 GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 | |
| 788 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1; | |
| 789 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); | |
| 790 | |
| 791 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 | |
| 792 |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 | |
| 793 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1; | |
| 794 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); | |
| 795 | |
| 796 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 | |
| 797 |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12 | |
| 798 |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15; | |
| 799 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); | |
| 800 | |
| 801 GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4 | |
| 802 |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15; | |
| 803 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); | |
| 804 | |
| 805 GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; | |
| 806 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); | |
| 807 | |
| 808 | |
| 809 } | |
| 810 | |
| 811 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){ | |
| 812 HAL_FMC_MspInit(); | |
| 813 } | |
| 814 | |
| 815 static int FMC_DeInitialized = 0; | |
| 816 | |
| 817 static void HAL_FMC_MspDeInit(void){ | |
| 818 if (FMC_DeInitialized) { | |
| 819 return; | |
| 820 } | |
| 821 FMC_DeInitialized = 1; | |
| 822 /* Peripheral clock enable */ | |
| 823 __FMC_CLK_DISABLE(); | |
| 824 | |
| 825 /** FMC GPIO Configuration | |
| 826 PF0 ------> FMC_A0 | |
| 827 PF1 ------> FMC_A1 | |
| 828 PF2 ------> FMC_A2 | |
| 829 PF3 ------> FMC_A3 | |
| 830 PF4 ------> FMC_A4 | |
| 831 PF5 ------> FMC_A5 | |
| 832 PC0 ------> FMC_SDNWE | |
| 833 PF11 ------> FMC_SDNRAS | |
| 834 PF12 ------> FMC_A6 | |
| 835 PF13 ------> FMC_A7 | |
| 836 PF14 ------> FMC_A8 | |
| 837 PF15 ------> FMC_A9 | |
| 838 PG0 ------> FMC_A10 | |
| 839 PG1 ------> FMC_A11 | |
| 840 PE7 ------> FMC_D4 | |
| 841 PE8 ------> FMC_D5 | |
| 842 PE9 ------> FMC_D6 | |
| 843 PE10 ------> FMC_D7 | |
| 844 PE11 ------> FMC_D8 | |
| 845 PE12 ------> FMC_D9 | |
| 846 PE13 ------> FMC_D10 | |
| 847 PE14 ------> FMC_D11 | |
| 848 PE15 ------> FMC_D12 | |
| 849 PH6 ------> FMC_SDNE1 | |
| 850 PH7 ------> FMC_SDCKE1 | |
| 851 PD8 ------> FMC_D13 | |
| 852 PD9 ------> FMC_D14 | |
| 853 PD10 ------> FMC_D15 | |
| 854 PD14 ------> FMC_D0 | |
| 855 PD15 ------> FMC_D1 | |
| 856 PG2 ------> FMC_A12 | |
| 857 PG4 ------> FMC_BA0 | |
| 858 PG5 ------> FMC_BA1 | |
| 859 PG8 ------> FMC_SDCLK | |
| 860 PD0 ------> FMC_D2 | |
| 861 PD1 ------> FMC_D3 | |
| 862 PG15 ------> FMC_SDNCAS | |
| 863 PE0 ------> FMC_NBL0 | |
| 864 PE1 ------> FMC_NBL1 | |
| 865 */ | |
| 866 HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 | |
| 867 |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12 | |
| 868 |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15); | |
| 869 | |
| 870 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0); | |
| 871 | |
| 872 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4 | |
| 873 |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15); | |
| 874 | |
| 875 HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 | |
| 876 |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 | |
| 877 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1); | |
| 878 | |
| 879 HAL_GPIO_DeInit(GPIOH, GPIO_PIN_6|GPIO_PIN_7); | |
| 880 | |
| 881 HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 | |
| 882 |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1); | |
| 883 | |
| 884 } | |
| 885 | |
| 886 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){ | |
| 887 HAL_FMC_MspDeInit(); | |
| 888 } |