Mercurial > public > ostc4
annotate Discovery/Inc/ostc_hw2.h @ 887:17f02ac9da67 Evo_2_23
adding GNSS code
| author | heinrichsweikamp |
|---|---|
| date | Tue, 03 Sep 2024 15:30:53 +0200 |
| parents | 5e027b0f7475 |
| children |
| rev | line source |
|---|---|
| 38 | 1 /////////////////////////////////////////////////////////////////////////////// |
| 2 /// -*- coding: UTF-8 -*- | |
| 3 /// | |
| 4 /// \file Discovery/Inc/ostc_hw2.h | |
| 5 /// \brief | |
| 6 /// \author Heinrichs Weikamp | |
| 7 /// \date 2018 | |
| 8 /// | |
| 9 /// $Id$ | |
| 10 /////////////////////////////////////////////////////////////////////////////// | |
| 11 /// \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh | |
| 12 /// | |
| 13 /// This program is free software: you can redistribute it and/or modify | |
| 14 /// it under the terms of the GNU General Public License as published by | |
| 15 /// the Free Software Foundation, either version 3 of the License, or | |
| 16 /// (at your option) any later version. | |
| 17 /// | |
| 18 /// This program is distributed in the hope that it will be useful, | |
| 19 /// but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 20 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 21 /// GNU General Public License for more details. | |
| 22 /// | |
| 23 /// You should have received a copy of the GNU General Public License | |
| 24 /// along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 25 ////////////////////////////////////////////////////////////////////////////// | |
| 26 | |
| 27 /* Define to prevent recursive inclusion -------------------------------------*/ | |
| 28 #ifndef OSTC_HW2_H | |
| 29 #define OSTC_HW2_H | |
| 30 | |
| 31 #include "stm32f429xx.h" | |
| 32 | |
| 33 /* | |
| 34 #define DISPLAY_BACKLIGHT_PIN GPIO_PIN_7 | |
| 35 #define DISPLAY_BACKLIGHT_GPIO_PORT GPIOC | |
| 36 #define DISPLAY_BACKLIGHT_GPIO_ENABLE() __GPIOC_CLK_ENABLE() | |
| 37 */ | |
| 38 #define SMALL_BOARD_PCB9_AND_LATER | |
| 39 #define TESTPIN | |
| 40 | |
| 41 #define DISPLAY_RESETB_PIN GPIO_PIN_13 | |
| 42 #define DISPLAY_RESETB_GPIO_PORT GPIOC | |
| 43 #define DISPLAY_RESETB_GPIO_ENABLE() __GPIOC_CLK_ENABLE() | |
| 44 | |
| 45 #define DISPLAY_CSB_PIN GPIO_PIN_8 | |
| 46 #define DISPLAY_CSB_GPIO_PORT GPIOI | |
| 47 #define DISPLAY_CSB_GPIO_ENABLE() __GPIOI_CLK_ENABLE() | |
| 48 | |
| 49 #define VSYNC_IRQ_PIN GPIO_PIN_3 | |
| 50 #define VSYNC_IRQ_GPIO_PORT GPIOE | |
| 51 #define VSYNC_IRQ_GPIO_ENABLE() __GPIOE_CLK_ENABLE() | |
| 52 #define VSYNC_IRQ_EXTI_IRQn EXTI3_IRQn | |
| 53 | |
| 54 #ifdef SMALL_BOARD_PCB9_AND_LATER | |
| 55 #define BUTTON_BACK_PIN GPIO_PIN_0 | |
| 56 #define BUTTON_BACK_EXTI_IRQn EXTI0_IRQn | |
| 57 #define BUTTON_BACK_GPIO_PORT GPIOB | |
| 58 #define BUTTON_BACK_GPIO_ENABLE() __GPIOB_CLK_ENABLE() | |
| 59 | |
| 60 #define BUTTON_ENTER_PIN GPIO_PIN_1 | |
| 61 #define BUTTON_ENTER_EXTI_IRQn EXTI1_IRQn | |
| 62 #define BUTTON_ENTER_GPIO_PORT GPIOA | |
| 63 #define BUTTON_ENTER_GPIO_ENABLE() __GPIOA_CLK_ENABLE() | |
| 64 | |
| 65 #define BUTTON_NEXT_PIN GPIO_PIN_2 | |
| 66 #define BUTTON_NEXT_EXTI_IRQn EXTI2_IRQn | |
| 67 #define BUTTON_NEXT_GPIO_PORT GPIOA | |
| 68 #define BUTTON_NEXT_GPIO_ENABLE() __GPIOA_CLK_ENABLE() | |
| 69 #else | |
| 70 #define BUTTON_BACK_PIN GPIO_PIN_0 | |
| 71 #define BUTTON_BACK_EXTI_IRQn EXTI0_IRQn | |
| 72 #define BUTTON_BACK_GPIO_PORT GPIOB | |
| 73 #define BUTTON_BACK_GPIO_ENABLE() __GPIOB_CLK_ENABLE() | |
| 74 | |
| 75 #define BUTTON_ENTER_PIN GPIO_PIN_4 | |
| 76 #define BUTTON_ENTER_EXTI_IRQn EXTI4_IRQn | |
| 77 #define BUTTON_ENTER_GPIO_PORT GPIOH | |
| 78 #define BUTTON_ENTER_GPIO_ENABLE() __GPIOH_CLK_ENABLE() | |
| 79 | |
| 80 #define BUTTON_NEXT_PIN GPIO_PIN_2 | |
| 81 #define BUTTON_NEXT_EXTI_IRQn EXTI2_IRQn | |
| 82 #define BUTTON_NEXT_GPIO_PORT GPIOA | |
| 83 #define BUTTON_NEXT_GPIO_ENABLE() __GPIOA_CLK_ENABLE() | |
| 84 | |
| 85 #define BUTTON_CUSTOM_PIN GPIO_PIN_1 | |
| 86 #define BUTTON_CUSTOM_EXTI_IRQn EXTI1_IRQn | |
| 87 #define BUTTON_CUSTOM_GPIO_PORT GPIOA | |
| 88 #define BUTTON_CUSTOM_GPIO_ENABLE() __GPIOA_CLK_ENABLE() | |
| 89 #endif | |
| 90 | |
| 91 | |
| 92 #ifdef TESTPIN | |
| 93 #define TEST_PIN GPIO_PIN_4 | |
| 94 #define TEST_GPIO_PORT GPIOH | |
| 95 #define TEST_GPIO_ENABLE() __GPIOH_CLK_ENABLE() | |
| 96 #endif | |
| 97 | |
| 98 | |
| 99 #define EXTFLASH_CSB_PIN GPIO_PIN_6 | |
| 100 #define EXTFLASH_CSB_GPIO_PORT GPIOF | |
| 101 #define EXTFLASH_CSB_GPIO_ENABLE() __GPIOF_CLK_ENABLE() | |
| 102 | |
| 103 #define OSCILLOSCOPE_PIN GPIO_PIN_3 | |
| 104 #define OSCILLOSCOPE_GPIO_PORT GPIOA | |
| 105 #define OSCILLOSCOPE_GPIO_ENABLE() __GPIOA_CLK_ENABLE() | |
| 106 | |
| 107 #define OSCILLOSCOPE2_PIN GPIO_PIN_11 | |
| 108 #define OSCILLOSCOPE2_GPIO_PORT GPIOB | |
| 109 #define OSCILLOSCOPE2_GPIO_ENABLE() __GPIOB_CLK_ENABLE() | |
| 110 | |
| 111 /* Bluetooth */ | |
| 112 #define BLE_NENABLE_PIN GPIO_PIN_7 | |
| 113 #define BLE_NENABLE_GPIO_PORT GPIOB | |
| 114 #define BLE_NENABLE_GPIO_ENABLE() __GPIOB_CLK_ENABLE() | |
| 115 /* | |
| 116 #define BLE_NENABLE_PIN GPIO_PIN_11 | |
| 117 #define BLE_NENABLE_GPIO_PORT GPIOD | |
| 118 #define BLE_NENABLE_GPIO_ENABLE() __GPIOD_CLK_ENABLE() | |
| 119 */ | |
| 120 #define USARTx USART1 | |
| 121 #define USARTx_CLK_ENABLE() __USART1_CLK_ENABLE(); | |
| 122 #define USARTx_FORCE_RESET() __USART1_FORCE_RESET() | |
| 123 #define USARTx_RELEASE_RESET() __USART1_RELEASE_RESET() | |
| 124 | |
| 125 #define USARTx_TX_AF GPIO_AF7_USART1 | |
| 126 #define USARTx_TX_PIN GPIO_PIN_9 | |
| 127 #define USARTx_TX_GPIO_PORT GPIOA | |
| 128 #define USARTx_TX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() | |
| 129 | |
| 130 #define USARTx_RX_AF GPIO_AF7_USART1 | |
| 131 #define USARTx_RX_PIN GPIO_PIN_10 | |
| 132 #define USARTx_RX_GPIO_PORT GPIOA | |
| 133 #define USARTx_RX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() | |
| 134 | |
| 135 #define USARTx_CTS_AF GPIO_AF7_USART1 | |
| 136 #define USARTx_CTS_PIN GPIO_PIN_11 | |
| 137 #define USARTx_CTS_GPIO_PORT GPIOA | |
| 138 #define USARTx_CTS_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() | |
| 139 | |
| 140 #define USARTx_RTS_AF GPIO_AF7_USART1 | |
| 141 #define USARTx_RTS_PIN GPIO_PIN_12 | |
| 142 #define USARTx_RTS_GPIO_PORT GPIOA | |
| 143 #define USARTx_RTS_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() | |
| 144 | |
| 145 #define USARTx_IRQn USART1_IRQn | |
| 146 // to it directly#define USARTx_IRQHandler USART1_IRQHandler | |
| 147 | |
| 148 /* | |
| 149 #define IR_HUD_ENABLE_PIN GPIO_PIN_7 | |
| 150 #define IR_HUD_ENABLE_GPIO_PORT GPIOD | |
| 151 #define IR_HUD_ENABLE_GPIO_ENABLE() __GPIOD_CLK_ENABLE() | |
| 152 */ | |
| 153 | |
| 154 #define USART_IR_HUD USART2 | |
| 155 #define USART_IR_HUD_CLK_ENABLE() __USART2_CLK_ENABLE(); | |
| 156 #define USART_IR_HUD_FORCE_RESET() __USART2_FORCE_RESET() | |
| 157 #define USART_IR_HUD_RELEASE_RESET() __USART2_RELEASE_RESET() | |
| 158 #define USART_IR_HUD_TX_AF GPIO_AF7_USART2 | |
| 159 #define USART_IR_HUD_TX_PIN GPIO_PIN_5 | |
| 160 #define USART_IR_HUD_TX_GPIO_PORT GPIOD | |
| 161 #define USART_IR_HUD_TX_GPIO_CLK_ENABLE() __GPIOD_CLK_ENABLE() | |
| 162 | |
| 163 #define USART_IR_HUD_RX_AF GPIO_AF7_USART2 | |
| 164 #define USART_IR_HUD_RX_PIN GPIO_PIN_6 | |
| 165 #define USART_IR_HUD_RX_GPIO_PORT GPIOD | |
| 166 #define USART_IR_HUD_RX_GPIO_CLK_ENABLE() __GPIOD_CLK_ENABLE() | |
| 167 #define USART_IR_HUD_IRQn USART2_IRQn | |
| 168 // to it directly#define USART_IR_HUD_IRQHandler USART2_IRQHandler | |
| 169 | |
| 170 #define TIMx TIM4 | |
| 171 #define TIMx_CLK_ENABLE __TIM4_CLK_ENABLE | |
| 172 #define TIMx_IRQn TIM4_IRQn | |
| 173 // to it directly #define TIMx_IRQHandler TIM4_IRQHandler | |
| 174 | |
| 175 #define TIM_BACKLIGHT TIM3 | |
| 176 #define TIM_BACKLIGHT_CLK_ENABLE __TIM3_CLK_ENABLE | |
| 177 #define TIM_BACKLIGHT_IRQn TIM3_IRQn | |
| 178 #define TIM_BACKLIGHT_IRQHandler TIM3_IRQHandler | |
| 179 #define TIM_BACKLIGHT_CHANNEL TIM_CHANNEL_2 | |
| 180 #define TIM_BACKLIGHT_PIN GPIO_PIN_7 | |
| 181 #define TIM_BACKLIGHT_GPIO_PORT GPIOC | |
| 182 #define TIM_BACKLIGHT_GPIO_ENABLE() __GPIOC_CLK_ENABLE() | |
| 183 | |
| 184 #define SMALLCPU_CSB_PIN GPIO_PIN_5 | |
| 185 #define SMALLCPU_CSB_GPIO_PORT GPIOC | |
| 186 #define SMALLCPU_CSB_GPIO_ENABLE() __GPIOC_CLK_ENABLE() | |
| 187 | |
| 188 #define SMALLCPU_BOOT0_PIN GPIO_PIN_9 | |
| 189 #define SMALLCPU_BOOT0_GPIO_PORT GPIOC | |
| 190 #define SMALLCPU_BOOT0_GPIO_ENABLE() __GPIOC_CLK_ENABLE() | |
| 191 | |
| 192 #define SMALLCPU_NRESET_PIN GPIO_PIN_8 | |
| 193 #define SMALLCPU_NRESET_GPIO_PORT GPIOC | |
| 194 #define SMALLCPU_NRESET_GPIO_ENABLE() __GPIOC_CLK_ENABLE() | |
| 195 | |
| 196 #define RESET_LOGIC_ALLES_OK_PIN GPIO_PIN_15 | |
| 197 #define RESET_LOGIC_ALLES_OK_GPIO_PORT GPIOB | |
| 198 #define RESET_LOGIC_ALLES_OK_GPIO_ENABLE() __GPIOB_CLK_ENABLE() | |
| 199 | |
|
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200 /* new OSTC5 */ |
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201 #define BLE_UBLOX_DSR_PIN GPIO_PIN_12 |
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202 #define BLE_UBLOX_DSR_GPIO_PORT GPIOC |
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203 #define BLE_UBLOX_DSR_GPIO_ENABLE() __GPIOC_CLK_ENABLE() |
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204 |
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205 |
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206 |
| 38 | 207 #endif // OSTC_HW2_H |