Mercurial > public > hwos_code
comparison src/hwos.asm @ 631:185ba2f91f59
3.09 beta 1 release
author | heinrichsweikamp |
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date | Fri, 28 Feb 2020 15:45:07 +0100 |
parents | 4cd81bdbf15c |
children | 4050675965ea |
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630:4cd81bdbf15c | 631:185ba2f91f59 |
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1 ;============================================================================= | 1 ;============================================================================= |
2 ; | 2 ; |
3 ; File hwos.asm combined next generation V3.06.1 | 3 ; File hwos.asm combined next generation V3.08.8 |
4 ; | 4 ; |
5 ; Definition of the hwOS dive computer platform. | 5 ; Definition of the hwOS dive computer platform. |
6 ; | 6 ; |
7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | 7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. |
8 ;============================================================================= | 8 ;============================================================================= |
81 apnoe_surface_secs res 1 ; surface time seconds | these 2 Variables relative to each other! | 81 apnoe_surface_secs res 1 ; surface time seconds | these 2 Variables relative to each other! |
82 | 82 |
83 apnoe_dive_mins res 1 ; dive time minutes | Attention: do not change the position of | 83 apnoe_dive_mins res 1 ; dive time minutes | Attention: do not change the position of |
84 apnoe_dive_secs res 1 ; dive time seconds | these 2 Variables relative to each other! | 84 apnoe_dive_secs res 1 ; dive time seconds | these 2 Variables relative to each other! |
85 | 85 |
86 | |
87 ;---- Profile Recording | 86 ;---- Profile Recording |
88 sampling_rate res 1 ; configured sampling rate | 87 sampling_rate res 1 ; configured sampling rate |
89 sampling_timer res 1 ; sampling timer | 88 sampling_timer res 1 ; sampling timer |
90 | 89 |
91 ;---- Simulator Mode | 90 ;---- Simulator Mode |
99 ; 28 byte user data | 98 ; 28 byte user data |
100 ; 32 byte tmp data placed by C compiler | 99 ; 32 byte tmp data placed by C compiler |
101 ; 20 byte variables placed by math library | 100 ; 20 byte variables placed by math library |
102 ; == | 101 ; == |
103 ; 80 byte used, 16 byte free (96 byte total available) | 102 ; 80 byte used, 16 byte free (96 byte total available) |
103 | |
104 | 104 |
105 global HW_descriptor | 105 global HW_descriptor |
106 global HW_variants | 106 global HW_variants |
107 global HW_flags_state1 | 107 global HW_flags_state1 |
108 global HW_flags_state2 | 108 global HW_flags_state2 |
267 ; A/D Converter | 267 ; A/D Converter |
268 movlw b'00011000' ; power off ADC, select AN6 | 268 movlw b'00011000' ; power off ADC, select AN6 |
269 movwf ADCON0 | 269 movwf ADCON0 |
270 movlw b'00100000' ; 2.048V Vref+ | 270 movlw b'00100000' ; 2.048V Vref+ |
271 movwf ADCON1 | 271 movwf ADCON1 |
272 movlw b'10111010' ; right aligned, 20 x T_AD acquisition time, FOSC/32 -> Max. 40MHz device clock speed | 272 movlw b'10111010' ; right aligned, 20 x T_AD acquisition time, FOSC/32 -> max. 40 MHz device clock speed |
273 movwf ADCON2 | 273 movwf ADCON2 |
274 | 274 |
275 | 275 |
276 ; serial Port 1 (TRISC6/7) | 276 ; serial Port 1 (TRISC6/7) |
277 movlw b'00001000' ; BRG16=1 | 277 movlw b'00001000' ; switch baud generator to 16 bit mode (BRG16=1) |
278 movwf BAUDCON1 | 278 movwf BAUDCON1 ; ... |
279 movlw .34 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0.79% Error at 115200 BAUD) | 279 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0.79% error at 115200 baud) |
280 movwf SPBRG1 ; SPBRGH:SPBRG = .207 : 19230 BAUD @ 16MHz (-0.16% Error at 19200 BAUD) | 280 ; SPBRGH:SPBRG = .207 : 19230 BAUD @ 16MHz (-0.16% error at 19200 baud) |
281 clrf SPBRGH1 ; | 281 movlw .34 ; select 114285 baud (low byte) |
282 | 282 movwf SPBRG1 ; ... |
283 clrf RCSTA1 | 283 clrf SPBRGH1 ; ... (high byte) |
284 clrf TXSTA1 ; UART disable | 284 |
285 bcf PORTC,6 ; TX hard to GND | 285 clrf RCSTA1 ; disable UART RX |
286 clrf TXSTA1 ; disable UART TX | |
287 bcf PORTC,6 ; tie TX output hard to GND | |
286 | 288 |
287 | 289 |
288 ; serial Port 2 (TRISG2) for IR/S8 digital interface | 290 ; serial Port 2 (TRISG2) for IR/S8 digital interface |
289 ; | 291 ; |
290 ; - will be initialized by enable_ir_s8 (eeprom_rs232.asm) in case IR/S8 shall be available | 292 ; - will be initialized by enable_ir_s8 (eeprom_rs232.asm) in case IR/S8 shall be available |
432 ; Backup the first 128 bytes from program memory to EEPROM | 434 ; Backup the first 128 bytes from program memory to EEPROM |
433 ; | 435 ; |
434 global backup_flash_page | 436 global backup_flash_page |
435 backup_flash_page: | 437 backup_flash_page: |
436 banksel common | 438 banksel common |
437 movlw 0x00 ; start address in internal program memory | 439 |
438 movwf TBLPTRL | 440 ; set start address in internal program memory |
439 movwf TBLPTRH | 441 movlw 0x00 ; set 0x000000 |
440 movwf TBLPTRU | 442 movwf TBLPTRL ; ... |
443 movwf TBLPTRH ; ... | |
444 movwf TBLPTRU ; ... | |
445 TBLRD*- ; dummy read to be in 128 byte block | |
446 | |
447 ; set start address in EEPROM | |
448 EEPROM_SET_ADDRESS eeprom_prog_page0_backup | |
441 | 449 |
442 movlw .128 ; copy 1 block = 128 byte | 450 movlw .128 ; copy 1 block = 128 byte |
443 movwf lo ; byte counter | 451 movwf eeprom_loop ; initialize loop counter |
444 | |
445 clrf EEADR ; start address in EEPROM, low | |
446 movlw .3 ; start address in EEPROM, high | |
447 movwf EEADRH | |
448 | |
449 TBLRD*- ; dummy read to be in 128 byte block | |
450 backup_flash_loop: | 452 backup_flash_loop: |
451 tblrd+* ; read one byte from program memory (with pre-increment) | 453 tblrd+* ; read one byte from program memory (with pre-increment) |
452 movff TABLAT,EEDATA ; transfer byte from program memory read to EEPROM write | 454 movff TABLAT,EEDATA ; transfer byte from program memory read to EEPROM write |
453 call write_eeprom ; execute EEPROM write | 455 call write_eeprom ; execute EEPROM write |
454 incf EEADR,F ; increment EEPROM address | 456 incf EEADR,F ; increment EEPROM address |
455 decfsz lo,F ; 128 byte done? | 457 decfsz eeprom_loop,F ; all 128 byte done? |
456 bra backup_flash_loop ; NO - loop | 458 bra backup_flash_loop ; NO - loop |
457 clrf EEADRH ; YES - reset EEPROM high address | 459 return ; YES - done |
458 return ; - done | |
459 | 460 |
460 ;============================================================================= | 461 ;============================================================================= |
461 ; Restore the first 128 bytes from EEPROM to program memory | 462 ; Restore the first 128 bytes from EEPROM to program memory |
462 ; | 463 ; |
463 global restore_flash | 464 global restore_flash |
464 restore_flash: | 465 restore_flash: |
465 banksel common | 466 banksel common |
466 movlw 0x00 ; start address in internal program memory | 467 |
467 movwf TBLPTRL | 468 ;set start address in internal program memory |
468 movwf TBLPTRH | 469 movlw 0x00 ; set 0x000000 |
469 movwf TBLPTRU | 470 movwf TBLPTRL ; ... |
471 movwf TBLPTRH ; ... | |
472 movwf TBLPTRU ; ... | |
473 TBLRD*- ; dummy read to be in 128 byte block | |
470 | 474 |
471 movlw b'10010100' ; setup block erase | 475 movlw b'10010100' ; setup block erase |
472 rcall restore_write ; execute block erase | 476 rcall restore_write ; execute block erase |
473 | 477 |
478 ; set start address in EEPROM | |
479 EEPROM_SET_ADDRESS eeprom_prog_page0_backup | |
480 | |
474 movlw .128 ; copy 1 block = 128 byte | 481 movlw .128 ; copy 1 block = 128 byte |
475 movwf lo ; byte counter | 482 movwf eeprom_loop ; initialize loop counter |
476 | |
477 clrf EEADR ; start address in EEPROM, low | |
478 movlw .3 ; start address in EEPROM, high | |
479 movwf EEADRH | |
480 | |
481 TBLRD*- ; dummy read to be in 128 byte block | |
482 restore_flash_loop: | 483 restore_flash_loop: |
483 call read_eeprom ; read one byte from EEPROM | 484 call read_eeprom ; execute EEPROM read |
484 incf EEADR,F ; increment EEPROM address | 485 incf EEADR,F ; increment EEPROM address |
485 movff EEDATA,TABLAT ; transfer byte from EEPROM read to program memory write | 486 movff EEDATA,TABLAT ; transfer byte from EEPROM read to program memory write |
486 tblwt+* ; execute program memory write (with pre-increment) | 487 tblwt+* ; execute program memory write (with pre-increment) |
487 decfsz lo,F ; 128 bytes done? | 488 decfsz eeprom_loop,F ; all 128 bytes done? |
488 bra restore_flash_loop ; NO - loop | 489 bra restore_flash_loop ; NO - loop |
489 movlw b'10000100' ; YES - setup block write | 490 movlw b'10000100' ; YES - setup block write |
490 rcall restore_write ; - execute block write | 491 rcall restore_write ; - execute block write |
491 reset ; - done, reset CPU | 492 reset ; - done, reset CPU |
492 | 493 |
493 restore_write: | 494 restore_write: |
494 movwf EECON1 ; type of memory to write in | 495 movwf EECON1 ; configure operation |
495 movlw 0x55 | 496 movlw 0x55 ; unlock sequence |
496 movwf EECON2 | 497 movwf EECON2 ; ... |
497 movlw 0xAA | 498 movlw 0xAA ; ... |
498 movwf EECON2 | 499 movwf EECON2 ; ... |
499 bsf EECON1,WR ; execute write | 500 bsf EECON1,WR ; execute operation |
500 nop | 501 nop ; wait for operation to complete |
501 nop | 502 nop ; ... |
502 return | 503 return ; done |
504 | |
505 ;============================================================================= | |
506 ; Memory clear and move functions, to be used through macros | |
507 ; | |
508 global memory_clear | |
509 memory_clear: | |
510 clrf POSTINC1 ; clear address | |
511 decfsz WREG ; decrement loop counter, became zero? | |
512 bra memory_clear ; NO - loop | |
513 return ; YES - done | |
514 | |
515 global memory_move | |
516 memory_move: | |
517 movff POSTINC1,POSTINC2 ; copy from-to | |
518 decfsz WREG ; decrement loop counter, became zero? | |
519 bra memory_move ; NO - loop | |
520 return ; YES - done | |
503 | 521 |
504 END | 522 END |