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annotate src/eeprom_rs232.asm @ 185:f515712d8cd6
BUGFIX: Check min and max values after PC configuration properly
| author | heinrichsweikamp |
|---|---|
| date | Sat, 18 Oct 2014 10:03:28 +0200 |
| parents | 5cb177f0948a |
| children | 669b5d00706d |
| rev | line source |
|---|---|
| 0 | 1 ;============================================================================= |
| 2 ; | |
| 3 ; File eeprom_rs232.asm | |
| 4 ; | |
| 5 ; Internal EEPROM, RS232 | |
| 6 ; | |
| 7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved. | |
| 8 ;============================================================================= | |
| 9 ; HISTORY | |
| 10 ; 2011-08-06 : [mH] moving from OSTC code | |
| 11 | |
| 12 #include "ostc3.inc" | |
| 13 #include "wait.inc" | |
| 14 | |
| 15 ;============================================================================= | |
| 16 eeprom code 0xF00000+0x10 | |
| 17 ; Skip SERIAL number. Should not be overwritten. | |
| 18 global eeprom_serial_save, eeprom_opt_backup | |
| 19 eeprom_serial_save res 2 | |
| 20 eeprom_opt_backup res 0x3E | |
| 21 | |
| 22 ;============================================================================= | |
| 23 basic CODE | |
| 24 | |
| 25 global write_int_eeprom_1 | |
| 26 write_int_eeprom_1: | |
| 27 movwf EEADR | |
| 28 bra write_eeprom ; writes and "returns" after write | |
| 29 | |
| 30 global read_int_eeprom_1 | |
| 31 read_int_eeprom_1: | |
| 32 movwf EEADR | |
| 33 bra read_eeprom ; reads and "returns" after write | |
| 34 | |
| 35 ;============================================================================= | |
| 36 ; reads from internal eeprom | |
| 37 ; Input: EEADRH:EEADR = EEPROM address. | |
| 38 ; Output: EEDATA. | |
| 39 ; Trashed: NONE. | |
| 40 global read_eeprom | |
| 41 read_eeprom: | |
| 42 bcf EECON1,EEPGD | |
| 43 bcf EECON1,CFGS | |
| 44 bsf EECON1,RD | |
| 45 return | |
| 46 | |
| 47 ;============================================================================= | |
| 48 ; writes into internal eeprom | |
| 49 ; Input: EEADRH:EEADR = EEPROM address. | |
| 50 ; EEDATA = byte to write. | |
| 51 ; Trashed: WREG. | |
| 52 global write_eeprom | |
| 53 write_eeprom: | |
| 54 bcf EECON1,EEPGD | |
| 55 bcf EECON1,CFGS | |
| 56 bsf EECON1,WREN | |
| 57 | |
|
133
939f1e83c4c2
BUGFIX: Surface interval was not displayed correctly in some cases
heinrichsweikamp
parents:
113
diff
changeset
|
58 bcf INTCON,GIE ; Disable interrups for the next 5 instructions |
| 0 | 59 movlw 0x55 |
| 60 movwf EECON2 | |
| 61 movlw 0xAA | |
| 62 movwf EECON2 | |
| 63 bsf EECON1,WR | |
| 64 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now! | |
| 65 | |
| 66 write_eep2: | |
| 67 btfsc EECON1,WR | |
| 68 bra write_eep2 ; wait about 4ms... | |
| 69 bcf EECON1,WREN | |
| 70 return | |
| 71 | |
| 72 global disable_ir | |
| 73 disable_ir: | |
| 74 banksel TXSTA2 | |
| 75 clrf TXSTA2 | |
| 76 clrf RCSTA2 | |
| 77 banksel common | |
| 78 bcf ir_power ; IR off | |
| 113 | 79 bcf mcp_power ; Power-down intrumentation amp |
| 80 bsf s8_npower ; Power-down S8 HUD | |
| 0 | 81 return |
| 82 | |
| 83 global enable_ir | |
| 84 enable_ir: | |
| 85 ;init serial port2 (TRISG2) | |
| 113 | 86 btfsc c3_hardware |
| 87 bra enable_s8 ; Start S8 | |
| 88 | |
| 89 banksel BAUDCON2 | |
| 90 movlw b'00100000' ; BRG16=0 ; inverted for IR | |
| 91 movwf BAUDCON2 | |
| 0 | 92 banksel TXSTA2 |
| 93 movlw b'00100000' ; BRGH=0, SYNC=0 | |
| 94 movwf TXSTA2 | |
| 95 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16MHz | |
| 96 movwf SPBRG2 | |
| 97 clrf SPBRGH2 | |
| 98 movlw b'10010000' | |
| 99 movwf RCSTA2 | |
| 100 banksel common | |
| 113 | 101 bsf ir_power ; Power-up IR |
| 0 | 102 btfss ir_power |
| 103 bra $-6 | |
| 104 return | |
| 105 | |
| 113 | 106 enable_s8: |
| 107 ; Check for Digital/Analog | |
| 108 bsf s8_npower ; Power-down S8 HUD | |
| 109 WAITMS d'1' ; Very short delay | |
| 110 bsf mcp_power ; Power-up intrumentation amp | |
| 111 btfss mcp_power | |
| 112 bra $-6 | |
| 113 banksel TXSTA2 | |
| 114 clrf TXSTA2 | |
| 115 clrf RCSTA2 | |
| 116 banksel common | |
| 117 | |
| 118 ; It may be digital, check for voltage when isolator is powered | |
| 119 bcf s8_npower ; Power S8 HUD | |
| 120 WAITMS d'1' ; Very short delay | |
| 121 | |
| 122 btfsc PORTG,2 ; RX2=1? | |
| 123 bra enable_s8_2 ; Yes, digital | |
| 124 WAITMS d'30' | |
| 125 btfsc PORTG,2 ; RX2=1? | |
| 126 bra enable_s8_2 ; Yes, digital | |
| 127 | |
| 128 ; Not found, set to analog (fail-safe) | |
| 129 | |
| 130 enable_s8_analog: | |
| 131 ; S8 Analog | |
| 132 bsf s8_npower ; Power-down S8 HUD | |
| 133 bcf s8_digital ; Clear flag | |
| 134 return | |
| 135 | |
| 136 enable_s8_2: ; S8 Digital | |
| 137 banksel BAUDCON2 | |
| 138 movlw b'00000000' ; BRG16=0 ; normal for S8 | |
| 139 movwf BAUDCON2 | |
| 140 banksel TXSTA2 | |
| 141 movlw b'00100000' ; BRGH=0, SYNC=0 | |
| 142 movwf TXSTA2 | |
| 143 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16MHz | |
| 144 movwf SPBRG2 | |
| 145 clrf SPBRGH2 | |
| 146 movlw b'10010000' | |
| 147 movwf RCSTA2 | |
| 148 banksel common | |
| 151 | 149 ; bcf s8_npower ; Power S8 HUD |
| 113 | 150 bsf s8_digital ; Set flag |
| 151 return | |
| 152 | |
| 0 | 153 ;============================================================================= |
| 154 global enable_rs232 | |
| 155 enable_rs232: | |
| 156 bcf TRISC,6 ; Output | |
| 157 call speed_normal ; 16MHz | |
| 158 enable_rs232_2: | |
| 159 movlw T2CON_NORMAL | |
| 160 cpfseq T2CON | |
| 161 bra enable_rs232_2 ; Wait until speed is normal | |
| 162 ;init serial port1 (TRISC6/7) | |
| 163 clrf RCSTA1 | |
| 164 clrf TXSTA1 | |
| 165 movlw b'00001000' ; BRG16=1 | |
| 166 movwf BAUDCON1 | |
| 167 movlw b'00100100' ; BRGH=1, SYNC=0 | |
| 168 movwf TXSTA1 | |
| 169 movlw .34 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0,79% Error to 115200 BAUD) | |
| 170 movwf SPBRG1 | |
| 171 clrf SPBRGH1 | |
| 172 movlw b'10010000' | |
| 173 movwf RCSTA1 | |
| 174 return | |
| 175 | |
| 176 global disable_rs232 | |
| 177 disable_rs232: | |
| 178 clrf RCSTA1 | |
| 179 clrf TXSTA1 ; UART disable | |
| 180 bsf TRISC,6 ; Input | |
| 181 return | |
| 182 | |
| 183 global rs232_wait_tx | |
| 184 rs232_wait_tx: | |
| 185 btfsc TXSTA1,TRMT ; Transmit Shift Register empty? | |
| 186 return ; Yes, return! | |
| 187 | |
| 113 | 188 btfss TXSTA1,TRMT ; RS232 Busy? |
| 0 | 189 bra rs232_wait_tx ; yes, wait... |
| 190 return ; Done. | |
| 191 | |
| 113 | 192 global rs232_wait_tx2 |
| 193 rs232_wait_tx2: | |
| 194 banksel TXSTA2 | |
| 195 btfsc TXSTA2,TRMT ; Transmit Shift Register empty? | |
| 196 bra rs232_wait_tx2_2 ; Yes, return! | |
| 197 | |
| 198 btfss TXSTA2,TRMT ; RS232 Busy? | |
| 199 bra rs232_wait_tx2 ; yes, wait... | |
| 200 rs232_wait_tx2_2: | |
| 201 banksel common | |
| 202 return ; Done. | |
| 203 | |
| 0 | 204 global rs232_get_byte |
| 205 rs232_get_byte: | |
| 206 bcf rs232_recieve_overflow ; clear flag | |
| 207 clrf uart1_temp | |
| 208 clrf uart2_temp | |
| 209 rs232_get_byte2: | |
| 210 btfsc PIR1,RCIF ; data arrived? | |
| 211 return | |
| 212 decfsz uart2_temp,F | |
| 213 bra rs232_get_byte2 | |
| 214 decfsz uart1_temp,F | |
| 215 bra rs232_get_byte2 | |
| 216 ; timeout occoured (about 20ms) | |
| 217 bsf rs232_recieve_overflow ; set flag | |
| 218 bcf RCSTA1,CREN ; Clear receiver status | |
| 219 bsf RCSTA1,CREN | |
| 220 return ; and return anyway | |
| 221 | |
| 222 END |