annotate src/eeprom_rs232.asm @ 113:f3062a611eef

Merge
author heinrichsweikamp
date Mon, 23 Jun 2014 16:14:33 +0200
parents 11d4fc797f74
children 939f1e83c4c2
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1 ;=============================================================================
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2 ;
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3 ; File eeprom_rs232.asm
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4 ;
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5 ; Internal EEPROM, RS232
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6 ;
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7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
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8 ;=============================================================================
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9 ; HISTORY
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10 ; 2011-08-06 : [mH] moving from OSTC code
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11
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12 #include "ostc3.inc"
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13 #include "start.inc"
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14 #include "tft.inc"
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15 #include "wait.inc"
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16 #include "strings.inc"
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17 #include "convert.inc"
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18 #include "adc_lightsensor.inc"
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19 #include "math.inc"
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20
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21 ;=============================================================================
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22 eeprom code 0xF00000+0x10
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23 ; Skip SERIAL number. Should not be overwritten.
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24 global eeprom_serial_save, eeprom_opt_backup
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25 eeprom_serial_save res 2
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26 eeprom_opt_backup res 0x3E
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27
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28 ;=============================================================================
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29 basic CODE
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30
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31 global write_int_eeprom_1
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32 write_int_eeprom_1:
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33 movwf EEADR
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34 bra write_eeprom ; writes and "returns" after write
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35
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36 global read_int_eeprom_1
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37 read_int_eeprom_1:
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38 movwf EEADR
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39 bra read_eeprom ; reads and "returns" after write
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40
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41 ;=============================================================================
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42 ; reads from internal eeprom
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43 ; Input: EEADRH:EEADR = EEPROM address.
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44 ; Output: EEDATA.
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45 ; Trashed: NONE.
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46 global read_eeprom
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47 read_eeprom:
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48 bcf EECON1,EEPGD
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49 bcf EECON1,CFGS
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50 bsf EECON1,RD
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51 return
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52
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53 ;=============================================================================
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54 ; writes into internal eeprom
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55 ; Input: EEADRH:EEADR = EEPROM address.
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56 ; EEDATA = byte to write.
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57 ; Trashed: WREG.
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58 global write_eeprom
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59 write_eeprom:
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60 bcf EECON1,EEPGD
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61 bcf EECON1,CFGS
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62 bsf EECON1,WREN
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63
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64 bcf INTCON,GIE ; even the RTC will be delayed for the next 5 instructions...
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65 movlw 0x55
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66 movwf EECON2
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67 movlw 0xAA
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68 movwf EECON2
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69 bsf EECON1,WR
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70 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now!
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71
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72 write_eep2:
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73 btfsc EECON1,WR
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74 bra write_eep2 ; wait about 4ms...
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75 bcf EECON1,WREN
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76 return
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77
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78 global disable_ir
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79 disable_ir:
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80 banksel TXSTA2
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81 clrf TXSTA2
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82 clrf RCSTA2
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83 banksel common
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84 bcf ir_power ; IR off
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85 bcf mcp_power ; Power-down intrumentation amp
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86 bsf s8_npower ; Power-down S8 HUD
0
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87 return
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88
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89 global enable_ir
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90 enable_ir:
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91 ;init serial port2 (TRISG2)
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92 btfsc c3_hardware
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93 bra enable_s8 ; Start S8
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94
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95 banksel BAUDCON2
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96 movlw b'00100000' ; BRG16=0 ; inverted for IR
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97 movwf BAUDCON2
0
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98 banksel TXSTA2
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99 movlw b'00100000' ; BRGH=0, SYNC=0
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100 movwf TXSTA2
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101 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16MHz
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102 movwf SPBRG2
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103 clrf SPBRGH2
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104 movlw b'10010000'
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105 movwf RCSTA2
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106 banksel common
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107 bsf ir_power ; Power-up IR
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108 btfss ir_power
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109 bra $-6
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110 return
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111
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112 enable_s8:
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113 ; Check for Digital/Analog
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114 bsf s8_npower ; Power-down S8 HUD
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115 WAITMS d'1' ; Very short delay
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116 bsf mcp_power ; Power-up intrumentation amp
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117 btfss mcp_power
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118 bra $-6
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119 banksel TXSTA2
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120 clrf TXSTA2
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121 clrf RCSTA2
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122 banksel common
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123
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124 ; It may be digital, check for voltage when isolator is powered
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125 bcf s8_npower ; Power S8 HUD
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126 WAITMS d'1' ; Very short delay
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127
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128 btfsc PORTG,2 ; RX2=1?
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129 bra enable_s8_2 ; Yes, digital
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130 WAITMS d'30'
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131 btfsc PORTG,2 ; RX2=1?
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132 bra enable_s8_2 ; Yes, digital
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133
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134 ; Not found, set to analog (fail-safe)
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135
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136 enable_s8_analog:
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137 ; S8 Analog
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138 bsf s8_npower ; Power-down S8 HUD
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139 bcf s8_digital ; Clear flag
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140 return
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141
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142 enable_s8_2: ; S8 Digital
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143 banksel BAUDCON2
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144 movlw b'00000000' ; BRG16=0 ; normal for S8
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145 movwf BAUDCON2
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146 banksel TXSTA2
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147 movlw b'00100000' ; BRGH=0, SYNC=0
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148 movwf TXSTA2
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149 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16MHz
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150 movwf SPBRG2
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151 clrf SPBRGH2
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152 movlw b'10010000'
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153 movwf RCSTA2
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154 banksel common
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155 bcf s8_npower ; Power S8 HUD
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156 bsf s8_digital ; Set flag
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157 return
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158
0
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159 ;=============================================================================
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160 global enable_rs232
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161 enable_rs232:
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162 bcf TRISC,6 ; Output
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163 bsf TRISC,7 ; Input
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164 call speed_normal ; 16MHz
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165 enable_rs232_2:
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166 movlw T2CON_NORMAL
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167 cpfseq T2CON
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168 bra enable_rs232_2 ; Wait until speed is normal
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169 ;init serial port1 (TRISC6/7)
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170 clrf RCSTA1
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171 clrf TXSTA1
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172 movlw b'00001000' ; BRG16=1
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173 movwf BAUDCON1
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174 movlw b'00100100' ; BRGH=1, SYNC=0
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175 movwf TXSTA1
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176 movlw .34 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0,79% Error to 115200 BAUD)
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177 movwf SPBRG1
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178 clrf SPBRGH1
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179 movlw b'10010000'
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180 movwf RCSTA1
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181 return
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182
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183 global disable_rs232
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184 disable_rs232:
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185 clrf RCSTA1
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186 clrf TXSTA1 ; UART disable
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187 bsf TRISC,6 ; Input
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188 bsf TRISC,7 ; Input
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189 return
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190
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191 global rs232_wait_tx
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192 rs232_wait_tx:
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193 btfsc TXSTA1,TRMT ; Transmit Shift Register empty?
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194 return ; Yes, return!
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195
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196 btfss TXSTA1,TRMT ; RS232 Busy?
0
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197 bra rs232_wait_tx ; yes, wait...
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198 return ; Done.
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199
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200 global rs232_wait_tx2
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201 rs232_wait_tx2:
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202 banksel TXSTA2
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203 btfsc TXSTA2,TRMT ; Transmit Shift Register empty?
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204 bra rs232_wait_tx2_2 ; Yes, return!
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205
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206 btfss TXSTA2,TRMT ; RS232 Busy?
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207 bra rs232_wait_tx2 ; yes, wait...
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208 rs232_wait_tx2_2:
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209 banksel common
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210 return ; Done.
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211
0
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212 global rs232_get_byte
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213 rs232_get_byte:
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214 bcf PIR1,RCIF ; clear flag
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215 bcf rs232_recieve_overflow ; clear flag
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216 clrf uart1_temp
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217 clrf uart2_temp
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218 rs232_get_byte2:
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219 btfsc PIR1,RCIF ; data arrived?
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220 return
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221 ; bra rs232_get_byte3
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222
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223 decfsz uart2_temp,F
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224 bra rs232_get_byte2
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225 decfsz uart1_temp,F
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226 bra rs232_get_byte2
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227 ; timeout occoured (about 20ms)
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228 bsf rs232_recieve_overflow ; set flag
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229 ;rs232_get_byte3:
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230 bcf RCSTA1,CREN ; Clear receiver status
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231 bsf RCSTA1,CREN
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232 return ; and return anyway
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233
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234 END