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annotate src/i2c.asm @ 113:f3062a611eef

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Merge
author heinrichsweikamp
date Mon, 23 Jun 2014 16:14:33 +0200
parents 9b7dd3103545
children 683321c09cfa
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1 ;=============================================================================
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2 ;
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3 ; File i2c.asm
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4 ;
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5 ; I2C Interface to HMC5883L and MMA8452Q
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6 ;
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7 ; HMC5883L's read address (8-Bit): 0x3D
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8 ; HMC5883L's write address (8-Bit): 0x3C
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9 ;
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10 ; MMA8452Q's read address (8-Bit): 0x39
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11 ; MMA8452Q's write address (8-Bit): 0x38
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12 ;
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13 ; Copyright (c) 2012, JD Gascuel, HeinrichsWeikamp, all right reserved.
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14 ;=============================================================================
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15 ; HISTORY
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16 ; 2012-08-22 : [mH] Creation
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17
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18
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19 #include "ostc3.inc" ; Mandatory header
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20 #include "wait.inc"
113
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21 #include "math.inc"
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22
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23 #DEFINE battery_offset .27302 ; 65536-(3,25Ah/0,085mAh)
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24 #DEFINE battery_devider .382 ; 3,25Ah/0,085mAh/100 [%]
0
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25
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26 i2c CODE
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27
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28 WaitMSSP:
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29 decfsz i2c_temp,F ; check for timeout during I2C action
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30 bra WaitMSSP2
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31 bra I2CFail ; timeout occured
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32 WaitMSSP2:
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33 btfss PIR1,SSPIF
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34 bra WaitMSSP
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35 clrf i2c_temp
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36 bcf PIR1,SSPIF
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37 nop
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38 return
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39
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40 I2C_WaitforACK:
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41 btfss SSPCON2,ACKSTAT ; checks for ACK bit from slave
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42 return
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43 I2CFail:
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44 rcall I2CReset ; I2C Reset
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45 bcf PIR1,SSPIF
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46 clrf i2c_temp
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47 return
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48
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49 I2CReset: ; Something went wrong (Slave holds SDA low?)
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50 clrf SSP1CON1 ; wake-up slave and reset entire module
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51 clrf SSP1CON2
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52 clrf SSP1STAT
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53 bcf TRISC,3 ; SCL OUTPUT
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54 bsf TRISC,4 ; SDA Input
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55 bcf PORTC,3
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56 movlw d'9'
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57 movwf i2c_temp ; clock-out 9 clock cycles manually
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58 I2CReset_1:
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59 bsf PORTC,3 ; SCL=1
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60 nop
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61 nop
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62 nop
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63 nop
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64 btfsc PORTC,4 ; SDA=1?
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65 bra I2CReset_2 ; =1, SDA has been released from slave
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66 bcf PORTC,3 ; SCL=0
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67 nop
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68 nop
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69 bcf PORTC,3
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70 nop
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71 nop
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72 decfsz i2c_temp,F
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73 bra I2CReset_1 ; check for nine clock cycles
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74 I2CReset_2:
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75 bsf TRISC,3 ; SCL Input
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76 clrf SSP1CON1 ; setup I²C Mode
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77 WAITMS d'10' ; Reset-Timeout for I2C devices
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78 movlw b'00000000' ; with slew rate control
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79 movwf SSPSTAT
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80 movlw b'00101000'
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81 movwf SSP1CON1
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82 movlw b'00000000'
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83 movwf SSP1CON2
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84 movlw 0x27
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85 movwf SSP1ADD
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86 return
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87
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88 I2C_TX:
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89 movwf SSP1BUF
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90 rcall WaitMSSP
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91 bra I2C_WaitforACK ; Returns...
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92
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93 I2C_TwoBytesRX_div16: ; Get two bytes and devide lo:hi/16 (signed)
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94 rcall I2C_OneByteRX ; Get one byte
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95 movff SSP1BUF,hi ; Data Byte
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96 rcall I2C_OneByteRX ; Get one byte
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97 movff SSP1BUF,lo ; Data Byte
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98 I2C_TwoBytesRX_div16_2: ; devide lo:hi/16 (signed) only
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99 bcf STATUS,C
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100 btfsc hi,7 ; Copy sign bit to carry
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101 bsf STATUS,C
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102 rrcf hi ; /2
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103 rrcf lo
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104 bcf STATUS,C
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105 btfsc hi,7 ; Copy sign bit to carry
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106 bsf STATUS,C
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107 rrcf hi ; /4
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108 rrcf lo
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109 bcf STATUS,C
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110 btfsc hi,7 ; Copy sign bit to carry
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111 bsf STATUS,C
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112 rrcf hi ; /8
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113 rrcf lo
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114 bcf STATUS,C
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115 btfsc hi,7 ; Copy sign bit to carry
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116 bsf STATUS,C
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117 rrcf hi ; /16
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118 rrcf lo
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119 return
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120
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121 global I2C_RX_accelerometer
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122 I2C_RX_accelerometer:
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123 bsf SSP1CON2,SEN ; Start condition
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124 rcall WaitMSSP
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125 movlw 0x38 ; address
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126 rcall I2C_TX
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127 movlw 0x01
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128 rcall I2C_TX
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129 bsf SSP1CON2,RSEN ; Repeated start condition (!)
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130 rcall WaitMSSP
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131 movlw 0x39 ; address
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132 rcall I2C_TX
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133
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134 ; Chip orientation on the PCB requires
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135 ; Original = Corrected
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136 ; x = -x
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137 ; y = -y
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138 ; z = -z
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139
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140
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141 rcall I2C_TwoBytesRX_div16 ; Get two bytes and devide /16 (signed)
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142 comf hi ; 16bit sign change.
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143 negf lo
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144 btfsc STATUS,C ; Carry to propagate ?
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145 incf hi,F ; YES: do it.
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146 movff lo,accel_DX+0
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147 movff hi,accel_DX+1 ; Copy result
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148
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149 rcall I2C_TwoBytesRX_div16 ; Get two bytes and devide /16 (signed)
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150 comf hi ; 16bit sign change.
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151 negf lo
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152 btfsc STATUS,C ; Carry to propagate ?
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153 incf hi,F ; YES: do it.
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154 movff lo,accel_DY+0
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155 movff hi,accel_DY+1 ; Copy result
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156
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157 rcall I2C_OneByteRX ; Get one byte
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158 movff SSP1BUF,hi ; Data Byte
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159 bsf SSP1CON2, RCEN ; Enable recieve mode
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160 rcall WaitMSSP
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161 ; According to datasheet there should be no Master Acknowlegde for the last Byte (accel_DZ+0)...
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162 movff SSP1BUF,lo ; Data Byte
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163
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164 rcall I2C_TwoBytesRX_div16_2; devide lo:hi/16 (signed) only
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165 comf hi ; 16bit sign change.
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166 negf lo
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167 btfsc STATUS,C ; Carry to propagate ?
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168 incf hi,F ; YES: do it.
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169 movff lo,accel_DZ+0
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170 movff hi,accel_DZ+1 ; Copy result
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171
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172 bsf SSP1CON2,PEN ; Stop condition
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173 rcall WaitMSSP
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174 return
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175
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176 I2C_OneByteRX:
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177 bsf SSP1CON2, RCEN ; Enable recieve mode
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178 rcall WaitMSSP
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179 bsf SSP1CON2,ACKEN ; Master acknowlegde
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180 rcall WaitMSSP
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181 return
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182
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183 global I2C_RX_compass
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184 I2C_RX_compass:
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185 bsf SSP1CON2,SEN ; Start condition
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186 rcall WaitMSSP
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187 movlw 0x3C ; address
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188 rcall I2C_TX
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189 movlw 0x03
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190 rcall I2C_TX
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191 bsf SSP1CON2,PEN ; Stop condition
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192 rcall WaitMSSP
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193
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194 bcf PIR1,SSPIF
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195 bsf SSP1CON2,SEN ; Start condition
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196 rcall WaitMSSP
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197 movlw 0x3D ; address
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198 rcall I2C_TX
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199
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200 ; Compass IC sends data in following order:
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201 ; x MSB
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202 ; x LSB
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203 ; z MSB
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204 ; z LSB
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205 ; y MSB
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206 ; y LSB
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207
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208 ; Chip orientation on the PCB requires
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209 ; Original = Corrected
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210 ; x = -y
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211 ; z = z
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212 ; y = x
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213
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214 rcall I2C_OneByteRX ; Get one byte
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215 movff SSP1BUF,compass_DY+1; Data Byte
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216 rcall I2C_OneByteRX ; Get one byte
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217 movff SSP1BUF,compass_DY+0; Data Byte
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218 banksel compass_DY
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219 comf compass_DY+1 ; 16bit sign change.
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220 negf compass_DY+0
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221 btfsc STATUS,C ; Carry to propagate ?
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222 incf compass_DY+1,F ; YES: do it.
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223 banksel common
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224 rcall I2C_OneByteRX ; Get one byte
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225 movff SSP1BUF,compass_DZ+1; Data Byte
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226 rcall I2C_OneByteRX ; Get one byte
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227 movff SSP1BUF,compass_DZ+0; Data Byte
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228 rcall I2C_OneByteRX ; Get one byte
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229 movff SSP1BUF,compass_DX+1; Data Byte
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230 bsf SSP1CON2, RCEN ; Enable recieve mode
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231 rcall WaitMSSP
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232 movff SSP1BUF,compass_DX+0; Data Byte
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233 bsf SSP1CON2,PEN ; Stop condition
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234 rcall WaitMSSP
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235 return
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236
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237 global I2C_init_compass
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238 I2C_init_compass:
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239 bsf SSP1CON2,SEN ; Start condition
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240 rcall WaitMSSP
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241 movlw 0x3C ; address
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242 rcall I2C_TX
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243 movlw 0x00
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244 rcall I2C_TX
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245 ; movlw b'01101001' ; ConfigA: 3Hz, 8 Samples averaged, Test Mode (Positive Bias)
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246 movlw b'01101000' ; ConfigA: 3Hz, 8 Samples averaged
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247 rcall I2C_TX
20
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248 bra I2C_init_compass_common
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249
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250 global I2C_init_compass_fast
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251 I2C_init_compass_fast:
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252 bsf SSP1CON2,SEN ; Start condition
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253 rcall WaitMSSP
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254 movlw 0x3C ; address
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255 rcall I2C_TX
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256 movlw 0x00
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257 rcall I2C_TX
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258 movlw b'00111000' ; ConfigA: 75Hz, 2 Samples averaged
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259 ; movlw b'00111001' ; ConfigA: 75Hz, 2 Samples averaged, Test Mode (Positive Bias)
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260 rcall I2C_TX
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261 I2C_init_compass_common:
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262 movff opt_compass_gain,i2c_temp ; 0-7 (230LSB/Gauss to 1370LSB/Gaus)
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263 swapf i2c_temp,F
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264 comf i2c_temp,F
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265 bcf STATUS,C
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266 rlcf i2c_temp
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267 movf i2c_temp,W
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268 clrf i2c_temp
0
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269 rcall I2C_TX
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270 movlw b'00000000' ; Continous Mode
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271 rcall I2C_TX
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parents:
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272 bsf SSP1CON2,PEN ; Stop condition
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parents:
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273 rcall WaitMSSP
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parents:
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274 bsf compass_enabled
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parents:
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275 return
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parents:
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276
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parents:
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277 global I2C_sleep_compass
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parents:
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278 I2C_sleep_compass:
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parents:
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279 bsf SSP1CON2,SEN ; Start condition
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parents:
diff changeset
280 rcall WaitMSSP
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parents:
diff changeset
281 movlw 0x3C ; address
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parents:
diff changeset
282 rcall I2C_TX
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parents:
diff changeset
283 movlw 0x00
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parents:
diff changeset
284 rcall I2C_TX
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parents:
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285 movlw b'01101000' ; ConfigA
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parents:
diff changeset
286 rcall I2C_TX
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parents:
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287 movlw b'00100000' ; ConfigB
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parents:
diff changeset
288 rcall I2C_TX
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parents:
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289 movlw b'00000010' ; Idle Mode
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parents:
diff changeset
290 rcall I2C_TX
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parents:
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291 bsf SSP1CON2,PEN ; Stop condition
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parents:
diff changeset
292 rcall WaitMSSP
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parents:
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293 bcf compass_enabled
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parents:
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294 return
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parents:
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295
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parents:
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296
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297 global I2C_init_accelerometer
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parents:
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298 I2C_init_accelerometer:
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parents:
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299 rcall I2C_sleep_accelerometer ; Regs can only be changed in St.By mode
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parents:
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300
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parents:
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301 bsf SSP1CON2,SEN ; Start condition
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parents:
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302 rcall WaitMSSP
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parents:
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303 movlw 0x38 ; address
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parents:
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304 rcall I2C_TX
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parents:
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305 movlw 0x0E ; XYZ_DATA_CFG
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parents:
diff changeset
306 rcall I2C_TX
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parents:
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307 movlw b'00000000' ; High pass Filter=0 , +/- 2g range
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parents:
diff changeset
308 rcall I2C_TX
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parents:
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309 bsf SSP1CON2,PEN ; Stop condition
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parents:
diff changeset
310 rcall WaitMSSP
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parents:
diff changeset
311
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parents:
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312
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parents:
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313 bsf SSP1CON2,SEN ; Start condition
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parents:
diff changeset
314 rcall WaitMSSP
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parents:
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315 movlw 0x38 ; address
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parents:
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316 rcall I2C_TX
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parents:
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317 movlw 0x2A ; CTRL_REG1
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parents:
diff changeset
318 rcall I2C_TX
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parents:
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319 ; movlw b'00110000' ; CTRL_REG1: 160ms data rate, St.By Mode
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parents:
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320 movlw b'00110100' ; CTRL_REG1: 160ms data rate, St.By Mode, reduced noise mode
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parents:
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321 rcall I2C_TX
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parents:
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322 movlw b'00000010' ; CTRL_REG2: High Res in Active mode
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parents:
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323 rcall I2C_TX
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parents:
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324 bsf SSP1CON2,PEN ; Stop condition
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parents:
diff changeset
325 rcall WaitMSSP
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parents:
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326
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327 bsf SSP1CON2,SEN ; Start condition
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parents:
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328 rcall WaitMSSP
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parents:
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329 movlw 0x38 ; address
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parents:
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330 rcall I2C_TX
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parents:
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331 movlw 0x2A ; CTRL_REG1
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parents:
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332 rcall I2C_TX
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parents:
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333 ; movlw b'00110001' ; CTRL_REG1: 160ms data rate, Active Mode
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parents:
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334 movlw b'00110101' ; CTRL_REG1: 160ms data rate, St.By Mode, reduced noise mode, Active Mode
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parents:
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335 rcall I2C_TX
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parents:
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336 bsf SSP1CON2,PEN ; Stop condition
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parents:
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337 rcall WaitMSSP
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parents:
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338
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339 return
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parents:
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340
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341 global I2C_sleep_accelerometer
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parents:
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342 I2C_sleep_accelerometer:
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343 bsf SSP1CON2,SEN ; Start condition
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parents:
diff changeset
344 rcall WaitMSSP
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parents:
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345 movlw 0x38 ; address
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parents:
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346 rcall I2C_TX
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parents:
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347 movlw 0x2A ; CTRL_REG1
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parents:
diff changeset
348 rcall I2C_TX
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parents:
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349 movlw b'00000000' ; St. By Mode
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parents:
diff changeset
350 rcall I2C_TX
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parents:
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351 bsf SSP1CON2,PEN ; Stop condition
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parents:
diff changeset
352 rcall WaitMSSP
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parents:
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353 return
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parents:
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354
113
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parents: 20
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355 global lt2942_init
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parents: 20
diff changeset
356 lt2942_init: ; Setup Control register B
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parents: 20
diff changeset
357 clrf i2c_temp
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parents: 20
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358 movlw 0x01 ; Point to control reg B
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parents: 20
diff changeset
359 call I2C_TX_GAUGE
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parents: 20
diff changeset
360 movlw b'11111000' ; Automatic conversion every two seconds
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parents: 20
diff changeset
361 movff WREG, SSP1BUF ; Data Byte
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parents: 20
diff changeset
362 rcall WaitMSSP
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parents: 20
diff changeset
363 rcall I2C_WaitforACK
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parents: 20
diff changeset
364 bsf SSP1CON2,PEN ; Stop condition
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parents: 20
diff changeset
365 rcall WaitMSSP
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parents: 20
diff changeset
366 return
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parents: 20
diff changeset
367
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parents: 20
diff changeset
368 global lt2942_get_status
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parents: 20
diff changeset
369 lt2942_get_status: ; Read status register
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parents: 20
diff changeset
370 bcf c3_hardware ; Clear flag
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parents: 20
diff changeset
371 clrf i2c_temp
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parents: 20
diff changeset
372 movlw 0x00 ; Point to Status reg
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parents: 20
diff changeset
373 call I2C_TX_GAUGE
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parents: 20
diff changeset
374 call I2C_RX_GAUGE
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parents: 20
diff changeset
375 movff SSP1BUF,WREG
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parents: 20
diff changeset
376 btfss WREG,7 ; 2942 found?
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parents: 20
diff changeset
377 bsf c3_hardware ; Yes, set flag
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parents: 20
diff changeset
378 bsf SSP1CON2,PEN ; Stop condition
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parents: 20
diff changeset
379 rcall WaitMSSP
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parents: 20
diff changeset
380 return
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parents: 20
diff changeset
381
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parents: 20
diff changeset
382
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parents: 20
diff changeset
383 global lt2942_get_voltage
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parents: 20
diff changeset
384 lt2942_get_voltage: ; Read battery voltage registers
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parents: 20
diff changeset
385 clrf i2c_temp
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parents: 20
diff changeset
386 movlw 0x08 ; Point to voltage registers
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parents: 20
diff changeset
387 call I2C_TX_GAUGE
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parents: 20
diff changeset
388 call I2C_RX_GAUGE
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parents: 20
diff changeset
389 bsf SSP1CON2,ACKEN ; Master acknowlegde
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parents: 20
diff changeset
390 rcall WaitMSSP
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parents: 20
diff changeset
391 movff SSP1BUF,xA+1
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parents: 20
diff changeset
392 bsf SSP1CON2, RCEN ; Enable recieve mode
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parents: 20
diff changeset
393 rcall WaitMSSP
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parents: 20
diff changeset
394 movff SSP1BUF,xA+0
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parents: 20
diff changeset
395 bsf SSP1CON2,PEN ; Stop condition
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parents: 20
diff changeset
396 rcall WaitMSSP
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parents: 20
diff changeset
397
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parents: 20
diff changeset
398 ; banksel common
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parents: 20
diff changeset
399 ; xA:2 loaded with raw values
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parents: 20
diff changeset
400 movlw LOW .6000
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parents: 20
diff changeset
401 movwf xB+0
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parents: 20
diff changeset
402 movlw HIGH .6000
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parents: 20
diff changeset
403 movwf xB+1
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parents: 20
diff changeset
404 call mult16x16 ;xA*xB=xC
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parents: 20
diff changeset
405
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parents: 20
diff changeset
406 ; devide xC (32bit)/65535 for result in mV (16bit)
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parents: 20
diff changeset
407 movlw .16
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parents: 20
diff changeset
408 movwf i2c_temp
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parents: 20
diff changeset
409 lt2942_get_voltage2:
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parents: 20
diff changeset
410 bcf STATUS,C
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parents: 20
diff changeset
411 rrcf xC+3,F
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parents: 20
diff changeset
412 rrcf xC+2,F
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parents: 20
diff changeset
413 rrcf xC+1,F
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parents: 20
diff changeset
414 rrcf xC+0,F
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parents: 20
diff changeset
415 decfsz i2c_temp,F
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parents: 20
diff changeset
416 bra lt2942_get_voltage2
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parents: 20
diff changeset
417
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parents: 20
diff changeset
418 ; Update battery voltage in mV
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parents: 20
diff changeset
419 movff xC+1,batt_voltage+1
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parents: 20
diff changeset
420 movff xC+0,batt_voltage+0
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parents: 20
diff changeset
421 return
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parents: 20
diff changeset
422
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parents: 20
diff changeset
423 ; global lt2942_get_temperature
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parents: 20
diff changeset
424 ;lt2942_get_temperature: ; Read temperature registers
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parents: 20
diff changeset
425 ; clrf i2c_temp
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parents: 20
diff changeset
426 ; movlw 0x0C ; Point to temperature registers
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parents: 20
diff changeset
427 ; call I2C_TX_GAUGE
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parents: 20
diff changeset
428 ; call I2C_RX
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parents: 20
diff changeset
429 ; bsf SSP1CON2,ACKEN ; Master acknowlegde
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parents: 20
diff changeset
430 ; rcall WaitMSSP
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parents: 20
diff changeset
431 ; movff SSP1BUF,xA+1
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parents: 20
diff changeset
432 ; bsf SSP1CON2, RCEN ; Enable recieve mode
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parents: 20
diff changeset
433 ; rcall WaitMSSP
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parents: 20
diff changeset
434 ; movff SSP1BUF,xA+0
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parents: 20
diff changeset
435 ; bsf SSP1CON2,PEN ; Stop condition
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parents: 20
diff changeset
436 ; rcall WaitMSSP
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parents: 20
diff changeset
437 ;
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parents: 20
diff changeset
438 ;; banksel common
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parents: 20
diff changeset
439 ; ; xA:2 loaded with raw values
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parents: 20
diff changeset
440 ; movlw LOW .6000
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parents: 20
diff changeset
441 ; movwf xB+0
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parents: 20
diff changeset
442 ; movlw HIGH .6000
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parents: 20
diff changeset
443 ; movwf xB+1
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parents: 20
diff changeset
444 ; call mult16x16 ;xA*xB=xC
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parents: 20
diff changeset
445 ;
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parents: 20
diff changeset
446 ; ; devide xC (32bit)/65535 for result in 0.1K (16bit)
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parents: 20
diff changeset
447 ; movlw .16
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parents: 20
diff changeset
448 ; movwf i2c_temp
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parents: 20
diff changeset
449 ;lt2942_get_temperature2:
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parents: 20
diff changeset
450 ; bcf STATUS,C
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parents: 20
diff changeset
451 ; rrcf xC+3,F
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parents: 20
diff changeset
452 ; rrcf xC+2,F
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parents: 20
diff changeset
453 ; rrcf xC+1,F
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parents: 20
diff changeset
454 ; rrcf xC+0,F
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parents: 20
diff changeset
455 ; decfsz i2c_temp,F
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parents: 20
diff changeset
456 ; bra lt2942_get_temperature2
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parents: 20
diff changeset
457 ;
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parents: 20
diff changeset
458 ; movff xC+1,sub_a+1
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parents: 20
diff changeset
459 ; movff xC+0,sub_a+0
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parents: 20
diff changeset
460 ; movlw LOW .2731 ; Kelvin to Celcius offset
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parents: 20
diff changeset
461 ; movwf sub_b+0
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parents: 20
diff changeset
462 ; movlw HIGH .2731 ; Kelvin to Celcius offset
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parents: 20
diff changeset
463 ; movwf sub_b+1
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parents: 20
diff changeset
464 ; call subU16 ; sub_c = sub_a - sub_b (with UNSIGNED values)
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parents: 20
diff changeset
465 ;
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parents: 20
diff changeset
466 ; ; Update batttery_temperature in 0.1°C
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parents: 20
diff changeset
467 ; movff sub_c+1,battery_temperature+1
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parents: 20
diff changeset
468 ; movff sub_c+0,battery_temperature+0
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parents: 20
diff changeset
469 ; return
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parents: 20
diff changeset
470
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parents: 20
diff changeset
471 global lt2942_get_accumulated_charge
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parents: 20
diff changeset
472 lt2942_get_accumulated_charge: ; Read accumulated charge and compute percent
heinrichsweikamp
parents: 20
diff changeset
473 clrf i2c_temp
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parents: 20
diff changeset
474 movlw 0x02 ; Point to accumulated charge registers
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parents: 20
diff changeset
475 call I2C_TX_GAUGE
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parents: 20
diff changeset
476 call I2C_RX_GAUGE
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parents: 20
diff changeset
477 bsf SSP1CON2,ACKEN ; Master acknowlegde
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parents: 20
diff changeset
478 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
479 movff SSP1BUF,sub_a+1 ; battery_acumulated_charge+1
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parents: 20
diff changeset
480 bsf SSP1CON2, RCEN ; Enable recieve mode
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parents: 20
diff changeset
481 rcall WaitMSSP
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parents: 20
diff changeset
482 movff SSP1BUF,sub_a+0 ; battery_acumulated_charge+0
heinrichsweikamp
parents: 20
diff changeset
483 bsf SSP1CON2,PEN ; Stop condition
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parents: 20
diff changeset
484 rcall WaitMSSP
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parents: 20
diff changeset
485
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parents: 20
diff changeset
486 ; Compute batt_percent
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parents: 20
diff changeset
487 ; charge-battery_offset/382
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parents: 20
diff changeset
488 movlw LOW battery_offset
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parents: 20
diff changeset
489 movwf sub_b+0
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parents: 20
diff changeset
490 movlw HIGH battery_offset
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parents: 20
diff changeset
491 movwf sub_b+1
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parents: 20
diff changeset
492 call subU16 ; sub_c = sub_a - sub_b (with signed values)
heinrichsweikamp
parents: 20
diff changeset
493
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parents: 20
diff changeset
494 clrf batt_percent ; Set to zero
heinrichsweikamp
parents: 20
diff changeset
495 btfsc neg_flag ; result negative?
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parents: 20
diff changeset
496 return ; Yes, done.
heinrichsweikamp
parents: 20
diff changeset
497
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parents: 20
diff changeset
498 ; > Zero, set batt_percent properly
heinrichsweikamp
parents: 20
diff changeset
499 movff sub_c+0,xA+0
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parents: 20
diff changeset
500 movff sub_c+1,xA+1
heinrichsweikamp
parents: 20
diff changeset
501 movlw LOW battery_devider
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parents: 20
diff changeset
502 movwf xB+0
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parents: 20
diff changeset
503 movlw HIGH battery_devider
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parents: 20
diff changeset
504 movwf xB+1
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parents: 20
diff changeset
505 call div16x16 ;xA/xB=xC with xA+0 as remainder, uses divB as temp variable
heinrichsweikamp
parents: 20
diff changeset
506 movff xC+0,batt_percent
heinrichsweikamp
parents: 20
diff changeset
507 return
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parents: 20
diff changeset
508
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parents: 20
diff changeset
509 global lt2942_charge_done
heinrichsweikamp
parents: 20
diff changeset
510 lt2942_charge_done: ; Reset accumulating registers to 0xFFFF
heinrichsweikamp
parents: 20
diff changeset
511 clrf i2c_temp
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parents: 20
diff changeset
512 movlw 0x02 ; Point to accumulated charge registers
heinrichsweikamp
parents: 20
diff changeset
513 call I2C_TX_GAUGE
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parents: 20
diff changeset
514 movlw 0xFF
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parents: 20
diff changeset
515 movff WREG, SSP1BUF ; Data Byte
heinrichsweikamp
parents: 20
diff changeset
516 rcall WaitMSSP
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parents: 20
diff changeset
517 rcall I2C_WaitforACK
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parents: 20
diff changeset
518 movlw 0xFF
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parents: 20
diff changeset
519 movff WREG, SSP1BUF ; Data Byte
heinrichsweikamp
parents: 20
diff changeset
520 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
521 rcall I2C_WaitforACK
heinrichsweikamp
parents: 20
diff changeset
522 bsf SSP1CON2,PEN ; Stop condition
heinrichsweikamp
parents: 20
diff changeset
523 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
524 return
heinrichsweikamp
parents: 20
diff changeset
525
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parents: 20
diff changeset
526 I2C_TX_GAUGE: ; Sends a byte to the LT2942 Gauge IC
heinrichsweikamp
parents: 20
diff changeset
527 movwf i2c_temp+1 ; Data byte
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parents: 20
diff changeset
528 bsf SSP1CON2,SEN ; Start condition
heinrichsweikamp
parents: 20
diff changeset
529 rcall WaitMSSP
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parents: 20
diff changeset
530 movlw b'11001000' ; Address byte + Write bit
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parents: 20
diff changeset
531 movwf SSP1BUF ; control byte
heinrichsweikamp
parents: 20
diff changeset
532 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
533 rcall I2C_WaitforACK
heinrichsweikamp
parents: 20
diff changeset
534 movff i2c_temp+1, SSP1BUF ; Data Byte
heinrichsweikamp
parents: 20
diff changeset
535 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
536 rcall I2C_WaitforACK
heinrichsweikamp
parents: 20
diff changeset
537 return
heinrichsweikamp
parents: 20
diff changeset
538
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parents: 20
diff changeset
539 I2C_RX_GAUGE:
heinrichsweikamp
parents: 20
diff changeset
540 bsf SSP1CON2,SEN ; Start condition
heinrichsweikamp
parents: 20
diff changeset
541 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
542 movlw b'11001001' ; Address byte + Read bit
heinrichsweikamp
parents: 20
diff changeset
543 movwf SSP1BUF ; control byte
heinrichsweikamp
parents: 20
diff changeset
544 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
545 rcall I2C_WaitforACK
heinrichsweikamp
parents: 20
diff changeset
546 bsf SSP1CON2, RCEN ; Enable recieve mode
heinrichsweikamp
parents: 20
diff changeset
547 rcall WaitMSSP
heinrichsweikamp
parents: 20
diff changeset
548 return
heinrichsweikamp
parents: 20
diff changeset
549
heinrichsweikamp
parents: 20
diff changeset
550
0
heinrichsweikamp
parents:
diff changeset
551
heinrichsweikamp
parents:
diff changeset
552 END