annotate src/eeprom_rs232.asm @ 620:cd986267a5ca

potential compass bug "fixed"
author heinrichsweikamp
date Fri, 22 Feb 2019 16:30:05 +0100
parents ca4556fb60b9
children c40025d8e750
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1 ;=============================================================================
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2 ;
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ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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3 ; File eeprom_rs232.asm V2.99a
0
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4 ;
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5 ; Internal EEPROM, RS232
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6 ;
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7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
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8 ;=============================================================================
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9 ; HISTORY
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10 ; 2011-08-06 : [mH] moving from OSTC code
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11
275
653a3ab08062 rename into hwOS
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12 #include "hwos.inc"
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13 #include "wait.inc"
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14 #include "shared_definitions.h"
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15 #include "rtc.inc"
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16
b455b31ce022 work on 2.97 stable
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17 write_int_eeprom macro eeprom_address
b455b31ce022 work on 2.97 stable
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18 movlw eeprom_address
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19 call write_int_eeprom_1
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20 endm
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21
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22 read_int_eeprom macro eeprom_address
b455b31ce022 work on 2.97 stable
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23 movlw eeprom_address
b455b31ce022 work on 2.97 stable
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24 call read_int_eeprom_1
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25 endm
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26
b455b31ce022 work on 2.97 stable
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27 ;=============================================================================
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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28 eeprom code 0xF00000+0x10
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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29 ; skip SERIAL number - it should not be overwritten
582
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30
b455b31ce022 work on 2.97 stable
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31 global eeprom_serial_save
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32 global eeprom_opt_backup
b455b31ce022 work on 2.97 stable
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33
b455b31ce022 work on 2.97 stable
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34 eeprom_serial_save res 2
b455b31ce022 work on 2.97 stable
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35 eeprom_opt_backup res 0x3E
0
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36
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37 ;=============================================================================
604
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38 ee_rs232 CODE
0
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39
582
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40 global write_int_eeprom_1
0
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41 write_int_eeprom_1:
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42 movwf EEADR
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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43 bra write_eeprom ; writes and "returns" after write
582
b455b31ce022 work on 2.97 stable
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44
0
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45
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46 global read_int_eeprom_1
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47 read_int_eeprom_1:
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48 movwf EEADR
604
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49 bra read_eeprom ; reads and "returns" after write
0
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50
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51 ;=============================================================================
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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52 ; reads from internal EEPROM
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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53 ; Input: EEADRH:EEADR = EEPROM address
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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54 ; Output: EEDATA
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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55 ; Trashed: NONE
0
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56 global read_eeprom
582
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57 read_eeprom:
0
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58 bcf EECON1,EEPGD
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59 bcf EECON1,CFGS
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60 bsf EECON1,RD
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61 return
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62
604
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63 ;=============================================================================
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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64 ; writes into internal EEPROM
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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65 ; Input: EEADRH:EEADR = EEPROM address
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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66 ; EEDATA = byte to write
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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67 ; Trashed: WREG
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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68 global write_eeprom
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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69 write_eeprom:
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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70 bcf EECON1,EEPGD
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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71 bcf EECON1,CFGS
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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72 bsf EECON1,WREN
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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73
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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74 bcf INTCON,GIE ; disable interrupts for the next 5 instructions
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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75 movlw 0x55
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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76 movwf EECON2
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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77 movlw 0xAA
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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78 movwf EECON2
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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79 bsf EECON1,WR
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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80 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now!
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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81
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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82 write_eep2:
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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83 btfsc EECON1,WR
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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84 bra write_eep2 ; wait about 4ms...
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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85 bcf EECON1,WREN
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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86 return
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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87
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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88
582
b455b31ce022 work on 2.97 stable
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89 global disable_ir_s8
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90 disable_ir_s8:
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91 banksel TXSTA2
b455b31ce022 work on 2.97 stable
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92 clrf TXSTA2
b455b31ce022 work on 2.97 stable
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93 clrf RCSTA2
b455b31ce022 work on 2.97 stable
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94 banksel common
b455b31ce022 work on 2.97 stable
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95 bcf ir_power ; IR off
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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96 bcf mcp_power ; power-down instrumentation amp
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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97 bsf s8_npower ; power-down S8 HUD
0
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98 return
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99
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100
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101 global enable_ir_s8
187
669b5d00706d CHANGE: Longer timeout (4 min) for calibration menu
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102 enable_ir_s8:
0
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103 ;init serial port2 (TRISG2)
582
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104 btfsc analog_o2_input
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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105 bra enable_s8 ; start S8
113
heinrichsweikamp
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106
582
b455b31ce022 work on 2.97 stable
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107 banksel BAUDCON2
b455b31ce022 work on 2.97 stable
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108 movlw b'00100000' ; BRG16=0 ; inverted for IR
113
heinrichsweikamp
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109 movwf BAUDCON2
582
b455b31ce022 work on 2.97 stable
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110 movlw b'00100000' ; BRGH=0, SYNC=0
b455b31ce022 work on 2.97 stable
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111 movwf TXSTA2
604
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112 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16 MHz
582
b455b31ce022 work on 2.97 stable
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113 movwf SPBRG2
b455b31ce022 work on 2.97 stable
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114 movlw b'10010000'
b455b31ce022 work on 2.97 stable
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115 movwf RCSTA2
b455b31ce022 work on 2.97 stable
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116 banksel common
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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117 bsf ir_power ; power-up IR
582
b455b31ce022 work on 2.97 stable
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118 btfss ir_power
b455b31ce022 work on 2.97 stable
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119 bra $-6
b455b31ce022 work on 2.97 stable
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120 return
0
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121
113
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122 enable_s8:
582
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123 ; Check for Digital/Analog
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
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124 bsf s8_npower ; power-down S8 HUD
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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125 WAITMS d'1' ; very short delay
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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126 bsf mcp_power ; power-up instrumentation amp
582
b455b31ce022 work on 2.97 stable
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127 btfss mcp_power
b455b31ce022 work on 2.97 stable
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128 bra $-6
b455b31ce022 work on 2.97 stable
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129 banksel TXSTA2
b455b31ce022 work on 2.97 stable
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130 clrf TXSTA2
b455b31ce022 work on 2.97 stable
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131 clrf RCSTA2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
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132 banksel common
113
heinrichsweikamp
parents: 0
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133
582
b455b31ce022 work on 2.97 stable
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134 ; It may be digital, check for voltage when isolator is powered
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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135 bcf s8_npower ; power S8 HUD
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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136 WAITMS d'1' ; very short delay
113
heinrichsweikamp
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137
582
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138 btfsc PORTG,2 ; RX2=1?
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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139 bra enable_s8_2 ; YES - digital
582
b455b31ce022 work on 2.97 stable
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140 WAITMS d'30'
b455b31ce022 work on 2.97 stable
heinrichsweikamp
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141 btfsc PORTG,2 ; RX2=1?
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
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142 bra enable_s8_2 ; YES - digital
582
b455b31ce022 work on 2.97 stable
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143
b455b31ce022 work on 2.97 stable
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144 ; Not found, set to analog (fail-safe)
113
heinrichsweikamp
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145
heinrichsweikamp
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146 enable_s8_analog:
582
b455b31ce022 work on 2.97 stable
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147 ; S8 Analog
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
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148 bsf s8_npower ; power-down S8 HUD
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
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149 bcf s8_digital ; clear flag
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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150 return
113
heinrichsweikamp
parents: 0
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151
582
b455b31ce022 work on 2.97 stable
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152 enable_s8_2: ; S8 Digital
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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153 banksel BAUDCON2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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154 movlw b'00000000' ; BRG16=0 ; normal for S8
113
heinrichsweikamp
parents: 0
diff changeset
155 movwf BAUDCON2
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
156 movlw b'00100000' ; BRGH=0, SYNC=0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
157 movwf TXSTA2
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
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158 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16 MHz
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
159 movwf SPBRG2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
160 movlw b'10010000'
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
161 movwf RCSTA2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
162 banksel common
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
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163 bsf s8_digital ; set flag
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
164 return
113
heinrichsweikamp
parents: 0
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165
0
heinrichsweikamp
parents:
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166 ;=============================================================================
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
167
0
heinrichsweikamp
parents:
diff changeset
168 global enable_rs232
heinrichsweikamp
parents:
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169 enable_rs232:
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
170 call speed_normal ; 16 MHz
0
heinrichsweikamp
parents:
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171 enable_rs232_2:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
172 movlw T2CON_NORMAL
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
173 cpfseq T2CON
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
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174 bra enable_rs232_2 ; wait until speed is normal
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
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175 bcf PORTE,0 ; start comms
0
heinrichsweikamp
parents:
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176 ;init serial port1 (TRISC6/7)
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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177 movlw b'00100100' ; BRGH=1, SYNC=0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
178 movwf TXSTA1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
179 movlw b'10010000'
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
180 movwf RCSTA1
0
heinrichsweikamp
parents:
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181 return
heinrichsweikamp
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182
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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183
0
heinrichsweikamp
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184 global disable_rs232
heinrichsweikamp
parents:
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185 disable_rs232:
heinrichsweikamp
parents:
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186 clrf RCSTA1
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
187 clrf TXSTA1 ; UART disable
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
188 bcf PORTC,6 ; TX hard to GND
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
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189 bsf PORTE,0 ; stop comms
0
heinrichsweikamp
parents:
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190 return
heinrichsweikamp
parents:
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191
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
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192
0
heinrichsweikamp
parents:
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193 global rs232_wait_tx
heinrichsweikamp
parents:
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194 rs232_wait_tx:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
195 btfss TXSTA1,TRMT ; RS232 Busy?
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
196 bra rs232_wait_tx ; YES - wait...
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
197
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
198 btfss ble_available ; ble available?
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
199 return ; NO - done
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
200
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
201 btfsc NRTS ; wait for Bluetooth module
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
202 bra rs232_wait_tx ; YES - wait...
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
203 return ; done
344
1e342e433839 CHANGE: GF and aGF high range increased to 45-110%
heinrichsweikamp
parents: 276
diff changeset
204
0
heinrichsweikamp
parents:
diff changeset
205
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
206 global rs232_wait_tx2
113
heinrichsweikamp
parents: 0
diff changeset
207 rs232_wait_tx2:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
208 banksel TXSTA2
209
56276a2418f9 cleanup
heinrichsweikamp
parents: 204
diff changeset
209 rs232_wait_tx2_1:
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
210 btfss TXSTA2,TRMT ; RS232 busy?
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
211 bra rs232_wait_tx2_1 ; YES - wait...
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
212 banksel common
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
213 return ; done
113
heinrichsweikamp
parents: 0
diff changeset
214
0
heinrichsweikamp
parents:
diff changeset
215 global rs232_get_byte
heinrichsweikamp
parents:
diff changeset
216 rs232_get_byte:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
217 bcf rs232_receive_overflow ; clear flag
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
218 clrf uart1_temp ; set uart1_temp to .10 without using WREG: first clear to 0, then...
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
219 bsf uart1_temp,1 ; set bit 1 (value 2),
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
220 bsf uart1_temp,3 ; and bit 3 (value 8).
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
221 clrf uart2_temp
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
222 clrf uart3_temp
0
heinrichsweikamp
parents:
diff changeset
223 rs232_get_byte2:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
224 btfsc PIR1,RCIF ; data arrived?
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
225 return ; YES
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
226 decfsz uart3_temp,F
378
7faa688db105 BUGFIX: BLE timings for MAC issues
heinrichsweikamp
parents: 350
diff changeset
227 bra rs232_get_byte2
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
228 decfsz uart2_temp,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
229 bra rs232_get_byte2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
230 decfsz uart1_temp,F
0
heinrichsweikamp
parents:
diff changeset
231 bra rs232_get_byte2
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
232 ; timeout occurred (about 400ms)
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
233 bsf rs232_receive_overflow ; set flag
378
7faa688db105 BUGFIX: BLE timings for MAC issues
heinrichsweikamp
parents: 350
diff changeset
234 rs232_get_byte3:
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
235 bcf RCSTA1,CREN ; clear receiver status
0
heinrichsweikamp
parents:
diff changeset
236 bsf RCSTA1,CREN
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
237 return ; and return anyway
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
238
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
239 ;=============================================================================
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
240
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
241 global do_logoffset_common_write
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
242 do_logoffset_common_write:
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
243 movlw 0x26
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
244 cpfslt hi ; is offset < 0x26?? (decimal 9983 at max, hence save for another +10) ?
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
245 return ; NO - abort
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
246 movff lo,EEDATA ; YES - proceed writing offset to EEPROM
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
247 write_int_eeprom 0x0D
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
248 movff hi,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
249 write_int_eeprom 0x0E
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
250 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
251
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
252 global do_logoffset_common_read
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
253 do_logoffset_common_read:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
254 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
255 read_int_eeprom 0x0D
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
256 movff EEDATA,lo
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
257 read_int_eeprom 0x0E
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
258 movff EEDATA,hi ; existing logbook offset into lo:hi
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
259 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
260
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
261
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
262 global update_battery_registers
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
263 update_battery_registers:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
264 ; save battery_gauge:6 into EEPROM 0x07-0x0C
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
265 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
266 movff battery_gauge+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
267 write_int_eeprom 0x07
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
268 movff battery_gauge+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
269 write_int_eeprom 0x08
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
270 movff battery_gauge+2,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
271 write_int_eeprom 0x09
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
272 movff battery_gauge+3,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
273 write_int_eeprom 0x0A
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
274 movff battery_gauge+4,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
275 write_int_eeprom 0x0B
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
276 movff battery_gauge+5,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
277 write_int_eeprom 0x0C
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
278 movff battery_type,EEDATA ; =0:1.5V, =1:3,6V Saft, =2:LiIon 3,7V/0.8Ah, =3:LiIon 3,7V/3.1Ah, =4: LiIon 3,7V/2.3Ah
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
279 write_int_eeprom 0x0F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
280 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
281
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
282
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
283 global vault_decodata_into_eeprom
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
284 vault_decodata_into_eeprom:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
285 ; Vault in EEPROM 512...1023
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
286 ; Write 0xAA at 512 to indicate valid data in vault
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
287 ; Store last time/date
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
288 ; Store 0x700 to 0x780 (pres_tissue_N2 and pres_tissue_He)
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
289 movlw HIGH .512 ; =2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
290 movwf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
291 movlw 0xAA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
292 movwf EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
293 write_int_eeprom .0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
294 ; Store date/time
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
295 movff year,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
296 write_int_eeprom .1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
297 movff month,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
298 write_int_eeprom .2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
299 movff day,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
300 write_int_eeprom .3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
301 movff hours,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
302 write_int_eeprom .4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
303 movff mins,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
304 write_int_eeprom .5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
305 movff secs,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
306 write_int_eeprom .6
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
307
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
308 movff int_O_CNS_fraction+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
309 write_int_eeprom .7
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
310 movff int_O_CNS_fraction+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
311 write_int_eeprom .8
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
312 movff int_O_desaturation_time+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
313 write_int_eeprom .9
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
314 movff int_O_desaturation_time+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
315 write_int_eeprom .10
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
316 movff surface_interval+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
317 write_int_eeprom .11
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
318 movff surface_interval+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
319 write_int_eeprom .12
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
320 movff int_O_gradient_factor+0,EEDATA ; value limited to 255, only lower byte in use for value
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
321 write_int_eeprom .13
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
322 movff int_O_nofly_time+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
323 write_int_eeprom .14
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
324 movff int_O_nofly_time+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
325 write_int_eeprom .15
0
heinrichsweikamp
parents:
diff changeset
326
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
327 ; Tissue data from 16 to 144
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
328 movlw .16
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
329 movwf EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
330 movlw .128
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
331 movwf lo
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
332 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128Bytes
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
333 vault_decodata_into_eeprom2:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
334 movff POSTINC1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
335 call write_eeprom ; EEDATA into EEPROM@EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
336 incf EEADR,F
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
337 decfsz lo,F ; all done?
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
338 bra vault_decodata_into_eeprom2 ; NO
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
339 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
340 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
341
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
342 global restore_decodata_from_eeprom
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
343 restore_decodata_from_eeprom:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
344 movlw LOW .512 ; =0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
345 movwf EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
346 movlw HIGH .512 ; =2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
347 movwf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
348
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
349 ; Restore date/time
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
350 read_int_eeprom .1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
351 movff EEDATA,year
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
352 read_int_eeprom .2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
353 movff EEDATA,month
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
354 read_int_eeprom .3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
355 movff EEDATA,day
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
356 read_int_eeprom .4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
357 movff EEDATA,hours
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
358 read_int_eeprom .5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
359 movff EEDATA,mins
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
360 read_int_eeprom .6
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
361 movff EEDATA,secs
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
362 call rtc_set_rtc
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
363
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
364 read_int_eeprom .7
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
365 movff EEDATA,int_O_CNS_fraction+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
366 read_int_eeprom .8
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
367 movff EEDATA,int_O_CNS_fraction+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
368 read_int_eeprom .9
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
369 movff EEDATA,int_O_desaturation_time+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
370 read_int_eeprom .10
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
371 movff EEDATA,int_O_desaturation_time+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
372 read_int_eeprom .11
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
373 movff EEDATA,surface_interval+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
374 read_int_eeprom .12
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
375 movff EEDATA,surface_interval+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
376 read_int_eeprom .13
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
377 movff EEDATA,int_O_gradient_factor+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
378 read_int_eeprom .14
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
379 movff EEDATA,int_O_nofly_time+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
380 read_int_eeprom .15
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
381 movff EEDATA,int_O_nofly_time+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
382
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
383 ; Tissue data from 16 to 144
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
384 movlw .16
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
385 movwf EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
386 movlw .128
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
387 movwf lo
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
388 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128 Bytes
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
389 restore_decodata_from_eeprom2:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
390 call read_eeprom ; EEPROM@EEADR into EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
391 movff EEDATA,POSTINC1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
392 incf EEADR,F
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
393 decfsz lo,F ; all done?
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
394 bra restore_decodata_from_eeprom2 ; NO
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
395 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
396 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
397
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
398
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
399 global reset_battery_internal_only
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
400 reset_battery_internal_only:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
401 clrf EEADRH
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
402 clrf EEDATA ; delete to zero
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
403 write_int_eeprom 0x07
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
404 write_int_eeprom 0x08
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
405 write_int_eeprom 0x09
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
406 write_int_eeprom 0x0A
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
407 write_int_eeprom 0x0B
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
408 write_int_eeprom 0x0C
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
409 banksel battery_gauge+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
410 clrf battery_gauge+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
411 clrf battery_gauge+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
412 clrf battery_gauge+2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
413 clrf battery_gauge+3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
414 clrf battery_gauge+4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
415 clrf battery_gauge+5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
416 banksel common
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
417 movlw .100
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
418 movwf batt_percent
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
419 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
420
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
421
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
422 global eeprom_reset_logbook_pointers
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
423 eeprom_reset_logbook_pointers:
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
424 clrf EEADRH ; make sure to select EEPROM bank 0
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
425 clrf EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
426 write_int_eeprom .4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
427 write_int_eeprom .5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
428 write_int_eeprom .6
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
429 write_int_eeprom .2 ; also delete total dive counter
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
430 write_int_eeprom .3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
431 write_int_eeprom .16
604
ca4556fb60b9 bump to 2.99beta, work on 3.00 stable
heinrichsweikamp
parents: 582
diff changeset
432 write_int_eeprom .17 ; ...and the backup counter, too
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
433 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
434
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
435 END