annotate src/eeprom_rs232.asm @ 177:67db1f6d3787

Merge
author heinrichsweikamp
date Tue, 07 Oct 2014 08:42:38 +0200
parents 5cb177f0948a
children 669b5d00706d
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1 ;=============================================================================
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2 ;
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3 ; File eeprom_rs232.asm
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4 ;
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5 ; Internal EEPROM, RS232
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6 ;
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7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
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8 ;=============================================================================
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9 ; HISTORY
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10 ; 2011-08-06 : [mH] moving from OSTC code
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11
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12 #include "ostc3.inc"
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13 #include "wait.inc"
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14
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15 ;=============================================================================
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16 eeprom code 0xF00000+0x10
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17 ; Skip SERIAL number. Should not be overwritten.
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18 global eeprom_serial_save, eeprom_opt_backup
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19 eeprom_serial_save res 2
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20 eeprom_opt_backup res 0x3E
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21
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22 ;=============================================================================
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23 basic CODE
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24
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25 global write_int_eeprom_1
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26 write_int_eeprom_1:
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27 movwf EEADR
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28 bra write_eeprom ; writes and "returns" after write
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29
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30 global read_int_eeprom_1
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31 read_int_eeprom_1:
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32 movwf EEADR
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33 bra read_eeprom ; reads and "returns" after write
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34
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35 ;=============================================================================
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36 ; reads from internal eeprom
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37 ; Input: EEADRH:EEADR = EEPROM address.
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38 ; Output: EEDATA.
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39 ; Trashed: NONE.
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40 global read_eeprom
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41 read_eeprom:
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42 bcf EECON1,EEPGD
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43 bcf EECON1,CFGS
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44 bsf EECON1,RD
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45 return
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46
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47 ;=============================================================================
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48 ; writes into internal eeprom
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49 ; Input: EEADRH:EEADR = EEPROM address.
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50 ; EEDATA = byte to write.
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51 ; Trashed: WREG.
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52 global write_eeprom
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53 write_eeprom:
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54 bcf EECON1,EEPGD
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55 bcf EECON1,CFGS
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56 bsf EECON1,WREN
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57
133
939f1e83c4c2 BUGFIX: Surface interval was not displayed correctly in some cases
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58 bcf INTCON,GIE ; Disable interrups for the next 5 instructions
0
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59 movlw 0x55
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60 movwf EECON2
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61 movlw 0xAA
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62 movwf EECON2
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63 bsf EECON1,WR
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64 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now!
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65
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66 write_eep2:
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67 btfsc EECON1,WR
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68 bra write_eep2 ; wait about 4ms...
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69 bcf EECON1,WREN
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70 return
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71
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72 global disable_ir
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73 disable_ir:
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74 banksel TXSTA2
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75 clrf TXSTA2
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76 clrf RCSTA2
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77 banksel common
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78 bcf ir_power ; IR off
113
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79 bcf mcp_power ; Power-down intrumentation amp
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80 bsf s8_npower ; Power-down S8 HUD
0
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81 return
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82
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83 global enable_ir
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84 enable_ir:
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85 ;init serial port2 (TRISG2)
113
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86 btfsc c3_hardware
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87 bra enable_s8 ; Start S8
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88
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89 banksel BAUDCON2
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90 movlw b'00100000' ; BRG16=0 ; inverted for IR
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91 movwf BAUDCON2
0
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92 banksel TXSTA2
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93 movlw b'00100000' ; BRGH=0, SYNC=0
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94 movwf TXSTA2
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95 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16MHz
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96 movwf SPBRG2
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97 clrf SPBRGH2
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98 movlw b'10010000'
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99 movwf RCSTA2
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100 banksel common
113
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101 bsf ir_power ; Power-up IR
0
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102 btfss ir_power
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103 bra $-6
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104 return
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105
113
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106 enable_s8:
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107 ; Check for Digital/Analog
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108 bsf s8_npower ; Power-down S8 HUD
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109 WAITMS d'1' ; Very short delay
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110 bsf mcp_power ; Power-up intrumentation amp
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111 btfss mcp_power
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112 bra $-6
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113 banksel TXSTA2
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114 clrf TXSTA2
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115 clrf RCSTA2
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116 banksel common
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117
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118 ; It may be digital, check for voltage when isolator is powered
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119 bcf s8_npower ; Power S8 HUD
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120 WAITMS d'1' ; Very short delay
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121
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122 btfsc PORTG,2 ; RX2=1?
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123 bra enable_s8_2 ; Yes, digital
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124 WAITMS d'30'
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125 btfsc PORTG,2 ; RX2=1?
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126 bra enable_s8_2 ; Yes, digital
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127
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128 ; Not found, set to analog (fail-safe)
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129
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130 enable_s8_analog:
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131 ; S8 Analog
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132 bsf s8_npower ; Power-down S8 HUD
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133 bcf s8_digital ; Clear flag
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134 return
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135
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136 enable_s8_2: ; S8 Digital
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137 banksel BAUDCON2
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138 movlw b'00000000' ; BRG16=0 ; normal for S8
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139 movwf BAUDCON2
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140 banksel TXSTA2
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141 movlw b'00100000' ; BRGH=0, SYNC=0
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142 movwf TXSTA2
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143 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16MHz
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144 movwf SPBRG2
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145 clrf SPBRGH2
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146 movlw b'10010000'
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147 movwf RCSTA2
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148 banksel common
151
5cb177f0948a work on flip screen...
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149 ; bcf s8_npower ; Power S8 HUD
113
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150 bsf s8_digital ; Set flag
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151 return
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152
0
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153 ;=============================================================================
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154 global enable_rs232
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155 enable_rs232:
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156 bcf TRISC,6 ; Output
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157 call speed_normal ; 16MHz
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158 enable_rs232_2:
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159 movlw T2CON_NORMAL
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160 cpfseq T2CON
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161 bra enable_rs232_2 ; Wait until speed is normal
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162 ;init serial port1 (TRISC6/7)
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163 clrf RCSTA1
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164 clrf TXSTA1
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165 movlw b'00001000' ; BRG16=1
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166 movwf BAUDCON1
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167 movlw b'00100100' ; BRGH=1, SYNC=0
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168 movwf TXSTA1
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169 movlw .34 ; SPBRGH:SPBRG = .34 : 114285 BAUD @ 16MHz (+0,79% Error to 115200 BAUD)
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170 movwf SPBRG1
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171 clrf SPBRGH1
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172 movlw b'10010000'
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173 movwf RCSTA1
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174 return
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175
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176 global disable_rs232
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177 disable_rs232:
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178 clrf RCSTA1
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179 clrf TXSTA1 ; UART disable
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180 bsf TRISC,6 ; Input
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181 return
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182
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183 global rs232_wait_tx
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184 rs232_wait_tx:
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185 btfsc TXSTA1,TRMT ; Transmit Shift Register empty?
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186 return ; Yes, return!
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187
113
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188 btfss TXSTA1,TRMT ; RS232 Busy?
0
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189 bra rs232_wait_tx ; yes, wait...
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190 return ; Done.
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191
113
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192 global rs232_wait_tx2
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193 rs232_wait_tx2:
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194 banksel TXSTA2
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195 btfsc TXSTA2,TRMT ; Transmit Shift Register empty?
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196 bra rs232_wait_tx2_2 ; Yes, return!
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197
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198 btfss TXSTA2,TRMT ; RS232 Busy?
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199 bra rs232_wait_tx2 ; yes, wait...
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200 rs232_wait_tx2_2:
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201 banksel common
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202 return ; Done.
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203
0
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204 global rs232_get_byte
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205 rs232_get_byte:
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206 bcf rs232_recieve_overflow ; clear flag
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207 clrf uart1_temp
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208 clrf uart2_temp
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209 rs232_get_byte2:
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210 btfsc PIR1,RCIF ; data arrived?
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211 return
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212 decfsz uart2_temp,F
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213 bra rs232_get_byte2
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214 decfsz uart1_temp,F
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215 bra rs232_get_byte2
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216 ; timeout occoured (about 20ms)
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217 bsf rs232_recieve_overflow ; set flag
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218 bcf RCSTA1,CREN ; Clear receiver status
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219 bsf RCSTA1,CREN
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220 return ; and return anyway
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221
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222 END