annotate src/eeprom_rs232.asm @ 596:2b4e02a9c1e4

italian update
author heinrichsweikamp
date Tue, 03 Jul 2018 09:49:34 +0200
parents b455b31ce022
children ca4556fb60b9
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1 ;=============================================================================
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2 ;
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3 ; File eeprom_rs232.asm V2.98
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4 ;
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5 ; Internal EEPROM, RS232
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6 ;
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7 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
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8 ;=============================================================================
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9 ; HISTORY
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10 ; 2011-08-06 : [mH] moving from OSTC code
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11
275
653a3ab08062 rename into hwOS
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12 #include "hwos.inc"
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13 #include "wait.inc"
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14 #include "shared_definitions.h"
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15 #include "rtc.inc"
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16
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17 write_int_eeprom macro eeprom_address
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18 movlw eeprom_address
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19 call write_int_eeprom_1
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20 endm
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21
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22 read_int_eeprom macro eeprom_address
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23 movlw eeprom_address
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24 call read_int_eeprom_1
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25 endm
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26
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27 ;=============================================================================
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28 eeprom code 0xF00000+0x10
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29 ; Skip SERIAL number. Should not be overwritten.
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30
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31 global eeprom_serial_save
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32 global eeprom_opt_backup
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33
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34 eeprom_serial_save res 2
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35 eeprom_opt_backup res 0x3E
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36
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37 ;=============================================================================
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38 basic CODE
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39
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40 global write_int_eeprom_1
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41 write_int_eeprom_1:
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42 movwf EEADR
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43 ; bra write_eeprom ; writes and "returns" after write
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44
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45 ;=============================================================================
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46 ; writes into internal eeprom
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47 ; Input: EEADRH:EEADR = EEPROM address.
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48 ; EEDATA = byte to write.
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49 ; Trashed: WREG.
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50 global write_eeprom
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51 write_eeprom:
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52 bcf EECON1,EEPGD
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53 bcf EECON1,CFGS
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54 bsf EECON1,WREN
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55
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56 bcf INTCON,GIE ; Disable interrupts for the next 5 instructions
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57 movlw 0x55
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58 movwf EECON2
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59 movlw 0xAA
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60 movwf EECON2
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61 bsf EECON1,WR
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62 bsf INTCON,GIE ; ...but the flag for the ISR routines were still set, so they will interrupt now!
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63
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64 write_eep2:
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65 btfsc EECON1,WR
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66 bra write_eep2 ; wait about 4ms...
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67 bcf EECON1,WREN
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68 return
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69
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70
0
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71
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72 global read_int_eeprom_1
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73 read_int_eeprom_1:
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74 movwf EEADR
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75 ; bra read_eeprom ; reads and "returns" after write
0
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76
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77 ;=============================================================================
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78 ; reads from internal eeprom
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79 ; Input: EEADRH:EEADR = EEPROM address.
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80 ; Output: EEDATA.
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81 ; Trashed: NONE.
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82 global read_eeprom
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83 read_eeprom:
0
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84 bcf EECON1,EEPGD
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85 bcf EECON1,CFGS
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86 bsf EECON1,RD
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87 return
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88
582
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89 global disable_ir_s8
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90 disable_ir_s8:
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91 banksel TXSTA2
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92 clrf TXSTA2
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93 clrf RCSTA2
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94 banksel common
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95 bcf ir_power ; IR off
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96 bcf mcp_power ; Power-down instrumentation amp
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97 bsf s8_npower ; Power-down S8 HUD
0
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98 return
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99
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100
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101 global enable_ir_s8
187
669b5d00706d CHANGE: Longer timeout (4 min) for calibration menu
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102 enable_ir_s8:
0
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103 ;init serial port2 (TRISG2)
582
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104 btfsc analog_o2_input
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105 bra enable_s8 ; Start S8
113
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106
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107 banksel BAUDCON2
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108 movlw b'00100000' ; BRG16=0 ; inverted for IR
113
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109 movwf BAUDCON2
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110 movlw b'00100000' ; BRGH=0, SYNC=0
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111 movwf TXSTA2
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112 movlw .102 ; SPBRGH:SPBRG = .102 : 2403 BAUD @ 16MHz
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113 movwf SPBRG2
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114 movlw b'10010000'
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115 movwf RCSTA2
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116 banksel common
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117 bsf ir_power ; Power-up IR
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118 btfss ir_power
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119 bra $-6
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120 return
0
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121
113
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122 enable_s8:
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123 ; Check for Digital/Analog
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124 bsf s8_npower ; Power-down S8 HUD
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125 WAITMS d'1' ; Very short delay
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126 bsf mcp_power ; Power-up instrumentation amp
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127 btfss mcp_power
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128 bra $-6
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129 banksel TXSTA2
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130 clrf TXSTA2
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131 clrf RCSTA2
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132 banksel common
113
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133
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134 ; It may be digital, check for voltage when isolator is powered
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135 bcf s8_npower ; Power S8 HUD
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136 WAITMS d'1' ; Very short delay
113
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137
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138 btfsc PORTG,2 ; RX2=1?
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139 bra enable_s8_2 ; Yes, digital
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140 WAITMS d'30'
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141 btfsc PORTG,2 ; RX2=1?
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142 bra enable_s8_2 ; Yes, digital
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143
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144 ; Not found, set to analog (fail-safe)
113
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145
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146 enable_s8_analog:
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147 ; S8 Analog
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148 bsf s8_npower ; Power-down S8 HUD
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149 bcf s8_digital ; Clear flag
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150 return
113
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151
582
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152 enable_s8_2: ; S8 Digital
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153 banksel BAUDCON2
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154 movlw b'00000000' ; BRG16=0 ; normal for S8
113
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155 movwf BAUDCON2
582
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156 movlw b'00100000' ; BRGH=0, SYNC=0
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157 movwf TXSTA2
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158 movlw .25 ; SPBRGH:SPBRG = .25 : 9615 BAUD @ 16MHz
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159 movwf SPBRG2
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160 movlw b'10010000'
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161 movwf RCSTA2
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162 banksel common
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163 bsf s8_digital ; Set flag
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164 return
113
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165
0
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166 ;=============================================================================
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167
0
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168 global enable_rs232
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169 enable_rs232:
582
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170 call speed_normal ; 16MHz
0
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171 enable_rs232_2:
582
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parents: 386
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172 movlw T2CON_NORMAL
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parents: 386
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173 cpfseq T2CON
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parents: 386
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174 bra enable_rs232_2 ; Wait until speed is normal
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parents: 386
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175 bcf PORTE,0 ; Start comms
0
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176 ;init serial port1 (TRISC6/7)
582
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parents: 386
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177 movlw b'00100100' ; BRGH=1, SYNC=0
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parents: 386
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178 movwf TXSTA1
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parents: 386
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179 movlw b'10010000'
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parents: 386
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180 movwf RCSTA1
0
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181 return
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182
582
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183
0
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184 global disable_rs232
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185 disable_rs232:
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186 clrf RCSTA1
582
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parents: 386
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187 clrf TXSTA1 ; UART disable
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heinrichsweikamp
parents: 386
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188 bcf PORTC,6 ; TX hard to GND
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parents: 386
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189 bsf PORTE,0 ; Stop comms
0
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190 return
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191
582
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192
0
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193 global rs232_wait_tx
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194 rs232_wait_tx:
582
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heinrichsweikamp
parents: 386
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195 btfss TXSTA1,TRMT ; RS232 Busy?
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heinrichsweikamp
parents: 386
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196 bra rs232_wait_tx ; yes, wait...
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parents: 386
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197
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parents: 386
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198 btfss ble_available ; ble available?
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parents: 386
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199 return ; No, done.
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parents: 386
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200
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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201 btfsc NRTS ; Wait for Bluetooth module
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heinrichsweikamp
parents: 386
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202 bra rs232_wait_tx ; yes, wait...
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
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203 return ; Done.
344
1e342e433839 CHANGE: GF and aGF high range increased to 45-110%
heinrichsweikamp
parents: 276
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204
0
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205
582
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heinrichsweikamp
parents: 386
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206 global rs232_wait_tx2
113
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parents: 0
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207 rs232_wait_tx2:
582
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heinrichsweikamp
parents: 386
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208 banksel TXSTA2
209
56276a2418f9 cleanup
heinrichsweikamp
parents: 204
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209 rs232_wait_tx2_1:
582
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heinrichsweikamp
parents: 386
diff changeset
210 btfss TXSTA2,TRMT ; RS232 Busy?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
211 bra rs232_wait_tx2_1 ; yes, wait...
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
212 banksel common
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
213 return ; Done.
113
heinrichsweikamp
parents: 0
diff changeset
214
0
heinrichsweikamp
parents:
diff changeset
215 global rs232_get_byte
heinrichsweikamp
parents:
diff changeset
216 rs232_get_byte:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
217 bcf rs232_receive_overflow ; clear flag
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
218 movlw .10
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
219 movwf uart1_temp
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
220 clrf uart2_temp
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
221 clrf uart3_temp
0
heinrichsweikamp
parents:
diff changeset
222 rs232_get_byte2:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
223 btfsc PIR1,RCIF ; data arrived?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
224 return ; Yes
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
225 decfsz uart3_temp,F
378
7faa688db105 BUGFIX: BLE timings for MAC issues
heinrichsweikamp
parents: 350
diff changeset
226 bra rs232_get_byte2
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
227 decfsz uart2_temp,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
228 bra rs232_get_byte2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
229 decfsz uart1_temp,F
0
heinrichsweikamp
parents:
diff changeset
230 bra rs232_get_byte2
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
231 ; timeout occurred (about 400ms)
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
232 bsf rs232_receive_overflow ; set flag
378
7faa688db105 BUGFIX: BLE timings for MAC issues
heinrichsweikamp
parents: 350
diff changeset
233 rs232_get_byte3:
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
234 bcf RCSTA1,CREN ; Clear receiver status
0
heinrichsweikamp
parents:
diff changeset
235 bsf RCSTA1,CREN
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
236 return ; and return anyway
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
237
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
238 ;=============================================================================
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
239
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
240 global do_logoffset_common_write
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
241 do_logoffset_common_write:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
242 ; TODO: limit [lo:hi] to 9999 ? may arrive here as >= 10000 because of +10 increment option
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
243 ; SIMPLER WAY: return without writing to eeprom if hi == 0x27 -> 0x2700 = 9984, this is within
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
244 ; the save range for a +10 increment, shall do it...
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
245 ; mH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
246
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
247 movff lo,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
248 write_int_eeprom 0x0D
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
249 movff hi,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
250 write_int_eeprom 0x0E
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
251 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
252
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
253 global do_logoffset_common_read
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
254 do_logoffset_common_read:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
255 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
256 read_int_eeprom 0x0D
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
257 movff EEDATA,lo
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
258 read_int_eeprom 0x0E
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
259 movff EEDATA,hi ; Existing logbook offset into lo:hi
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
260 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
261
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
262
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
263 global update_battery_registers
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
264 update_battery_registers:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
265 ; save battery_gauge:6 into EEPROM 0x07-0x0C
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
266 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
267 movff battery_gauge+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
268 write_int_eeprom 0x07
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
269 movff battery_gauge+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
270 write_int_eeprom 0x08
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
271 movff battery_gauge+2,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
272 write_int_eeprom 0x09
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
273 movff battery_gauge+3,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
274 write_int_eeprom 0x0A
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
275 movff battery_gauge+4,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
276 write_int_eeprom 0x0B
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
277 movff battery_gauge+5,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
278 write_int_eeprom 0x0C
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
279 movff battery_type,EEDATA ; =0:1.5V, =1:3,6V Saft, =2:LiIon 3,7V/0.8Ah, =3:LiIon 3,7V/3.1Ah, =4: LiIon 3,7V/2.3Ah
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
280 write_int_eeprom 0x0F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
281 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
282
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
283
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
284 global vault_decodata_into_eeprom
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
285 vault_decodata_into_eeprom:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
286 ; Vault in EEPROM 512...1023
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
287 ; Write 0xAA at 512 to indicate valid data in vault
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
288 ; Store last time/date
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
289 ; Store 0x700 to 0x780 (pres_tissue_N2 and pres_tissue_He)
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
290 movlw HIGH .512 ; =2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
291 movwf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
292 movlw 0xAA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
293 movwf EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
294 write_int_eeprom .0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
295 ; Store date/time
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
296 movff year,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
297 write_int_eeprom .1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
298 movff month,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
299 write_int_eeprom .2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
300 movff day,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
301 write_int_eeprom .3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
302 movff hours,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
303 write_int_eeprom .4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
304 movff mins,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
305 write_int_eeprom .5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
306 movff secs,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
307 write_int_eeprom .6
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
308
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
309 movff int_O_CNS_fraction+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
310 write_int_eeprom .7
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
311 movff int_O_CNS_fraction+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
312 write_int_eeprom .8
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
313 movff int_O_desaturation_time+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
314 write_int_eeprom .9
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
315 movff int_O_desaturation_time+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
316 write_int_eeprom .10
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
317 movff surface_interval+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
318 write_int_eeprom .11
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
319 movff surface_interval+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
320 write_int_eeprom .12
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
321 movff int_O_gradient_factor+0,EEDATA ; value limited to 255, only lower byte in use for value
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
322 write_int_eeprom .13
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
323 movff int_O_nofly_time+0,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
324 write_int_eeprom .14
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
325 movff int_O_nofly_time+1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
326 write_int_eeprom .15
0
heinrichsweikamp
parents:
diff changeset
327
582
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
328 ; Tissue data from 16 to 144
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
329 movlw .16
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
330 movwf EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
331 movlw .128
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
332 movwf lo
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
333 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128Bytes
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
334 vault_decodata_into_eeprom2:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
335 movff POSTINC1,EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
336 call write_eeprom ; EEDATA into EEPROM@EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
337 incf EEADR,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
338 decfsz lo,F ; All done?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
339 bra vault_decodata_into_eeprom2 ; No
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
340 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
341 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
342
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
343 global restore_decodata_from_eeprom
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
344 restore_decodata_from_eeprom:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
345 movlw LOW .512 ; =0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
346 movwf EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
347 movlw HIGH .512 ; =2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
348 movwf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
349
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
350 ; Restore date/time
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
351 read_int_eeprom .1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
352 movff EEDATA,year
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
353 read_int_eeprom .2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
354 movff EEDATA,month
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
355 read_int_eeprom .3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
356 movff EEDATA,day
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
357 read_int_eeprom .4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
358 movff EEDATA,hours
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
359 read_int_eeprom .5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
360 movff EEDATA,mins
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
361 read_int_eeprom .6
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
362 movff EEDATA,secs
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
363 call rtc_set_rtc
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
364
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
365 read_int_eeprom .7
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
366 movff EEDATA,int_O_CNS_fraction+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
367 read_int_eeprom .8
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
368 movff EEDATA,int_O_CNS_fraction+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
369 read_int_eeprom .9
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
370 movff EEDATA,int_O_desaturation_time+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
371 read_int_eeprom .10
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
372 movff EEDATA,int_O_desaturation_time+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
373 read_int_eeprom .11
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
374 movff EEDATA,surface_interval+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
375 read_int_eeprom .12
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
376 movff EEDATA,surface_interval+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
377 read_int_eeprom .13
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
378 movff EEDATA,int_O_gradient_factor+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
379 read_int_eeprom .14
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
380 movff EEDATA,int_O_nofly_time+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
381 read_int_eeprom .15
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
382 movff EEDATA,int_O_nofly_time+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
383
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
384 ; Tissue data from 16 to 144
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
385 movlw .16
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
386 movwf EEADR
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
387 movlw .128
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
388 movwf lo
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
389 lfsr FSR1,0x700 ; pres_tissue_N2+0, 32*4Byte Float = 128Bytes
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
390 restore_decodata_from_eeprom2:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
391 call read_eeprom ; EEPROM@EEADR into EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
392 movff EEDATA,POSTINC1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
393 incf EEADR,F
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
394 decfsz lo,F ; All done?
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
395 bra restore_decodata_from_eeprom2 ; No
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
396 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
397 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
398
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
399
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
400 global reset_battery_internal_only
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
401 reset_battery_internal_only:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
402 clrf EEADRH
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
403 clrf EEDATA ; Delete to zero
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
404 write_int_eeprom 0x07
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
405 write_int_eeprom 0x08
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
406 write_int_eeprom 0x09
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
407 write_int_eeprom 0x0A
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
408 write_int_eeprom 0x0B
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
409 write_int_eeprom 0x0C
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
410 banksel battery_gauge+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
411 clrf battery_gauge+0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
412 clrf battery_gauge+1
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
413 clrf battery_gauge+2
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
414 clrf battery_gauge+3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
415 clrf battery_gauge+4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
416 clrf battery_gauge+5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
417 banksel common
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
418 movlw .100
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
419 movwf batt_percent
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
420 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
421
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
422
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
423 global eeprom_reset_logbook_pointers
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
424 eeprom_reset_logbook_pointers:
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
425 clrf EEADRH ; Make sure to select EEPROM bank 0
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
426 clrf EEDATA
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
427 write_int_eeprom .4
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
428 write_int_eeprom .5
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
429 write_int_eeprom .6
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
430 write_int_eeprom .2 ; Also, delete total dive counter
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
431 write_int_eeprom .3
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
432 write_int_eeprom .16
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
433 write_int_eeprom .17 ; And the backup counter, too
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
434 return
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
435
b455b31ce022 work on 2.97 stable
heinrichsweikamp
parents: 386
diff changeset
436 END