annotate src/external_flash.inc @ 565:0ba88db66492

CHANGE: Limit button sensitivity to 80%
author heinrichsweikamp
date Tue, 06 Feb 2018 10:07:38 +0100
parents 9c54849b8d3b
children b455b31ce022
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
heinrichsweikamp
parents:
diff changeset
1 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
2 ;
heinrichsweikamp
parents:
diff changeset
3 ; File external_flash.inc
heinrichsweikamp
parents:
diff changeset
4 ;
heinrichsweikamp
parents:
diff changeset
5 ;
heinrichsweikamp
parents:
diff changeset
6 ; Copyright (c) 2011, JD Gascuel, HeinrichsWeikamp, all right reserved.
heinrichsweikamp
parents:
diff changeset
7 ;=============================================================================
heinrichsweikamp
parents:
diff changeset
8 ; HISTORY
heinrichsweikamp
parents:
diff changeset
9 ; 2011-08-12 : [mH] creation
heinrichsweikamp
parents:
diff changeset
10
heinrichsweikamp
parents:
diff changeset
11 ; Misc
420
789230298511 fix handling for new flash memory chip
heinrichsweikamp
parents: 281
diff changeset
12 extern incf_ext_flash_address_p1 ; +1 for the ext_flash_address:3
0
heinrichsweikamp
parents:
diff changeset
13 extern ext_flash_disable_protection; Disables write protection
heinrichsweikamp
parents:
diff changeset
14 extern ext_flash_enable_protection ; Enables write protection
561
9c54849b8d3b Remove routine to fix corrupt dives made with v1.80
heinrichsweikamp
parents: 423
diff changeset
15
0
heinrichsweikamp
parents:
diff changeset
16 ; Writes
heinrichsweikamp
parents:
diff changeset
17 extern write_byte_ext_flash_plus ; Write from WREG and increase address after write with banking at 0x200000
279
62c7af4795b0 bugfix wrong profile length in header
heinrichsweikamp
parents: 278
diff changeset
18 extern write_byte_ext_flash_plus_nocnt ; No increase of ext_flash_dive_counter:3
278
dfac47ac2e1d BUGFIX: There was a 1:4096 chance that a portion of a dive was not stored correctly resulting in download issues
heinrichsweikamp
parents: 6
diff changeset
19 extern write_byte_ext_flash_plus_nodel ; Does NOT delete 4kB Page when required
0
heinrichsweikamp
parents:
diff changeset
20 extern write_byte_ext_flash_plus_header ; Write from WREG and increase address after write
heinrichsweikamp
parents:
diff changeset
21 extern ext_flash_byte_write ; Writes one byte from WREG @ext_flash_address:3
423
ccaaac45b61a _another_ timing fix for firmware updates (2.07 was not published yet anyway)
heinrichsweikamp
parents: 420
diff changeset
22 extern ext_flash_byte_write_comms ; without wait, ~86us fixed delay due to 115200 Bauds (Use with caution)
0
heinrichsweikamp
parents:
diff changeset
23 extern write_spi1 ; Just (dummy)write to read a byte
heinrichsweikamp
parents:
diff changeset
24
heinrichsweikamp
parents:
diff changeset
25 ; Delelte
heinrichsweikamp
parents:
diff changeset
26 extern ext_flash_erase_logbook ; erases logbook memory (000000h -> 2FFFFFh -> 3MByte)
heinrichsweikamp
parents:
diff changeset
27 extern ext_flash_erase4kB ; Erases 4kB sector @ext_flash_address:3
heinrichsweikamp
parents:
diff changeset
28
heinrichsweikamp
parents:
diff changeset
29 ; Reads
heinrichsweikamp
parents:
diff changeset
30 extern ext_flash_read_block_start ; Block read start and reads one byte@ext_flash_address:3 into WREG
heinrichsweikamp
parents:
diff changeset
31 extern ext_flash_read_block ; Read another byte into WREG
heinrichsweikamp
parents:
diff changeset
32 extern ext_flash_read_block_stop ; Stop block read
heinrichsweikamp
parents:
diff changeset
33 extern ext_flash_byte_read ; Reads one byte@ext_flash_address:3 into WREG and temp1
heinrichsweikamp
parents:
diff changeset
34 extern ext_flash_byte_read_plus ; Return data read in WREG and temp1 and increase address after read with banking at 0x200000
heinrichsweikamp
parents:
diff changeset
35 extern ext_flash_byte_read_plus_0x20; Return data read in WREG and temp1
heinrichsweikamp
parents:
diff changeset
36
heinrichsweikamp
parents:
diff changeset
37 ; Will decrease ext_flash_address:2 with the 8Bit value "ext_flash_temp1"
heinrichsweikamp
parents:
diff changeset
38 extern decf_ext_flash_address0
heinrichsweikamp
parents:
diff changeset
39 decf_ext_flash_address macro ext_flash_temp1
heinrichsweikamp
parents:
diff changeset
40 movlw ext_flash_temp1
heinrichsweikamp
parents:
diff changeset
41 call decf_ext_flash_address0
heinrichsweikamp
parents:
diff changeset
42 endm
heinrichsweikamp
parents:
diff changeset
43
heinrichsweikamp
parents:
diff changeset
44 extern incf_ext_flash_address0
heinrichsweikamp
parents:
diff changeset
45 ; Will increase ext_flash_address:2 with the 8Bit value "ext_flash_temp1"
heinrichsweikamp
parents:
diff changeset
46 incf_ext_flash_address macro ext_flash_temp1
heinrichsweikamp
parents:
diff changeset
47 movlw ext_flash_temp1
heinrichsweikamp
parents:
diff changeset
48 call incf_ext_flash_address0
heinrichsweikamp
parents:
diff changeset
49 endm
heinrichsweikamp
parents:
diff changeset
50
heinrichsweikamp
parents:
diff changeset
51 ; With banking at 0x200000
heinrichsweikamp
parents:
diff changeset
52 extern incf_ext_flash_address0_0x20
heinrichsweikamp
parents:
diff changeset
53 ; Will increase ext_flash_address:2 with the 8Bit value "ext_flash_temp1"
heinrichsweikamp
parents:
diff changeset
54 incf_ext_flash_address_0x20 macro ext_flash_temp1
heinrichsweikamp
parents:
diff changeset
55 movlw ext_flash_temp1
heinrichsweikamp
parents:
diff changeset
56 call incf_ext_flash_address0_0x20
heinrichsweikamp
parents:
diff changeset
57 endm
heinrichsweikamp
parents:
diff changeset
58
heinrichsweikamp
parents:
diff changeset
59