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changeset 801:ff66b41d6fe4

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Update RTE version number
author Ideenmodellierer
date Thu, 10 Aug 2023 21:24:04 +0200
parents f8a112c5e71d
children 91d5ef16f1fd
files Discovery/Src/settings.c Small_CPU/Src/baseCPU2.c
diffstat 2 files changed, 4 insertions(+), 4 deletions(-) [+]
line wrap: on
line diff
--- a/Discovery/Src/settings.c	Tue Aug 08 17:29:03 2023 +0200
+++ b/Discovery/Src/settings.c	Thu Aug 10 21:24:04 2023 +0200
@@ -42,7 +42,7 @@
 SSettings Settings;
 
 const uint8_t RTErequiredHigh = 3;
-const uint8_t RTErequiredLow = 1;
+const uint8_t RTErequiredLow = 2;
 
 const uint8_t FONTrequiredHigh = 1;
 const uint8_t FONTrequiredLow =	0;
@@ -554,7 +554,7 @@
     	pSettings->ext_sensor_map[5] = SENSOR_NONE;
     	pSettings->ext_sensor_map[6] = SENSOR_NONE;
     	pSettings->ext_sensor_map[7] = SENSOR_NONE;
-    	
+    	// no break;
     default:
         pSettings->header = pStandard->header;
         break; // no break before!!
--- a/Small_CPU/Src/baseCPU2.c	Tue Aug 08 17:29:03 2023 +0200
+++ b/Small_CPU/Src/baseCPU2.c	Thu Aug 10 21:24:04 2023 +0200
@@ -166,7 +166,7 @@
 // See CPU2-RTE.ld
 const SFirmwareData cpu2_FirmwareData __attribute__(( section(".firmware_data") ))= {
 		.versionFirst = 3,
-		.versionSecond = 1,
+		.versionSecond = 2,
 		.versionThird = 0,
 		.versionBeta = 0,
 
@@ -422,7 +422,6 @@
 			SPI_synchronize_with_Master();
 			MX_DMA_Init();
 			MX_SPI1_Init();
-			externalInterface_SwitchUART(externalInterface_GetUARTProtocol());
 			SPI_Start_single_TxRx_with_Master(); /* be prepared for the first data exchange */
 			Scheduler_Request_sync_with_SPI(SPI_SYNC_METHOD_HARD);
 			EXTI_Test_Button_Init();
@@ -495,6 +494,7 @@
 			 */
 
 			EXTI_Test_Button_DeInit();
+			externalInterface_SwitchUART(0);
 			externalInterface_SwitchPower33(false);
 			if (hasExternalClock())
 				SystemClock_Config_HSI();