# HG changeset patch
# User Ideenmodellierer
# Date 1773000276 -3600
# Node ID 9e1fdb383d8654f13f2cc00592fe06d471045216
# Parent  082825daccb5a9deb414e303f9e81c7f48204ae5
Changed reaction for uart DMA buffer overruns:
In the previous version a DMA was not restarted in case the read pointer is in the chunk which should be filled next. In normal operation this should never happen, in special cases, like debugging, it may occure. In case of an overrun the data may be already outdated and can be discarded. Because of this the new handling of a buffer overflow is to set the read pointer to the start of the chunk => the read function will start with the latest received data. Not yet processed data will be discarded.

diff -r 082825daccb5 -r 9e1fdb383d86 Small_CPU/Src/uart.c
--- a/Small_CPU/Src/uart.c	Mon Mar 02 17:30:38 2026 +0100
+++ b/Small_CPU/Src/uart.c	Sun Mar 08 21:04:36 2026 +0100
@@ -302,12 +302,13 @@
 {
 	if(pUartCtrl->dmaRxActive == 0)
 	{
-    	if(((pUartCtrl->rxWriteIndex / CHUNK_SIZE) != (pUartCtrl->rxReadIndex / CHUNK_SIZE)) || ((UART_isEndIndication(pUartCtrl, pUartCtrl->rxWriteIndex)) && (UART_isEndIndication(pUartCtrl, pUartCtrl->rxWriteIndex + 1))))	/* start next transfer if we did not catch up with read index */
-    	{
-			if(HAL_OK == HAL_UART_Receive_DMA (pUartCtrl->pHandle, &pUartCtrl->pRxBuffer[pUartCtrl->rxWriteIndex], CHUNK_SIZE))
-			{
-				pUartCtrl->dmaRxActive = 1;
-			}
+		if((pUartCtrl->rxWriteIndex / CHUNK_SIZE) == (pUartCtrl->rxReadIndex / CHUNK_SIZE)) /* write pointer catched up with read pointer (should never happen) => Reset read pointer to start of block */
+		{
+			pUartCtrl->rxReadIndex = pUartCtrl->rxWriteIndex;
+		}
+		if(HAL_OK == HAL_UART_Receive_DMA (pUartCtrl->pHandle, &pUartCtrl->pRxBuffer[pUartCtrl->rxWriteIndex], CHUNK_SIZE))
+		{
+			pUartCtrl->dmaRxActive = 1;
     	}
 	}
 }