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view Common/Drivers/STM32F4xx_v220/Source/Templates/iar/linker/stm32f401xe_sram.icf @ 40:da86a7adc4fa
Aligned structure with CPU1 linker file
author | Ideenmodellierer |
---|---|
date | Sun, 29 Jul 2018 16:45:00 +0200 |
parents | 5f11787b4f42 |
children |
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/*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = 0x20000000; /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x20000000; define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF; define symbol __ICFEDIT_region_RAM_start__ = 0x20010000; define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = 0x400; define symbol __ICFEDIT_size_heap__ = 0x200; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; initialize by copy { readwrite }; do not initialize { section .noinit }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, block CSTACK, block HEAP };