Mercurial > public > ostc4
view Common/Drivers/CMSIS/Include/core_cmSimd.h @ 208:9fc06e1e0f66 ImprovmentSPI
Update SPI error display and handling
For easier identification of a communication problem the RX state of Main and RTE is displayed in the debug view.
Also error reactions are now handles based on this state. E.g. RTE resets its DMA incase Main reports a data shift which can not be resolved by Main itself
In addition the timeout for error detection has been decreased to have a faster reaction
author | ideenmodellierer |
---|---|
date | Sun, 24 Mar 2019 22:57:28 +0100 |
parents | c78bcbd5deda |
children |
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/**************************************************************************//** * @file core_cmSimd.h * @brief CMSIS Cortex-M SIMD Header File * @version V4.30 * @date 20. October 2015 ******************************************************************************/ /* Copyright (c) 2009 - 2015 ARM LIMITED All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - Neither the name of ARM nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ---------------------------------------------------------------------------*/ #if defined ( __ICCARM__ ) #pragma system_include /* treat file as system include file for MISRA check */ #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #pragma clang system_header /* treat file as system include file */ #endif #ifndef __CORE_CMSIMD_H #define __CORE_CMSIMD_H #ifdef __cplusplus extern "C" { #endif /* ################### Compiler specific Intrinsics ########################### */ /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics Access to dedicated SIMD instructions @{ */ /*------------------ RealView Compiler -----------------*/ #if defined ( __CC_ARM ) #include "cmsis_armcc.h" /*------------------ ARM Compiler V6 -------------------*/ #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) #include "cmsis_armcc_V6.h" /*------------------ GNU Compiler ----------------------*/ #elif defined ( __GNUC__ ) #include "cmsis_gcc.h" /*------------------ ICC Compiler ----------------------*/ #elif defined ( __ICCARM__ ) #include <cmsis_iar.h> /*------------------ TI CCS Compiler -------------------*/ #elif defined ( __TMS470__ ) #include <cmsis_ccs.h> /*------------------ TASKING Compiler ------------------*/ #elif defined ( __TASKING__ ) /* * The CMSIS functions have been implemented as intrinsics in the compiler. * Please use "carm -?i" to get an up to date list of all intrinsics, * Including the CMSIS ones. */ /*------------------ COSMIC Compiler -------------------*/ #elif defined ( __CSMC__ ) #include <cmsis_csm.h> #endif /*@} end of group CMSIS_SIMD_intrinsics */ #ifdef __cplusplus } #endif #endif /* __CORE_CMSIMD_H */