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view wiki/Detailed CPU1-Upper Project.md @ 726:8f3a8c85a6c4

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Bugfix data synchronization after RTE start: In previous version invalid data may be transferred in case the communication is corrupted directly after RTE startup. Root cause was that the data was evaluated without caring if a communication error was reported. In the new version the startup condition and evaluation of data is only done if valid data has been received by the RTE => SPI communication is up and runnig.
author Ideenmodellierer
date Sat, 14 Jan 2023 20:35:40 +0100
parents 5f11787b4f42
children
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# How to Create From Scratch a Project for _CPU1-Upper_ Code #

The main CPU (aka. _CPU1 Discovery_) firmware is splitted in two parts:
- The proper _CPU1 Discovery_ firmware, with the main code.
- The _protected upper memory_ firmware, which is programmed during _OSTC4_ production, and contains (amongst other things) code used to upload and install firmware upgrades.

## Make a specific project ##

Follow the same procedure than for [CPU1-Discovery](Detailed CPU1-Discovery Project.md), (same processor, same includes) but include the `CPU1-Upper` source directory.

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NOT FINISHED YET... BE PATIENT
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