/**+
−
  ******************************************************************************+
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  * @file    stm32f4xx_ll_spi.c+
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  * @author  MCD Application Team+
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  * @brief   SPI LL module driver.+
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  ******************************************************************************+
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  * @attention+
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  *+
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  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>+
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  *+
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  * Redistribution and use in source and binary forms, with or without modification,+
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  * are permitted provided that the following conditions are met:+
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  *   1. Redistributions of source code must retain the above copyright notice,+
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  *      this list of conditions and the following disclaimer.+
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  *   2. Redistributions in binary form must reproduce the above copyright notice,+
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  *      this list of conditions and the following disclaimer in the documentation+
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  *      and/or other materials provided with the distribution.+
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  *   3. Neither the name of STMicroelectronics nor the names of its contributors+
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  *      may be used to endorse or promote products derived from this software+
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  *      without specific prior written permission.+
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  *+
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  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"+
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  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE+
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  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE+
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  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE+
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL+
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  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR+
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  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER+
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,+
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  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE+
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  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.+
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  *+
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  ******************************************************************************+
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  */+
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#if defined(USE_FULL_LL_DRIVER)+
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+
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/* Includes ------------------------------------------------------------------*/+
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#include "stm32f4xx_ll_spi.h"+
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#include "stm32f4xx_ll_bus.h"+
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#include "stm32f4xx_ll_rcc.h"+
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+
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#ifdef  USE_FULL_ASSERT+
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#include "stm32_assert.h"+
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#else+
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#define assert_param(expr) ((void)0U)+
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#endif+
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+
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/** @addtogroup STM32F4xx_LL_Driver+
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  * @{+
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  */+
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+
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#if defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defined(SPI6)+
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+
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/** @addtogroup SPI_LL+
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  * @{+
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  */+
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+
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/* Private types -------------------------------------------------------------*/+
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/* Private variables ---------------------------------------------------------*/+
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+
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/* Private constants ---------------------------------------------------------*/+
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/** @defgroup SPI_LL_Private_Constants SPI Private Constants+
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  * @{+
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  */+
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/* SPI registers Masks */+
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#define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \+
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                                            SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \+
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                                            SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_DFF    | \+
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                                            SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \+
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                                            SPI_CR1_BIDIMODE)+
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/**+
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  * @}+
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  */+
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+
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/* Private macros ------------------------------------------------------------*/+
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/** @defgroup SPI_LL_Private_Macros SPI Private Macros+
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  * @{+
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  */+
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#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)    \+
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                                              || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \+
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                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \+
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                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))+
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+
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#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \+
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                                || ((__VALUE__) == LL_SPI_MODE_SLAVE))+
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+
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#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \+
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                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))+
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+
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#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \+
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                                    || ((__VALUE__) == LL_SPI_POLARITY_HIGH))+
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+
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#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \+
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                                 || ((__VALUE__) == LL_SPI_PHASE_2EDGE))+
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+
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#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \+
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                               || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \+
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                               || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))+
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+
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#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)   \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \+
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                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))+
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+
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#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \+
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                                    || ((__VALUE__) == LL_SPI_MSB_FIRST))+
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+
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#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \+
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                                          || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))+
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+
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#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)+
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+
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/**+
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  * @}+
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  */+
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+
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/* Private function prototypes -----------------------------------------------*/+
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+
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/* Exported functions --------------------------------------------------------*/+
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/** @addtogroup SPI_LL_Exported_Functions+
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  * @{+
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  */+
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+
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/** @addtogroup SPI_LL_EF_Init+
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  * @{+
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  */+
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+
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/**+
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  * @brief  De-initialize the SPI registers to their default reset values.+
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  * @param  SPIx SPI Instance+
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  * @retval An ErrorStatus enumeration value:+
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  *          - SUCCESS: SPI registers are de-initialized+
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  *          - ERROR: SPI registers are not de-initialized+
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  */+
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ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)+
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{+
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  ErrorStatus status = ERROR;+
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+
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  /* Check the parameters */+
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  assert_param(IS_SPI_ALL_INSTANCE(SPIx));+
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+
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#if defined(SPI1)+
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  if (SPIx == SPI1)+
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  {+
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    /* Force reset of SPI clock */+
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    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);+
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+
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    /* Release reset of SPI clock */+
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    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);+
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+
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    status = SUCCESS;+
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  }+
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#endif /* SPI1 */+
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#if defined(SPI2)+
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  if (SPIx == SPI2)+
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  {+
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    /* Force reset of SPI clock */+
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    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);+
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+
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    /* Release reset of SPI clock */+
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    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);+
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+
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    status = SUCCESS;+
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  }+
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#endif /* SPI2 */+
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#if defined(SPI3)+
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  if (SPIx == SPI3)+
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  {+
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    /* Force reset of SPI clock */+
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    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);+
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+
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    /* Release reset of SPI clock */+
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    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);+
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+
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    status = SUCCESS;+
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  }+
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#endif /* SPI3 */+
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#if defined(SPI4)+
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  if (SPIx == SPI4)+
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  {+
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    /* Force reset of SPI clock */+
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    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI4);+
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+
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    /* Release reset of SPI clock */+
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    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI4);+
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+
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    status = SUCCESS;+
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  }+
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#endif /* SPI4 */+
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#if defined(SPI5)+
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  if (SPIx == SPI5)+
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  {+
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    /* Force reset of SPI clock */+
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    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI5);+
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+
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    /* Release reset of SPI clock */+
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    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI5);+
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+
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    status = SUCCESS;+
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  }+
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#endif /* SPI5 */+
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#if defined(SPI6)+
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  if (SPIx == SPI6)+
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  {+
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    /* Force reset of SPI clock */+
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    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI6);+
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+
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    /* Release reset of SPI clock */+
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    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI6);+
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+
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    status = SUCCESS;+
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  }+
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#endif /* SPI6 */+
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+
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  return status;+
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}+
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+
−
/**+
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  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.+
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  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),+
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  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.+
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  * @param  SPIx SPI Instance+
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  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure+
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  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)+
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  */+
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ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)+
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{+
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  ErrorStatus status = ERROR;+
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+
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  /* Check the SPI Instance SPIx*/+
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  assert_param(IS_SPI_ALL_INSTANCE(SPIx));+
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+
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  /* Check the SPI parameters from SPI_InitStruct*/+
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  assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));+
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  assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));+
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  assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));+
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  assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));+
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  assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));+
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  assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));+
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  assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));+
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  assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));+
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  assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));+
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+
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  if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)+
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  {+
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    /*---------------------------- SPIx CR1 Configuration ------------------------+
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     * Configure SPIx CR1 with parameters:+
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     * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits+
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     * - Master/Slave Mode:  SPI_CR1_MSTR bit+
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     * - DataWidth:          SPI_CR1_DFF bit+
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     * - ClockPolarity:      SPI_CR1_CPOL bit+
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     * - ClockPhase:         SPI_CR1_CPHA bit+
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     * - NSS management:     SPI_CR1_SSM bit+
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     * - BaudRate prescaler: SPI_CR1_BR[2:0] bits+
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     * - BitOrder:           SPI_CR1_LSBFIRST bit+
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     * - CRCCalculation:     SPI_CR1_CRCEN bit+
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     */+
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    MODIFY_REG(SPIx->CR1,+
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               SPI_CR1_CLEAR_MASK,+
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               SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode | SPI_InitStruct->DataWidth |+
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               SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |+
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               SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |+
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               SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);+
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+
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    /*---------------------------- SPIx CR2 Configuration ------------------------+
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     * Configure SPIx CR2 with parameters:+
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     * - NSS management:     SSOE bit+
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     */+
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    MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, (SPI_InitStruct->NSS >> 16U));+
−
+
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    /*---------------------------- SPIx CRCPR Configuration ----------------------+
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     * Configure SPIx CRCPR with parameters:+
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     * - CRCPoly:            CRCPOLY[15:0] bits+
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     */+
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    if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)+
−
    {+
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      assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));+
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      LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);+
−
    }+
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    status = SUCCESS;+
−
  }+
−
+
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  /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */+
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  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);+
−
  return status;+
−
}+
−
+
−
/**+
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  * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.+
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  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure+
−
  * whose fields will be set to default values.+
−
  * @retval None+
−
  */+
−
void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)+
−
{+
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  /* Set SPI_InitStruct fields to default values */+
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  SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;+
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  SPI_InitStruct->Mode              = LL_SPI_MODE_SLAVE;+
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  SPI_InitStruct->DataWidth         = LL_SPI_DATAWIDTH_8BIT;+
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  SPI_InitStruct->ClockPolarity     = LL_SPI_POLARITY_LOW;+
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  SPI_InitStruct->ClockPhase        = LL_SPI_PHASE_1EDGE;+
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  SPI_InitStruct->NSS               = LL_SPI_NSS_HARD_INPUT;+
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  SPI_InitStruct->BaudRate          = LL_SPI_BAUDRATEPRESCALER_DIV2;+
−
  SPI_InitStruct->BitOrder          = LL_SPI_MSB_FIRST;+
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  SPI_InitStruct->CRCCalculation    = LL_SPI_CRCCALCULATION_DISABLE;+
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  SPI_InitStruct->CRCPoly           = 7U;+
−
}+
−
+
−
/**+
−
  * @}+
−
  */+
−
+
−
/**+
−
  * @}+
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  */+
−
+
−
/**+
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  * @}+
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  */+
−
+
−
/** @addtogroup I2S_LL+
−
  * @{+
−
  */+
−
+
−
/* Private types -------------------------------------------------------------*/+
−
/* Private variables ---------------------------------------------------------*/+
−
/* Private constants ---------------------------------------------------------*/+
−
/** @defgroup I2S_LL_Private_Constants I2S Private Constants+
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  * @{+
−
  */+
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/* I2S registers Masks */+
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#define I2S_I2SCFGR_CLEAR_MASK             (SPI_I2SCFGR_CHLEN   | SPI_I2SCFGR_DATLEN | \+
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                                            SPI_I2SCFGR_CKPOL   | SPI_I2SCFGR_I2SSTD | \+
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                                            SPI_I2SCFGR_I2SCFG  | SPI_I2SCFGR_I2SMOD )+
−
+
−
#define I2S_I2SPR_CLEAR_MASK               0x0002U+
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/**+
−
  * @}+
−
  */+
−
/* Private macros ------------------------------------------------------------*/+
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/** @defgroup I2S_LL_Private_Macros I2S Private Macros+
−
  * @{+
−
  */+
−
+
−
#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)          \+
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                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \+
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                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \+
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                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))+
−
+
−
#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \+
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                                       || ((__VALUE__) == LL_I2S_POLARITY_HIGH))+
−
+
−
#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)   \+
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                                       || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \+
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                                       || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \+
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                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \+
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                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))+
−
+
−
#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)  \+
−
                                       || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \+
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                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \+
−
                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))+
−
+
−
#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \+
−
                                       || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))+
−
+
−
#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)    \+
−
                                       && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \+
−
                                       || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))+
−
+
−
#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)+
−
+
−
#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \+
−
                                           || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))+
−
/**+
−
  * @}+
−
  */+
−
+
−
/* Private function prototypes -----------------------------------------------*/+
−
+
−
/* Exported functions --------------------------------------------------------*/+
−
/** @addtogroup I2S_LL_Exported_Functions+
−
  * @{+
−
  */+
−
+
−
/** @addtogroup I2S_LL_EF_Init+
−
  * @{+
−
  */+
−
+
−
/**+
−
  * @brief  De-initialize the SPI/I2S registers to their default reset values.+
−
  * @param  SPIx SPI Instance+
−
  * @retval An ErrorStatus enumeration value:+
−
  *          - SUCCESS: SPI registers are de-initialized+
−
  *          - ERROR: SPI registers are not de-initialized+
−
  */+
−
ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)+
−
{+
−
  return LL_SPI_DeInit(SPIx);+
−
}+
−
+
−
/**+
−
  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.+
−
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),+
−
  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.+
−
  * @param  SPIx SPI Instance+
−
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure+
−
  * @retval An ErrorStatus enumeration value:+
−
  *          - SUCCESS: SPI registers are Initialized+
−
  *          - ERROR: SPI registers are not Initialized+
−
  */+
−
ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)+
−
{+
−
  uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;+
−
  uint32_t tmp = 0U;+
−
  uint32_t sourceclock = 0U;+
−
  ErrorStatus status = ERROR;+
−
+
−
  /* Check the I2S parameters */+
−
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));+
−
  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));+
−
  assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));+
−
  assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));+
−
  assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));+
−
  assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));+
−
  assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));+
−
+
−
  if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)+
−
  {+
−
    /*---------------------------- SPIx I2SCFGR Configuration --------------------+
−
     * Configure SPIx I2SCFGR with parameters:+
−
     * - Mode:          SPI_I2SCFGR_I2SCFG[1:0] bit+
−
     * - Standard:      SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits+
−
     * - DataFormat:    SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits+
−
     * - ClockPolarity: SPI_I2SCFGR_CKPOL bit+
−
     */+
−
+
−
    /* Write to SPIx I2SCFGR */+
−
    MODIFY_REG(SPIx->I2SCFGR,+
−
               I2S_I2SCFGR_CLEAR_MASK,+
−
               I2S_InitStruct->Mode | I2S_InitStruct->Standard |+
−
               I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |+
−
               SPI_I2SCFGR_I2SMOD);+
−
+
−
    /*---------------------------- SPIx I2SPR Configuration ----------------------+
−
     * Configure SPIx I2SPR with parameters:+
−
     * - MCLKOutput:    SPI_I2SPR_MCKOE bit+
−
     * - AudioFreq:     SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits+
−
     */+
−
+
−
    /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)+
−
     * else, default values are used:  i2sodd = 0U, i2sdiv = 2U.+
−
     */+
−
    if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)+
−
    {+
−
      /* Check the frame length (For the Prescaler computing)+
−
       * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).+
−
       */+
−
      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)+
−
      {+
−
        /* Packet length is 32 bits */+
−
        packetlength = 2U;+
−
      }+
−
+
−
      /* If an external I2S clock has to be used, the specific define should be set+
−
      in the project configuration or in the stm32f4xx_ll_rcc.h file */+
−
      /* Get the I2S source clock value */+
−
      sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S1_CLKSOURCE);+
−
+
−
      /* Compute the Real divider depending on the MCLK output state with a floating point */+
−
      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)+
−
      {+
−
        /* MCLK output is enabled */+
−
        tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);+
−
      }+
−
      else+
−
      {+
−
        /* MCLK output is disabled */+
−
        tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);+
−
      }+
−
+
−
      /* Remove the floating point */+
−
      tmp = tmp / 10U;+
−
+
−
      /* Check the parity of the divider */+
−
      i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U);+
−
+
−
      /* Compute the i2sdiv prescaler */+
−
      i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);+
−
+
−
      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */+
−
      i2sodd = (uint16_t)(i2sodd << 8U);+
−
    }+
−
+
−
    /* Test if the divider is 1 or 0 or greater than 0xFF */+
−
    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))+
−
    {+
−
      /* Set the default values */+
−
      i2sdiv = 2U;+
−
      i2sodd = 0U;+
−
    }+
−
+
−
    /* Write to SPIx I2SPR register the computed value */+
−
    WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);+
−
+
−
    status = SUCCESS;+
−
  }+
−
  return status;+
−
}+
−
+
−
/**+
−
  * @brief  Set each @ref LL_I2S_InitTypeDef field to default value.+
−
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure+
−
  *         whose fields will be set to default values.+
−
  * @retval None+
−
  */+
−
void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)+
−
{+
−
  /*--------------- Reset I2S init structure parameters values -----------------*/+
−
  I2S_InitStruct->Mode              = LL_I2S_MODE_SLAVE_TX;+
−
  I2S_InitStruct->Standard          = LL_I2S_STANDARD_PHILIPS;+
−
  I2S_InitStruct->DataFormat        = LL_I2S_DATAFORMAT_16B;+
−
  I2S_InitStruct->MCLKOutput        = LL_I2S_MCLK_OUTPUT_DISABLE;+
−
  I2S_InitStruct->AudioFreq         = LL_I2S_AUDIOFREQ_DEFAULT;+
−
  I2S_InitStruct->ClockPolarity     = LL_I2S_POLARITY_LOW;+
−
}+
−
+
−
/**+
−
  * @brief  Set linear and parity prescaler.+
−
  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n+
−
  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).+
−
  * @param  SPIx SPI Instance+
−
  * @param  PrescalerLinear value Min_Data=0x02 and Max_Data=0xFF.+
−
  * @param  PrescalerParity This parameter can be one of the following values:+
−
  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN+
−
  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD+
−
  * @retval None+
−
  */+
−
void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)+
−
{+
−
  /* Check the I2S parameters */+
−
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));+
−
  assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));+
−
  assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));+
−
+
−
  /* Write to SPIx I2SPR */+
−
  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));+
−
}+
−
+
−
#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)+
−
/**+
−
  * @brief  Configures the full duplex mode for the I2Sx peripheral using its extension+
−
  *         I2Sxext according to the specified parameters in the I2S_InitStruct.+
−
  * @note   The structure pointed by I2S_InitStruct parameter should be the same+
−
  *         used for the master I2S peripheral. In this case, if the master is+
−
  *         configured as transmitter, the slave will be receiver and vice versa.+
−
  *         Or you can force a different mode by modifying the field I2S_Mode to the+
−
  *         value I2S_SlaveRx or I2S_SlaveTx independently of the master configuration.+
−
  * @param  I2Sxext SPI Instance+
−
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure+
−
  * @retval An ErrorStatus enumeration value:+
−
  *          - SUCCESS: I2Sxext registers are Initialized+
−
  *          - ERROR: I2Sxext registers are not Initialized+
−
  */+
−
ErrorStatus  LL_I2S_InitFullDuplex(SPI_TypeDef *I2Sxext, LL_I2S_InitTypeDef *I2S_InitStruct)+
−
{+
−
  uint16_t mode = 0U;+
−
  ErrorStatus status = ERROR;+
−
+
−
  /* Check the I2S parameters */+
−
  assert_param(IS_I2S_EXT_ALL_INSTANCE(I2Sxext));+
−
  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));+
−
  assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));+
−
  assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));+
−
  assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));+
−
+
−
  if (LL_I2S_IsEnabled(I2Sxext) == 0x00000000U)+
−
  {+
−
    /*---------------------------- SPIx I2SCFGR Configuration --------------------+
−
     * Configure SPIx I2SCFGR with parameters:+
−
     * - Mode:          SPI_I2SCFGR_I2SCFG[1:0] bit+
−
     * - Standard:      SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits+
−
     * - DataFormat:    SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits+
−
     * - ClockPolarity: SPI_I2SCFGR_CKPOL bit+
−
     */+
−
+
−
    /* Reset I2SPR registers */+
−
    WRITE_REG(I2Sxext->I2SPR, I2S_I2SPR_CLEAR_MASK);+
−
+
−
    /* Get the mode to be configured for the extended I2S */+
−
    if ((I2S_InitStruct->Mode == LL_I2S_MODE_MASTER_TX) || (I2S_InitStruct->Mode == LL_I2S_MODE_SLAVE_TX))+
−
    {+
−
      mode = LL_I2S_MODE_SLAVE_RX;+
−
    }+
−
    else+
−
    {+
−
      if ((I2S_InitStruct->Mode == LL_I2S_MODE_MASTER_RX) || (I2S_InitStruct->Mode == LL_I2S_MODE_SLAVE_RX))+
−
      {+
−
        mode = LL_I2S_MODE_SLAVE_TX;+
−
      }+
−
    }+
−
+
−
    /* Write to SPIx I2SCFGR */+
−
    MODIFY_REG(I2Sxext->I2SCFGR,+
−
               I2S_I2SCFGR_CLEAR_MASK,+
−
               I2S_InitStruct->Standard |+
−
               I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |+
−
               SPI_I2SCFGR_I2SMOD | mode);+
−
+
−
    status = SUCCESS;+
−
  }+
−
  return status;+
−
}+
−
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */+
−
+
−
/**+
−
  * @}+
−
  */+
−
+
−
/**+
−
  * @}+
−
  */+
−
+
−
/**+
−
  * @}+
−
  */+
−
+
−
#endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) || defined (SPI4) || defined (SPI5) || defined(SPI6) */+
−
+
−
/**+
−
  * @}+
−
  */+
−
+
−
#endif /* USE_FULL_LL_DRIVER */+
−
+
−
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/+
−