/**+
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  ******************************************************************************+
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  * @file    stm32f4xx_ll_rng.h+
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  * @author  MCD Application Team+
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  * @brief   Header file of RNG LL module.+
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  ******************************************************************************+
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  * @attention+
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  *+
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  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>+
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  *+
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  * Redistribution and use in source and binary forms, with or without modification,+
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  * are permitted provided that the following conditions are met:+
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  *   1. Redistributions of source code must retain the above copyright notice,+
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  *      this list of conditions and the following disclaimer.+
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  *   2. Redistributions in binary form must reproduce the above copyright notice,+
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  *      this list of conditions and the following disclaimer in the documentation+
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  *      and/or other materials provided with the distribution.+
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  *   3. Neither the name of STMicroelectronics nor the names of its contributors+
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  *      may be used to endorse or promote products derived from this software+
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  *      without specific prior written permission.+
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  *+
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  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"+
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  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE+
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  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE+
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  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE+
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL+
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  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR+
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  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER+
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,+
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  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE+
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  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.+
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  *+
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  ******************************************************************************+
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  */+
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+
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/* Define to prevent recursive inclusion -------------------------------------*/+
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#ifndef __STM32F4xx_LL_RNG_H+
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#define __STM32F4xx_LL_RNG_H+
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+
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#ifdef __cplusplus+
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extern "C" {+
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#endif+
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+
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/* Includes ------------------------------------------------------------------*/+
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#include "stm32f4xx.h"+
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+
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/** @addtogroup STM32F4xx_LL_Driver+
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  * @{+
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  */+
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+
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#if defined(RNG)+
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+
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/** @defgroup RNG_LL RNG+
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  * @{+
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  */+
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+
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/* Private types -------------------------------------------------------------*/+
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/* Private variables ---------------------------------------------------------*/+
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/* Private constants ---------------------------------------------------------*/+
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/* Private macros ------------------------------------------------------------*/+
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+
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/* Exported types ------------------------------------------------------------*/+
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/* Exported constants --------------------------------------------------------*/+
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/** @defgroup RNG_LL_Exported_Constants RNG Exported Constants+
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  * @{+
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  */+
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+
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/** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines+
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  * @brief    Flags defines which can be used with LL_RNG_ReadReg function+
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  * @{+
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  */+
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#define LL_RNG_SR_DRDY RNG_SR_DRDY    /*!< Register contains valid random data */+
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#define LL_RNG_SR_CECS RNG_SR_CECS    /*!< Clock error current status */+
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#define LL_RNG_SR_SECS RNG_SR_SECS    /*!< Seed error current status */+
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#define LL_RNG_SR_CEIS RNG_SR_CEIS    /*!< Clock error interrupt status */+
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#define LL_RNG_SR_SEIS RNG_SR_SEIS    /*!< Seed error interrupt status */+
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/**+
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  * @}+
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  */+
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+
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/** @defgroup RNG_LL_EC_IT IT Defines+
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  * @brief    IT defines which can be used with LL_RNG_ReadReg and  LL_RNG_WriteReg macros+
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  * @{+
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  */+
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#define LL_RNG_CR_IE   RNG_CR_IE      /*!< RNG Interrupt enable */+
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/**+
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  * @}+
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  */+
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+
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/**+
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  * @}+
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  */+
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+
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/* Exported macro ------------------------------------------------------------*/+
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/** @defgroup RNG_LL_Exported_Macros RNG Exported Macros+
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  * @{+
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  */+
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+
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/** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros+
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  * @{+
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  */+
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+
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/**+
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  * @brief  Write a value in RNG register+
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  * @param  __INSTANCE__ RNG Instance+
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  * @param  __REG__ Register to be written+
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  * @param  __VALUE__ Value to be written in the register+
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  * @retval None+
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  */+
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#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))+
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+
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/**+
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  * @brief  Read a value in RNG register+
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  * @param  __INSTANCE__ RNG Instance+
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  * @param  __REG__ Register to be read+
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  * @retval Register value+
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  */+
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#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)+
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/**+
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  * @}+
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  */+
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+
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/**+
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  * @}+
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  */+
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+
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+
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/* Exported functions --------------------------------------------------------*/+
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/** @defgroup RNG_LL_Exported_Functions RNG Exported Functions+
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  * @{+
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  */+
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/** @defgroup RNG_LL_EF_Configuration RNG Configuration functions+
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  * @{+
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  */+
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+
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/**+
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  * @brief  Enable Random Number Generation+
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  * @rmtoll CR           RNGEN         LL_RNG_Enable+
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  * @param  RNGx RNG Instance+
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  * @retval None+
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  */+
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__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)+
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{+
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  SET_BIT(RNGx->CR, RNG_CR_RNGEN);+
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}+
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+
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/**+
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  * @brief  Disable Random Number Generation+
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  * @rmtoll CR           RNGEN         LL_RNG_Disable+
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  * @param  RNGx RNG Instance+
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  * @retval None+
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  */+
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__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)+
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{+
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  CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);+
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}+
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+
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/**+
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  * @brief  Check if Random Number Generator is enabled+
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  * @rmtoll CR           RNGEN         LL_RNG_IsEnabled+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN));+
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}+
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+
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/**+
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  * @}+
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  */+
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+
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/** @defgroup RNG_LL_EF_FLAG_Management FLAG Management+
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  * @{+
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  */+
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+
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/**+
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  * @brief  Indicate if the RNG Data ready Flag is set or not+
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  * @rmtoll SR           DRDY          LL_RNG_IsActiveFlag_DRDY+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY));+
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}+
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+
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/**+
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  * @brief  Indicate if the Clock Error Current Status Flag is set or not+
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  * @rmtoll SR           CECS          LL_RNG_IsActiveFlag_CECS+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS));+
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}+
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+
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/**+
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  * @brief  Indicate if the Seed Error Current Status Flag is set or not+
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  * @rmtoll SR           SECS          LL_RNG_IsActiveFlag_SECS+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS));+
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}+
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+
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/**+
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  * @brief  Indicate if the Clock Error Interrupt Status Flag is set or not+
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  * @rmtoll SR           CEIS          LL_RNG_IsActiveFlag_CEIS+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS));+
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}+
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+
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/**+
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  * @brief  Indicate if the Seed Error Interrupt Status Flag is set or not+
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  * @rmtoll SR           SEIS          LL_RNG_IsActiveFlag_SEIS+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS));+
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}+
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+
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/**+
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  * @brief  Clear Clock Error interrupt Status (CEIS) Flag+
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  * @rmtoll SR           CEIS          LL_RNG_ClearFlag_CEIS+
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  * @param  RNGx RNG Instance+
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  * @retval None+
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  */+
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__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)+
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{+
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  WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);+
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}+
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+
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/**+
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  * @brief  Clear Seed Error interrupt Status (SEIS) Flag+
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  * @rmtoll SR           SEIS          LL_RNG_ClearFlag_SEIS+
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  * @param  RNGx RNG Instance+
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  * @retval None+
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  */+
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__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)+
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{+
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  WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);+
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}+
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+
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/**+
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  * @}+
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  */+
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+
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/** @defgroup RNG_LL_EF_IT_Management IT Management+
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  * @{+
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  */+
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+
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/**+
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  * @brief  Enable Random Number Generator Interrupt+
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  *         (applies for either Seed error, Clock Error or Data ready interrupts)+
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  * @rmtoll CR           IE            LL_RNG_EnableIT+
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  * @param  RNGx RNG Instance+
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  * @retval None+
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  */+
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__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)+
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{+
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  SET_BIT(RNGx->CR, RNG_CR_IE);+
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}+
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+
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/**+
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  * @brief  Disable Random Number Generator Interrupt+
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  *         (applies for either Seed error, Clock Error or Data ready interrupts)+
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  * @rmtoll CR           IE            LL_RNG_DisableIT+
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  * @param  RNGx RNG Instance+
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  * @retval None+
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  */+
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__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)+
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{+
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  CLEAR_BIT(RNGx->CR, RNG_CR_IE);+
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}+
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+
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/**+
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  * @brief  Check if Random Number Generator Interrupt is enabled+
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  *         (applies for either Seed error, Clock Error or Data ready interrupts)+
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  * @rmtoll CR           IE            LL_RNG_IsEnabledIT+
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  * @param  RNGx RNG Instance+
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  * @retval State of bit (1 or 0).+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)+
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{+
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  return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE));+
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}+
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+
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/**+
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  * @}+
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  */+
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+
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/** @defgroup RNG_LL_EF_Data_Management Data Management+
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  * @{+
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  */+
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+
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/**+
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  * @brief  Return32-bit Random Number value+
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  * @rmtoll DR           RNDATA        LL_RNG_ReadRandData32+
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  * @param  RNGx RNG Instance+
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  * @retval Generated 32-bit random value+
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  */+
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__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)+
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{+
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  return (uint32_t)(READ_REG(RNGx->DR));+
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}+
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+
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/**+
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  * @}+
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  */+
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+
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#if defined(USE_FULL_LL_DRIVER)+
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/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions+
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  * @{+
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  */+
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+
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ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);+
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+
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/**+
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  * @}+
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  */+
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#endif /* USE_FULL_LL_DRIVER */+
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+
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/**+
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  * @}+
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  */+
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+
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/**+
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  * @}+
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  */+
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+
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#endif /* defined(RNG) */+
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+
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/**+
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  * @}+
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  */+
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+
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#ifdef __cplusplus+
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}+
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#endif+
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+
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#endif /* __STM32F4xx_LL_RNG_H */+
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+
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/+
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