Mercurial > public > ostc4
view Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h @ 185:1bb24fd3fc92
Merged in Ideenmodellierer/ostc4/Cleanup_Compass_Wireless (pull request #4)
Cleanup Compass Wireless
author | heinrichsweikamp <bitbucket@heinrichsweikamp.com> |
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date | Fri, 15 Mar 2019 08:22:16 +0000 |
parents | c78bcbd5deda |
children |
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/** ****************************************************************************** * @file stm32f4xx_hal_i2s.h * @author MCD Application Team * @brief Header file of I2S HAL module. ****************************************************************************** * @attention * * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * 3. Neither the name of STMicroelectronics nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F4xx_HAL_I2S_H #define __STM32F4xx_HAL_I2S_H #ifdef __cplusplus extern "C" { #endif /* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_hal_def.h" /** @addtogroup STM32F4xx_HAL_Driver * @{ */ /** @addtogroup I2S I2S * @{ */ /* Exported types ------------------------------------------------------------*/ /** @defgroup I2S_Exported_Types I2S Exported Types * @{ */ /** * @brief I2S Init structure definition */ typedef struct { uint32_t Mode; /*!< Specifies the I2S operating mode. This parameter can be a value of @ref I2S_Mode */ uint32_t Standard; /*!< Specifies the standard used for the I2S communication. This parameter can be a value of @ref I2S_Standard */ uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. This parameter can be a value of @ref I2S_Data_Format */ uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. This parameter can be a value of @ref I2S_MCLK_Output */ uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. This parameter can be a value of @ref I2S_Audio_Frequency */ uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. This parameter can be a value of @ref I2S_Clock_Polarity */ uint32_t ClockSource; /*!< Specifies the I2S Clock Source. This parameter can be a value of @ref I2S_Clock_Source */ uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode. This parameter can be a value of @ref I2S_FullDuplex_Mode */ }I2S_InitTypeDef; /** * @brief HAL State structures definition */ typedef enum { HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ }HAL_I2S_StateTypeDef; /** * @brief I2S handle Structure definition */ typedef struct __I2S_HandleTypeDef { SPI_TypeDef *Instance; /*!< I2S registers base address */ I2S_InitTypeDef Init; /*!< I2S communication parameters */ uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter (This field is initialized at the same value as transfer size at the beginning of the transfer and decremented when a sample is received NbSamplesReceived = RxBufferSize-RxBufferCount) */ void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */ DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ __IO uint32_t ErrorCode; /*!< I2S Error code This parameter can be a value of @ref I2S_ErrorCode */ }I2S_HandleTypeDef; /** * @} */ /* Exported constants --------------------------------------------------------*/ /** @defgroup I2S_Exported_Constants I2S Exported Constants * @{ */ /** * @defgroup I2S_ErrorCode I2S Error Code * @{ */ #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */ #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */ #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */ #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */ #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */ #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */ /** * @} */ /** @defgroup I2S_Mode I2S Mode * @{ */ #define I2S_MODE_SLAVE_TX (0x00000000U) #define I2S_MODE_SLAVE_RX (0x00000100U) #define I2S_MODE_MASTER_TX (0x00000200U) #define I2S_MODE_MASTER_RX (0x00000300U) /** * @} */ /** @defgroup I2S_Standard I2S Standard * @{ */ #define I2S_STANDARD_PHILIPS (0x00000000U) #define I2S_STANDARD_MSB (0x00000010U) #define I2S_STANDARD_LSB (0x00000020U) #define I2S_STANDARD_PCM_SHORT (0x00000030U) #define I2S_STANDARD_PCM_LONG (0x000000B0U) /** * @} */ /** @defgroup I2S_Data_Format I2S Data Format * @{ */ #define I2S_DATAFORMAT_16B (0x00000000U) #define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U) #define I2S_DATAFORMAT_24B (0x00000003U) #define I2S_DATAFORMAT_32B (0x00000005U) /** * @} */ /** @defgroup I2S_MCLK_Output I2S Mclk Output * @{ */ #define I2S_MCLKOUTPUT_ENABLE SPI_I2SPR_MCKOE #define I2S_MCLKOUTPUT_DISABLE (0x00000000U) /** * @} */ /** @defgroup I2S_Audio_Frequency I2S Audio Frequency * @{ */ #define I2S_AUDIOFREQ_192K (192000U) #define I2S_AUDIOFREQ_96K (96000U) #define I2S_AUDIOFREQ_48K (48000U) #define I2S_AUDIOFREQ_44K (44100U) #define I2S_AUDIOFREQ_32K (32000U) #define I2S_AUDIOFREQ_22K (22050U) #define I2S_AUDIOFREQ_16K (16000U) #define I2S_AUDIOFREQ_11K (11025U) #define I2S_AUDIOFREQ_8K (8000U) #define I2S_AUDIOFREQ_DEFAULT (2U) /** * @} */ /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode * @{ */ #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U) #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U) /** * @} */ /** @defgroup I2S_Clock_Polarity I2S Clock Polarity * @{ */ #define I2S_CPOL_LOW (0x00000000U) #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL) /** * @} */ /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition * @{ */ #define I2S_IT_TXE SPI_CR2_TXEIE #define I2S_IT_RXNE SPI_CR2_RXNEIE #define I2S_IT_ERR SPI_CR2_ERRIE /** * @} */ /** @defgroup I2S_Flags_Definition I2S Flags Definition * @{ */ #define I2S_FLAG_TXE SPI_SR_TXE #define I2S_FLAG_RXNE SPI_SR_RXNE #define I2S_FLAG_UDR SPI_SR_UDR #define I2S_FLAG_OVR SPI_SR_OVR #define I2S_FLAG_FRE SPI_SR_FRE #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE #define I2S_FLAG_BSY SPI_SR_BSY /** * @} */ /** @defgroup I2S_Clock_Source I2S Clock Source Definition * @{ */ #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \ defined(STM32F479xx) #define I2S_CLOCK_PLL (0x00000000U) #define I2S_CLOCK_EXTERNAL (0x00000001U) #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */ #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\ defined(STM32F413xx) || defined(STM32F423xx) #define I2S_CLOCK_PLL (0x00000000U) #define I2S_CLOCK_EXTERNAL (0x00000001U) #define I2S_CLOCK_PLLR (0x00000002U) #define I2S_CLOCK_PLLSRC (0x00000003U) #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) #define I2S_CLOCK_PLLSRC (0x00000000U) #define I2S_CLOCK_EXTERNAL (0x00000001U) #define I2S_CLOCK_PLLR (0x00000002U) #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ /** * @} */ /** * @} */ /* Exported macro ------------------------------------------------------------*/ /** @defgroup I2S_Exported_Macros I2S Exported Macros * @{ */ /** @brief Reset I2S handle state * @param __HANDLE__ specifies the I2S Handle. * @retval None */ #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) /** @brief Enable or disable the specified SPI peripheral (in I2S mode). * @param __HANDLE__ specifies the I2S Handle. * @retval None */ #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE) #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &=(uint16_t)(~SPI_I2SCFGR_I2SE)) /** @brief Enable or disable the specified I2S interrupts. * @param __HANDLE__ specifies the I2S Handle. * @param __INTERRUPT__ specifies the interrupt source to enable or disable. * This parameter can be one of the following values: * @arg I2S_IT_TXE: Tx buffer empty interrupt enable * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable * @arg I2S_IT_ERR: Error interrupt enable * @retval None */ #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &=(uint16_t)(~(__INTERRUPT__))) /** @brief Checks if the specified I2S interrupt source is enabled or disabled. * @param __HANDLE__ specifies the I2S Handle. * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. * @param __INTERRUPT__ specifies the I2S interrupt source to check. * This parameter can be one of the following values: * @arg I2S_IT_TXE: Tx buffer empty interrupt enable * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable * @arg I2S_IT_ERR: Error interrupt enable * @retval The new state of __IT__ (TRUE or FALSE). */ #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) /** @brief Checks whether the specified I2S flag is set or not. * @param __HANDLE__ specifies the I2S Handle. * @param __FLAG__ specifies the flag to check. * This parameter can be one of the following values: * @arg I2S_FLAG_RXNE: Receive buffer not empty flag * @arg I2S_FLAG_TXE: Transmit buffer empty flag * @arg I2S_FLAG_UDR: Underrun flag * @arg I2S_FLAG_OVR: Overrun flag * @arg I2S_FLAG_FRE: Frame error flag * @arg I2S_FLAG_CHSIDE: Channel Side flag * @arg I2S_FLAG_BSY: Busy flag * @retval The new state of __FLAG__ (TRUE or FALSE). */ #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) /** @brief Clears the I2S OVR pending flag. * @param __HANDLE__ specifies the I2S Handle. * @retval None */ #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \ do{ \ __IO uint32_t tmpreg = 0x00U; \ tmpreg = (__HANDLE__)->Instance->DR; \ tmpreg = (__HANDLE__)->Instance->SR; \ UNUSED(tmpreg); \ } while(0) /** @brief Clears the I2S UDR pending flag. * @param __HANDLE__ specifies the I2S Handle. * @retval None */ #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \ do{ \ __IO uint32_t tmpreg = 0x00U; \ tmpreg = (__HANDLE__)->Instance->SR; \ UNUSED(tmpreg); \ } while(0) /** * @} */ /* Include I2S Extension module */ #include "stm32f4xx_hal_i2s_ex.h" /* Exported functions --------------------------------------------------------*/ /** @defgroup I2S_Exported_Functions I2S Exported Functions * @{ */ /** @defgroup I2S_Exported_Functions_Group1 I2S Initialization and de-initialization functions * @{ */ /* Initialization/de-initialization functions **********************************/ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); /** * @} */ /** @defgroup I2S_Exported_Functions_Group2 I2S IO operation functions * @{ */ /* I/O operation functions *****************************************************/ /* Blocking mode: Polling */ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); /* Non-Blocking mode: Interrupt */ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); /* Non-Blocking mode: DMA */ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); /** * @} */ /** @defgroup I2S_Exported_Functions_Group3 I2S Peripheral Control and State functions * @{ */ /* Peripheral Control and State functions ************************************/ HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); /** * @} */ /** * @} */ /* Private types -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/ /** @defgroup I2S_Private_Constants I2S Private Constants * @{ */ /** * @} */ /* Private macros ------------------------------------------------------------*/ /** @defgroup I2S_Private_Macros I2S Private Macros * @{ */ #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ ((MODE) == I2S_MODE_SLAVE_RX) || \ ((MODE) == I2S_MODE_MASTER_TX) || \ ((MODE) == I2S_MODE_MASTER_RX)) #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ ((STANDARD) == I2S_STANDARD_MSB) || \ ((STANDARD) == I2S_STANDARD_LSB) || \ ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ ((STANDARD) == I2S_STANDARD_PCM_LONG)) #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ ((FORMAT) == I2S_DATAFORMAT_24B) || \ ((FORMAT) == I2S_DATAFORMAT_32B)) #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \ ((MODE) == I2S_FULLDUPLEXMODE_ENABLE)) #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ ((CPOL) == I2S_CPOL_HIGH)) #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \ defined(STM32F479xx) #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\ ((CLOCK) == I2S_CLOCK_PLL)) #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */ #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\ defined(STM32F412Rx) || defined(STM32F412Cx) || defined (STM32F413xx) ||\ defined(STM32F423xx) #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\ ((CLOCK) == I2S_CLOCK_PLL) ||\ ((CLOCK) == I2S_CLOCK_PLLSRC) ||\ ((CLOCK) == I2S_CLOCK_PLLR)) #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\ ((CLOCK) == I2S_CLOCK_PLLSRC) ||\ ((CLOCK) == I2S_CLOCK_PLLR)) #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */ /** * @} */ /* Private functions ---------------------------------------------------------*/ /** * @} */ /** * @} */ #ifdef __cplusplus } #endif #endif /* __STM32F4xx_HAL_I2S_H */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/