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comparison Small_CPU/Src/uart.c @ 932:effadaa3a1f7 Evo_2_23

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Cleanup Gnss UART implementation: The first draft of the internal UART implementation was just a copy of the external UART handling. To avoid duplicated code and maintainance issue both UARTs (external/internal 6/1) share the same functions. To enable this a control structure has to be used as function input which defines the none shared resources like DMA control and rx/tx buffers
author Ideenmodellierer
date Sat, 07 Dec 2024 21:28:08 +0100
parents 7c996354b8ac
children 43055e069bd1
comparison
equal deleted inserted replaced
931:5a9bc2e6112d 932:effadaa3a1f7
28 #include "data_exchange.h" 28 #include "data_exchange.h"
29 #include <string.h> /* memset */ 29 #include <string.h> /* memset */
30 30
31 #ifdef ENABLE_GPIO_V2 31 #ifdef ENABLE_GPIO_V2
32 extern UART_HandleTypeDef huart6; 32 extern UART_HandleTypeDef huart6;
33 extern void UART6_RxCpltCallback(UART_HandleTypeDef *huart); 33 extern sUartComCtrl Uart6Ctrl;
34 extern void UART6_TxCpltCallback(UART_HandleTypeDef *huart);
35 #endif 34 #endif
36 35
37 /* Private variables ---------------------------------------------------------*/ 36 /* Private variables ---------------------------------------------------------*/
38
39
40 #define TX_BUF_SIZE (40u) /* max length for commands */
41 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */
42 #define CHUNKS_PER_BUFFER (6u)
43
44
45 37
46 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart1_tx; 38 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart1_tx;
47 39
48 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ 40 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */
49 uint8_t txBuffer[CHUNK_SIZE]; /* tx uses less bytes */ 41 uint8_t txBuffer[CHUNK_SIZE]; /* tx uses less bytes */
50 uint8_t txBufferQue[TX_BUF_SIZE]; /* In MUX mode command may be send shortly after each other => allow q 1 entry que */ 42 uint8_t txBufferQue[TX_BUF_SIZE]; /* In MUX mode command may be send shortly after each other => allow q 1 entry que */
51 uint8_t txBufferQueLen; 43
52 44
53 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */
54 static uint8_t rxReadIndex; /* Index at which new data is stared */
55 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */ 45 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */
56 static uint8_t dmaRxActive; /* Indicator if DMA reception needs to be started */ 46
57 static uint8_t dmaTxActive; /* Indicator if DMA reception needs to be started */ 47 sUartComCtrl Uart1Ctrl;
48 static sUartComCtrl* pGnssCtrl = NULL;
58 49
59 static uint32_t LastCmdRequestTick = 0; /* Used by ADC handler to avoid interferance with UART communication */ 50 static uint32_t LastCmdRequestTick = 0; /* Used by ADC handler to avoid interferance with UART communication */
60 51
61 static uint8_t isEndIndication(uint8_t index);
62
63 /* Exported functions --------------------------------------------------------*/ 52 /* Exported functions --------------------------------------------------------*/
64 53
65 void UART_clearRxBuffer(void) 54
55 void UART_SetGnssCtrl(sUartComCtrl* pTarget)
56 {
57 pGnssCtrl = pTarget;
58 }
59
60 sUartComCtrl* UART_GetGnssCtrl()
61 {
62 return pGnssCtrl;
63 }
64
65
66 void UART_clearRxBuffer(sUartComCtrl* pUartCtrl)
66 { 67 {
67 uint16_t index = 0; 68 uint16_t index = 0;
68 do 69 do
69 { 70 {
70 rxBuffer[index++] = BUFFER_NODATA_LOW; 71 pUartCtrl->pRxBuffer[index++] = BUFFER_NODATA_LOW;
71 rxBuffer[index++] = BUFFER_NODATA_HIGH; 72 pUartCtrl->pRxBuffer[index++] = BUFFER_NODATA_HIGH;
72 } while (index < sizeof(rxBuffer)); 73 } while (index < sizeof(rxBuffer));
73 74
74 rxReadIndex = 0; 75 pUartCtrl->rxReadIndex = 0;
75 rxWriteIndex = 0; 76 pUartCtrl->rxWriteIndex = 0;
76 } 77 }
77 78
78 void MX_USART1_UART_Init(void) 79 void MX_USART1_UART_Init(void)
79 { 80 {
80 /* regular init */ 81 /* regular init */
89 90
90 HAL_UART_Init(&huart1); 91 HAL_UART_Init(&huart1);
91 92
92 MX_USART1_DMA_Init(); 93 MX_USART1_DMA_Init();
93 94
94 UART_clearRxBuffer(); 95 UART_clearRxBuffer(&Uart1Ctrl);
95 rxReadIndex = 0;
96 lastCmdIndex = 0; 96 lastCmdIndex = 0;
97 rxWriteIndex = 0; 97
98 dmaRxActive = 0; 98 Uart1Ctrl.pHandle = &huart1;
99 dmaTxActive = 0; 99 Uart1Ctrl.rxWriteIndex = 0;
100 txBufferQueLen = 0; 100 Uart1Ctrl.rxReadIndex = 0;
101 Uart1Ctrl.dmaRxActive = 0;
102 Uart1Ctrl.dmaTxActive = 0;
103 Uart1Ctrl.pRxBuffer = rxBuffer;
104 Uart1Ctrl.pTxBuffer = txBuffer;
105 Uart1Ctrl.txBufferQueLen = 0;
106
107 #ifndef ENABLE_GPIO_V2
108 UART_SetGnssCtrl(&Uart1Ctrl);
109 #endif
101 } 110 }
102 111
103 112
104 113
105 void MX_USART1_UART_DeInit(void) 114 void MX_USART1_UART_DeInit(void)
107 HAL_DMA_Abort(&hdma_usart1_rx); 116 HAL_DMA_Abort(&hdma_usart1_rx);
108 HAL_DMA_DeInit(&hdma_usart1_rx); 117 HAL_DMA_DeInit(&hdma_usart1_rx);
109 HAL_DMA_Abort(&hdma_usart1_tx); 118 HAL_DMA_Abort(&hdma_usart1_tx);
110 HAL_DMA_DeInit(&hdma_usart1_tx); 119 HAL_DMA_DeInit(&hdma_usart1_tx);
111 HAL_UART_DeInit(&huart1); 120 HAL_UART_DeInit(&huart1);
112 dmaRxActive = 0; 121 Uart1Ctrl.dmaRxActive = 0;
113 dmaTxActive = 0; 122 Uart1Ctrl.dmaTxActive = 0;
114 txBufferQueLen = 0; 123 Uart1Ctrl.txBufferQueLen = 0;
115 } 124 }
116 125
117 void MX_USART1_DMA_Init() 126 void MX_USART1_DMA_Init()
118 { 127 {
119 /* DMA controller clock enable */ 128 /* DMA controller clock enable */
154 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); 163 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);
155 HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 1); 164 HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 1);
156 HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); 165 HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
157 } 166 }
158 167
159 void UART_MUX_SelectAddress(uint8_t muxAddress) 168 void UART_MUX_SelectAddress(uint8_t muxAddress)
160 { 169 {
161 uint8_t indexstr[4]; 170 uint8_t indexstr[4];
162 171
163 if(muxAddress <= MAX_MUX_CHANNEL) 172 if(muxAddress <= MAX_MUX_CHANNEL)
164 { 173 {
165 indexstr[0] = '~'; 174 indexstr[0] = '~';
166 indexstr[1] = muxAddress; 175 indexstr[1] = muxAddress;
167 indexstr[2] = 0x0D; 176 indexstr[2] = 0x0D;
168 indexstr[3] = 0x0A; 177 indexstr[3] = 0x0A;
169 if(!dmaTxActive) 178 if(!Uart1Ctrl.dmaTxActive)
170 { 179 {
171 memcpy(txBuffer, indexstr, 4); 180 memcpy(txBuffer, indexstr, 4);
172 dmaTxActive = 0; 181 Uart1Ctrl.dmaTxActive = 0;
173 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,4)) 182 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,4))
174 { 183 {
175 dmaTxActive = 1; 184 Uart1Ctrl.dmaTxActive = 1;
176 while(dmaTxActive) 185 while(Uart1Ctrl.dmaTxActive)
177 { 186 {
178 HAL_Delay(1); 187 HAL_Delay(1);
179 } 188 }
180 } 189 }
181 } 190 }
182 else 191 else
183 { 192 {
184 memcpy(txBufferQue, indexstr, 4); 193 memcpy(txBufferQue, indexstr, 4);
185 txBufferQueLen = 4; 194 Uart1Ctrl.txBufferQueLen = 4;
186 } 195 }
187 } 196 }
188 } 197 }
189 198
190 199
191 void UART_SendCmdString(uint8_t *cmdString) 200 void UART_SendCmdString(uint8_t *cmdString)
192 { 201 {
193 uint8_t cmdLength = strlen((char*)cmdString); 202 uint8_t cmdLength = strlen((char*)cmdString);
194 203
195 if(dmaTxActive == 0) 204 if(Uart1Ctrl.dmaTxActive == 0)
196 { 205 {
197 if(cmdLength < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ 206 if(cmdLength < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */
198 { 207 {
199 if(dmaRxActive == 0) 208 if(Uart1Ctrl.dmaRxActive == 0)
200 { 209 {
201 UART_StartDMA_Receiption(); 210 UART_StartDMA_Receiption(&Uart1Ctrl);
202 } 211 }
203 memcpy(txBuffer, cmdString, cmdLength); 212 memcpy(txBuffer, cmdString, cmdLength);
204 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,cmdLength)) 213 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,cmdLength))
205 { 214 {
206 dmaTxActive = 1; 215 Uart1Ctrl.dmaTxActive = 1;
207 LastCmdRequestTick = HAL_GetTick(); 216 LastCmdRequestTick = HAL_GetTick();
208 } 217 }
209 } 218 }
210 } 219 }
211 else 220 else
212 { 221 {
213 memcpy(txBufferQue, cmdString, cmdLength); 222 memcpy(txBufferQue, cmdString, cmdLength);
214 txBufferQueLen = cmdLength; 223 Uart1Ctrl.txBufferQueLen = cmdLength;
215 } 224 }
216 } 225 }
217 226
218 void UART_SendCmdUbx(const uint8_t *cmd, uint8_t len) 227 void UART_SendCmdUbx(const uint8_t *cmd, uint8_t len)
219 { 228 {
220 if(len < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ 229 if(len < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */
221 { 230 {
222 if(dmaRxActive == 0) 231 if(pGnssCtrl != NULL)
223 { 232 {
224 UART_StartDMA_Receiption(); 233 if(pGnssCtrl->dmaRxActive == 0)
225 } 234 {
226 memcpy(txBuffer, cmd, len); 235 UART_StartDMA_Receiption(pGnssCtrl);
227 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,len)) 236 }
228 { 237 memcpy(pGnssCtrl->pTxBuffer, cmd, len);
229 dmaTxActive = 1; 238 if(HAL_OK == HAL_UART_Transmit_DMA(pGnssCtrl->pHandle,pGnssCtrl->pTxBuffer,len))
230 LastCmdRequestTick = HAL_GetTick(); 239 {
240 pGnssCtrl->dmaTxActive = 1;
241 LastCmdRequestTick = HAL_GetTick();
242 }
231 } 243 }
232 } 244 }
233 } 245 }
234 246
235 247
257 index++; 269 index++;
258 } 270 }
259 *puint64 = result; 271 *puint64 = result;
260 } 272 }
261 273
262 void UART_StartDMA_Receiption() 274 void UART_StartDMA_Receiption(sUartComCtrl* pUartCtrl)
263 { 275 {
264 if(dmaRxActive == 0) 276 if(pUartCtrl->dmaRxActive == 0)
265 { 277 {
266 if(((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE)) || ((isEndIndication(rxWriteIndex)) && (isEndIndication(rxWriteIndex + 1)))) /* start next transfer if we did not catch up with read index */ 278 if(((pUartCtrl->rxWriteIndex / CHUNK_SIZE) != (pUartCtrl->rxReadIndex / CHUNK_SIZE)) || ((UART_isEndIndication(pUartCtrl, pUartCtrl->rxWriteIndex)) && (UART_isEndIndication(pUartCtrl, pUartCtrl->rxWriteIndex + 1)))) /* start next transfer if we did not catch up with read index */
267 { 279 {
268 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE)) 280 if(HAL_OK == HAL_UART_Receive_DMA (pUartCtrl->pHandle, &pUartCtrl->pRxBuffer[pUartCtrl->rxWriteIndex], CHUNK_SIZE))
269 { 281 {
270 dmaRxActive = 1; 282 pUartCtrl->dmaRxActive = 1;
271 } 283 }
272 } 284 }
273 } 285 }
274 } 286 }
275 287
280 HAL_UART_Init(&huart1); 292 HAL_UART_Init(&huart1);
281 MX_USART1_DMA_Init(); 293 MX_USART1_DMA_Init();
282 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3); 294 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3);
283 HAL_NVIC_EnableIRQ(USART1_IRQn); 295 HAL_NVIC_EnableIRQ(USART1_IRQn);
284 296
285 UART_clearRxBuffer(); 297 UART_clearRxBuffer(&Uart1Ctrl);
286 rxReadIndex = 0; 298 Uart1Ctrl.rxReadIndex = 0;
287 rxWriteIndex = 0; 299 Uart1Ctrl.rxWriteIndex = 0;
288 dmaRxActive = 0; 300 Uart1Ctrl.dmaRxActive = 0;
289 txBufferQueLen = 0; 301 Uart1Ctrl.txBufferQueLen = 0;
290 } 302 }
291 303
304 void UART_HandleRxComplete(sUartComCtrl* pUartCtrl)
305 {
306 pUartCtrl->dmaRxActive = 0;
307 pUartCtrl->rxWriteIndex+=CHUNK_SIZE;
308 if(pUartCtrl->rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
309 {
310 pUartCtrl->rxWriteIndex = 0;
311 }
312 UART_StartDMA_Receiption(pUartCtrl);
313 }
292 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) 314 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
293 { 315 {
294 if(huart == &huart1)
295 {
296 dmaRxActive = 0;
297 rxWriteIndex+=CHUNK_SIZE;
298 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
299 {
300 rxWriteIndex = 0;
301 }
302 UART_StartDMA_Receiption();
303 }
304 #ifdef ENABLE_GPIO_V2
305 if(huart == &huart6)
306 {
307 UART6_RxCpltCallback(huart);
308 }
309 #endif
310 }
311 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
312 {
313 if(huart == &huart1) 316 if(huart == &huart1)
314 { 317 {
315 dmaTxActive = 0; 318 UART_HandleRxComplete(&Uart1Ctrl);
316 UART_WriteData();
317 if(txBufferQueLen)
318 {
319 memcpy(txBuffer, txBufferQue, txBufferQueLen);
320 HAL_UART_Transmit_DMA(&huart1,txBuffer,txBufferQueLen);
321 dmaTxActive = 1;
322 txBufferQueLen = 0;
323 }
324 } 319 }
325 #ifdef ENABLE_GPIO_V2 320 #ifdef ENABLE_GPIO_V2
326 if(huart == &huart6) 321 if(huart == &huart6)
327 { 322 {
328 UART6_TxCpltCallback(huart); 323 UART_HandleRxComplete(&Uart6Ctrl);
329 } 324 }
330 #endif 325 #endif
331 } 326 }
332 327
333 uint8_t isEndIndication(uint8_t index) 328 void UART_HandleTxComplete(sUartComCtrl* pUartCtrl)
329 {
330 pUartCtrl->dmaTxActive = 0;
331 UART_WriteData(pUartCtrl);
332 if(pUartCtrl->txBufferQueLen)
333 {
334 memcpy(pUartCtrl->pTxBuffer, pUartCtrl->pTxQue, pUartCtrl->txBufferQueLen);
335 HAL_UART_Transmit_DMA(pUartCtrl->pHandle,pUartCtrl->pTxBuffer,pUartCtrl->txBufferQueLen);
336 pUartCtrl->dmaTxActive = 1;
337 pUartCtrl->txBufferQueLen = 0;
338 }
339 }
340 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
341 {
342 if(huart == &huart1)
343 {
344 UART_HandleTxComplete(&Uart1Ctrl);
345 }
346 #ifdef ENABLE_GPIO_V2
347 if(huart == &huart6)
348 {
349 UART_HandleTxComplete(&Uart6Ctrl);
350 }
351 #endif
352 }
353
354 uint8_t UART_isEndIndication(sUartComCtrl* pCtrl, uint8_t index)
334 { 355 {
335 uint8_t ret = 0; 356 uint8_t ret = 0;
336 if(index % 2) 357 if(index % 2)
337 { 358 {
338 if(rxBuffer[index] == BUFFER_NODATA_HIGH) 359 if(pCtrl->pRxBuffer[index] == BUFFER_NODATA_HIGH)
339 { 360 {
340 ret = 1; 361 ret = 1;
341 } 362 }
342 } 363 }
343 else 364 else
344 { 365 {
345 if(rxBuffer[index] == BUFFER_NODATA_LOW) 366 if(pCtrl->pRxBuffer[index] == BUFFER_NODATA_LOW)
346 { 367 {
347 ret = 1; 368 ret = 1;
348 } 369 }
349 } 370 }
350 371
351 return ret; 372 return ret;
352 } 373 }
353 void UART_ReadData(uint8_t sensorType) 374 void UART_ReadData(uint8_t sensorType)
354 { 375 {
355 uint8_t localRX = rxReadIndex; 376 uint8_t localRX;
356 uint8_t futureIndex = rxReadIndex + 1; 377 uint8_t futureIndex;
357 uint8_t moreData = 0; 378 uint8_t moreData = 0;
358 379
380 sUartComCtrl* pUartCtrl;
381
382 if(sensorType == SENSOR_GNSS)
383 {
384 #ifdef ENABLE_GPIO_V2
385 pUartCtrl = &Uart6Ctrl;
386 #else
387 pUartCtrl = &Uart1Ctrl;
388 #endif
389 }
390 else
391 {
392 pUartCtrl = &Uart1Ctrl;
393 }
394 localRX = pUartCtrl->rxReadIndex;
395 futureIndex = pUartCtrl->rxReadIndex + 1;
359 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) 396 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
360 { 397 {
361 futureIndex = 0; 398 futureIndex = 0;
362 } 399 }
363 400
364 if((!isEndIndication(localRX)) || (!isEndIndication(futureIndex))) do 401 if(!UART_isEndIndication(pUartCtrl, futureIndex))
365 { 402 {
366 while((!isEndIndication(localRX)) || (moreData)) 403 moreData = 1;
404 }
405
406 //if((!isEndIndication(pUartCtrl, localRX)) || (!isEndIndication(pUartCtrl,futureIndex))) do
407 if((!UART_isEndIndication(pUartCtrl, localRX)) || (moreData))
408 do
409 {
410 while((!UART_isEndIndication(pUartCtrl, localRX)) || (moreData))
367 { 411 {
368 moreData = 0; 412 moreData = 0;
369 switch (sensorType) 413 switch (sensorType)
370 { 414 {
371 case SENSOR_MUX: 415 case SENSOR_MUX:
372 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]); 416 case SENSOR_DIGO2: uartO2_ProcessData(pUartCtrl->pRxBuffer[localRX]);
373 break; 417 break;
374 #ifdef ENABLE_CO2_SUPPORT 418 #ifdef ENABLE_CO2_SUPPORT
375 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]); 419 case SENSOR_CO2: uartCo2_ProcessData(pUartCtrl->pRxBuffer[localRX]);
376 break; 420 break;
377 #endif 421 #endif
378 #ifdef ENABLE_GNSS_SUPPORT 422 #if defined ENABLE_GNSS_SUPPORT || defined ENABLE_GPIO_V2
379 case SENSOR_GNSS: uartGnss_ProcessData(rxBuffer[localRX]); 423 case SENSOR_GNSS: uartGnss_ProcessData(pUartCtrl->pRxBuffer[localRX]);
380 break; 424 break;
381 #endif 425 #endif
382 #ifdef ENABLE_SENTINEL_MODE 426 #ifdef ENABLE_SENTINEL_MODE
383 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]); 427 case SENSOR_SENTINEL: uartSentinel_ProcessData(pUartCtrl->pRxBuffer[localRX]);
384 break; 428 break;
385 #endif 429 #endif
386 default: 430 default:
387 break; 431 break;
388 } 432 }
389 if(localRX % 2) 433 if(localRX % 2)
390 { 434 {
391 rxBuffer[localRX] = BUFFER_NODATA_HIGH; 435 pUartCtrl->pRxBuffer[localRX] = BUFFER_NODATA_HIGH;
392 } 436 }
393 else 437 else
394 { 438 {
395 rxBuffer[localRX] = BUFFER_NODATA_LOW; 439 pUartCtrl->pRxBuffer[localRX] = BUFFER_NODATA_LOW;
396 } 440 }
397 441
398 localRX++; 442 localRX++;
399 rxReadIndex++; 443 pUartCtrl->rxReadIndex++;
400 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) 444 if(pUartCtrl->rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
401 { 445 {
402 localRX = 0; 446 localRX = 0;
403 rxReadIndex = 0; 447 pUartCtrl->rxReadIndex = 0;
404 } 448 }
405 futureIndex++; 449 futureIndex++;
406 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) 450 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
407 { 451 {
408 futureIndex = 0; 452 futureIndex = 0;
409 } 453 }
410 } 454 }
411 if(!isEndIndication(futureIndex)) 455 if(!UART_isEndIndication(pUartCtrl, futureIndex))
412 { 456 {
413 moreData = 1; 457 moreData = 1;
414 } 458 }
415 } while(moreData); 459 } while(moreData);
416 } 460 }
417 461
418 void UART_WriteData(void) 462 void UART_WriteData(sUartComCtrl* pUartCtrl)
419 { 463 {
420 if(huart1.hdmatx->State == HAL_DMA_STATE_READY) 464 if(pUartCtrl->pHandle->hdmatx->State == HAL_DMA_STATE_READY)
421 { 465 {
422 huart1.gState = HAL_UART_STATE_READY; 466 pUartCtrl->pHandle->gState = HAL_UART_STATE_READY;
423 dmaTxActive = 0; 467 pUartCtrl->dmaTxActive = 0;
424 } 468 }
425 if(huart1.hdmarx->State == HAL_DMA_STATE_READY) 469 if(pUartCtrl->pHandle->hdmarx->State == HAL_DMA_STATE_READY)
426 { 470 {
427 huart1.RxState = HAL_UART_STATE_READY; 471 pUartCtrl->pHandle->RxState = HAL_UART_STATE_READY;
428 dmaRxActive = 0; 472 pUartCtrl->dmaRxActive = 0;
429 } 473 }
430 } 474 }
431 475
432 void UART_FlushRxBuffer(void) 476 void UART_FlushRxBuffer(void)
433 { 477 {
434 uint8_t futureIndex = rxReadIndex + 1; 478 uint8_t futureIndex = Uart1Ctrl.rxReadIndex + 1;
435 479
436 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) 480 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
437 { 481 {
438 futureIndex = 0; 482 futureIndex = 0;
439 } 483 }
440 while((rxBuffer[rxReadIndex] != BUFFER_NODATA_LOW) && (rxBuffer[futureIndex] != BUFFER_NODATA_HIGH)) 484 while((rxBuffer[Uart1Ctrl.rxReadIndex] != BUFFER_NODATA_LOW) && (rxBuffer[futureIndex] != BUFFER_NODATA_HIGH))
441 { 485 {
442 if(rxReadIndex % 2) 486 if(Uart1Ctrl.rxReadIndex % 2)
443 { 487 {
444 rxBuffer[rxReadIndex++] = BUFFER_NODATA_HIGH; 488 rxBuffer[Uart1Ctrl.rxReadIndex++] = BUFFER_NODATA_HIGH;
445 } 489 }
446 else 490 else
447 { 491 {
448 rxBuffer[rxReadIndex++] = BUFFER_NODATA_LOW; 492 rxBuffer[Uart1Ctrl.rxReadIndex++] = BUFFER_NODATA_LOW;
449 } 493 }
450 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) 494 if(Uart1Ctrl.rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
451 { 495 {
452 rxReadIndex = 0; 496 Uart1Ctrl.rxReadIndex = 0;
453 } 497 }
454 futureIndex++; 498 futureIndex++;
455 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) 499 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER)
456 { 500 {
457 futureIndex = 0; 501 futureIndex = 0;