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comparison BootLoader/Src/base_bootlader.c @ 5:e65d01b6a17e
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| author | JeanDo |
|---|---|
| date | Fri, 15 Dec 2017 01:45:20 +0100 |
| parents | |
| children | 97eafbcb81a9 |
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| 4:89a87ddc2e47 | 5:e65d01b6a17e |
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| 1 /** | |
| 2 ****************************************************************************** | |
| 3 * @copyright heinrichs weikamp | |
| 4 * @file base_bootlader.c | |
| 5 * @author heinrichs/weikamp, Christian Weikamp | |
| 6 * @date 26-February-2014 | |
| 7 * @version V1.0.4 | |
| 8 * @since 09-Jan-2016 | |
| 9 * @brief The beginning of it all. main() is part of this. | |
| 10 * + Do the inits for hardware | |
| 11 * + check for button press or update process reset trigger | |
| 12 * + Do the inits for sub-systems like menu, dive screen etc. | |
| 13 * + Start IRQs | |
| 14 * + Start MainTasks not in IRQs | |
| 15 * @bug | |
| 16 * @warning | |
| 17 @verbatim | |
| 18 | |
| 19 ============================================================================== | |
| 20 ##### bootloader specific ##### | |
| 21 ============================================================================== | |
| 22 | |
| 23 151130 chsw sleep on button3 | |
| 24 (MX_tell_reset_logik_alles_ok() + DataEX_call() in endlos loop) | |
| 25 | |
| 26 ============================================================================== | |
| 27 ##### bootloader specific ##### | |
| 28 ============================================================================== | |
| 29 | |
| 30 Bootloader info is set right here in this file. | |
| 31 The location is 0x0800A000 instead of 0x08050000 (firmware) | |
| 32 | |
| 33 on system reset (Menu Start Bootloader in firmware) the update process | |
| 34 is started automatically if no button is pressed | |
| 35 | |
| 36 if the right button is pressed the bootloader menu is started | |
| 37 | |
| 38 after update process (with update or empty) cleaning of EEPROM is started | |
| 39 afterwards the watchdog reset starts without activating the update process | |
| 40 | |
| 41 bluetooth chip is started in tComm on start of the mini bootloader firmware | |
| 42 | |
| 43 SMALLCPU_CSB_PIN must be re-set to 0 to communicate with small CPU / CPU2 / RTE | |
| 44 | |
| 45 for RealTerm to send file / firmware, Delays has to be increased to 0 | |
| 46 | |
| 47 RTE update / SPI1 with DMA gave IBUSERR, now it is working fine :-) 150828 | |
| 48 ============================================================================== | |
| 49 from standard firmware, parts might be invalid here: | |
| 50 ============================================================================== | |
| 51 ##### IRQs ##### | |
| 52 ============================================================================== | |
| 53 [..] The IRQs are very important and most functions should only run there. | |
| 54 | |
| 55 PreemptPriority are as follows | |
| 56 (#) 2 (low) sprintf _only_ here. Don't use in maintask or anywhere else. | |
| 57 Called by Buttons und Timer3 | |
| 58 Timer3 is 1/10 second | |
| 59 (#) 1 (mid) anything that should work while in IRQ2 like HalDelay(), VSYNC | |
| 60 and DMA2D Transfer Complete for housekeepingFrame(); | |
| 61 (#) 0 (high) _very very short_ interrupts like The HAL hardware part for | |
| 62 spi, uart, i2c. | |
| 63 | |
| 64 SubPriority within PreemptPriority give the order to execute. | |
| 65 Introduced 30.Oct.14 as it used by several HAL examples. | |
| 66 Three levelAmbients are available (2 low,1 mid,0 high) | |
| 67 | |
| 68 The STM32F4 has 4bits for IRQ levelAmbients, divided 2/2 in this code | |
| 69 with the NVIC_PRIORITYGROUP_2 setting. | |
| 70 | |
| 71 ============================================================================== | |
| 72 ##### MainTask ##### | |
| 73 ============================================================================== | |
| 74 [..] For everthing slow without importance to be 'in time'. | |
| 75 Like VPM and Buehlmann. | |
| 76 No sprintf and probably no GFX_SetFramesTopBottom() stuff neither. | |
| 77 If sprintf is called while sprintf is executed it blows up everything. | |
| 78 | |
| 79 ============================================================================== | |
| 80 ##### Frames / the external SDRAM ##### | |
| 81 ============================================================================== | |
| 82 [..] The SDRAM is handled by getFrame() and releaseFrame(). | |
| 83 Each frame with 800*480*2 Bytes. | |
| 84 Be carefull to release every frame | |
| 85 otherwise there will be a memory leakage over time. | |
| 86 housekeepingFrame() in the MainTask takes care of cleaning the frames. | |
| 87 All frames are filled with 0x00. This will be transparent with color of | |
| 88 CLUT_Font020 (is CLUT 0) if the alpha is set for a 16bit pair. | |
| 89 housekeepingFrame() delays the cleaning of frames still used as screen | |
| 90 buffer to prevent flickering. | |
| 91 | |
| 92 ============================================================================== | |
| 93 ##### Display ##### | |
| 94 ============================================================================== | |
| 95 [..] There is a Top layer, Bottom layer and background color. | |
| 96 All are perfectly alpha-blended by hardware. | |
| 97 | |
| 98 (#) top layer has 800x480 option function calls only | |
| 99 as it is not used for cursors here | |
| 100 (#) bottom layer has free size and start option to be used | |
| 101 for cursors (or sprites in the future ;-) | |
| 102 (#) background only black in the moment. | |
| 103 ToDo: Could be anything else for warnings etc. | |
| 104 if needed | |
| 105 | |
| 106 [..] Frame updates, switching and cursors is done with | |
| 107 | |
| 108 (#) GFX_SetFramesTopBottom() and the subset | |
| 109 GFX_SetFrameTop() + GFX_SetFrameBottom() | |
| 110 Those do not change anything on the display but give commands to.. | |
| 111 (#) GFX_change_LTDC() The only place that changes the pointer. | |
| 112 This prevents erratic behaviour if several changes | |
| 113 are made within one refresh rate of the screen. | |
| 114 Is called in IRQ by PD4 and HAL_GPIO_EXTI_IRQHandler | |
| 115 from VSYNC signal. | |
| 116 | |
| 117 [..] Content | |
| 118 | |
| 119 (#) Colors by LookupTable only. This could be modified by | |
| 120 system settings in the future. (gfx_color.h/.c) | |
| 121 | |
| 122 (#) Text by text_multilinguage.h/.c with one char | |
| 123 necessary only starting from '\x80' | |
| 124 with automatic language switch by | |
| 125 selected_language in SSettings | |
| 126 see openEdit_Language() in tMenuEditSystem.c | |
| 127 Therefore there are differnent functions | |
| 128 for example: | |
| 129 write_label_fix() for single char multilanguage | |
| 130 write_label_var() for strings that could include | |
| 131 multilanguage as well | |
| 132 see GFX_write_string() to get an overview of the controls | |
| 133 as well as the command list in gfx_engine.h | |
| 134 There is no clear before writing, text overlay is always on. | |
| 135 Many options to have LargeFont.SmallFont for numbers etc. | |
| 136 | |
| 137 ============================================================================== | |
| 138 ##### Update, DualBoot and build-in FLASH memory usage ##### | |
| 139 ============================================================================== | |
| 140 [..] Boot0 pin, Boot1/PB2 pin and BFB2 software bit control the behaviour. | |
| 141 PB2 should be tied to GND. | |
| 142 Boot0 == VDD -> bootloader on start, otherwise boot from Bank1 or Bank2 | |
| 143 depending on BFB2. | |
| 144 Bank2 contains the Fonts and should contain a proper test code in future | |
| 145 Bank1 is the main code (Bank1 is 1 MB too, usage as of Oct. 14 is 200 KB) | |
| 146 [..] Bootloader should be either UART or USB (on FS pins _only_) | |
| 147 USB HS to FS like on the Eval board does not work. | |
| 148 [..] Bootloader for the smaller CPU2 is implemented via the SPI used for DMA copy. | |
| 149 | |
| 150 ============================================================================== | |
| 151 ##### Connection to CPU2 (STM32F411 as of Oct.14 ##### | |
| 152 ============================================================================== | |
| 153 [..] Connected via SPI and DMA for every purpose. | |
| 154 two entire arrays are transfered for data security reasons | |
| 155 with respect to master (STM32F429) might interrupt internal | |
| 156 data copy in CPU2 (like hi byte, low byte, etc.). | |
| 157 [..] The entire life data is calculated in CPU2. Like tissues, CNS,... | |
| 158 Therefore the main unit is _not_ necessarily a Real Time system. | |
| 159 Simulation on the main unit can be executed without disrupting life data. | |
| 160 [..] SPI is triggered and timed by calling DataEX_call() in data_exchange_main.c | |
| 161 DataEX_copy_to_LifeData() does the transfer from buffer to variables used. | |
| 162 | |
| 163 ============================================================================== | |
| 164 ##### Menu, MenuEdit, Info ##### | |
| 165 ============================================================================== | |
| 166 [..] tMenu.c, tMenuEdit.c and tInfo.c is the system used. | |
| 167 logbook is part of Info not Menu. | |
| 168 The Info Menu is accessed by button 'Back' | |
| 169 The regular Menu is accessed by button 'Enter' | |
| 170 [..] Menu content is kept in frame memory for fast access. | |
| 171 There is no need to build pages if the 'Enter' button is pressed. | |
| 172 This is in contrast to MenuEdit pages. | |
| 173 [..] Button control for new pages (and pages in general) have to implemented | |
| 174 in tMenu.c, tMenuEdit.c or tInfo.c | |
| 175 | |
| 176 [..] ToDo (Oct. 14) Timeout for menus via Timer3 / IRQ 2 | |
| 177 | |
| 178 ============================================================================== | |
| 179 ##### specials ##### | |
| 180 ============================================================================== | |
| 181 [..] There was code for vector graphics from great demos | |
| 182 (peridiummmm and jupiter) that can be fitted again | |
| 183 | |
| 184 @endverbatim | |
| 185 ****************************************************************************** | |
| 186 * @attention | |
| 187 * | |
| 188 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> | |
| 189 * | |
| 190 ****************************************************************************** | |
| 191 */ | |
| 192 | |
| 193 /* Includes ------------------------------------------------------------------*/ | |
| 194 #include "stdio.h" | |
| 195 #include <string.h> // for memcopy | |
| 196 | |
| 197 #include "stm32f4xx_hal.h" | |
| 198 #include "stm32f4xx_hal_rcc.h" | |
| 199 #include "stm32f4xx_hal_flash_ex.h" | |
| 200 #include "stm32f4xx_hal_wwdg.h" | |
| 201 | |
| 202 #include "ostc.h" | |
| 203 #include "base_bootloader.h" | |
| 204 #include "display.h" | |
| 205 #include "gfx_engine.h" | |
| 206 #include "externLogbookFlash.h" | |
| 207 #include "tComm.h" | |
| 208 #include "tStructure.h" | |
| 209 #include "tInfoBootloader.h" | |
| 210 | |
| 211 #include "firmwareEraseProgram.h" | |
| 212 #include "firmwareJumpToApplication.h" | |
| 213 | |
| 214 #include "data_exchange_main.h" | |
| 215 | |
| 216 /** @addtogroup OSTC 4 | |
| 217 * @{ | |
| 218 */ | |
| 219 | |
| 220 /* Private typedef -----------------------------------------------------------*/ | |
| 221 /* Private define ------------------------------------------------------------*/ | |
| 222 #define BUFFER_SIZE ((uint32_t)0x00177000) | |
| 223 #define WRITE_READ_ADDR ((uint32_t)0x0000) | |
| 224 #define REFRESH_COUNT ((uint32_t)0x0569) /* SDRAM refresh counter (90Mhz SD clock) */ | |
| 225 | |
| 226 /* Private macro -------------------------------------------------------------*/ | |
| 227 /* Private variables ---------------------------------------------------------*/ | |
| 228 uint8_t returnFromCommCleanUpRequest = 0; | |
| 229 | |
| 230 const SFirmwareData FirmwareData __attribute__((at(0x08000000 + 0x0000A000))) = { | |
| 231 .firmwareVersion16to32bit.ub.first = 1, | |
| 232 .firmwareVersion16to32bit.ub.second = 0, | |
| 233 .firmwareVersion16to32bit.ub.third = 1, | |
| 234 .firmwareVersion16to32bit.ub.betaFlag = 1, | |
| 235 | |
| 236 /* 4 bytes with trailing 0 */ | |
| 237 .signature = "cw", | |
| 238 | |
| 239 .release_year = 16, | |
| 240 .release_month = 4, | |
| 241 .release_day = 8, | |
| 242 .release_sub = 0, | |
| 243 | |
| 244 /* max 48 with trailing 0 */ | |
| 245 //release_info ="12345678901234567890123456789012345678901" | |
| 246 .release_info ="tComm with all", | |
| 247 | |
| 248 /* for safety reasons and coming functions*/ | |
| 249 .dummy[0] = 0, | |
| 250 .dummy[1] = 0, | |
| 251 .dummy[2] = 0xEE, /* the magic byte */ | |
| 252 .dummy[3] = 0xFF | |
| 253 }; | |
| 254 | |
| 255 | |
| 256 const SHardwareData HardwareData __attribute__((at(HARDWAREDATA_ADDRESS))) = { | |
| 257 | |
| 258 // first 52 bytes | |
| 259 .primarySerial = 0xFFFF, | |
| 260 .primaryLicence = 0xFF, | |
| 261 .revision8bit = 0xFF, | |
| 262 .production_year = 0xFF, | |
| 263 .production_month = 0xFF, | |
| 264 .production_day = 0xFF, | |
| 265 .production_bluetooth_name_set = 0xFF, | |
| 266 | |
| 267 .production_info = { | |
| 268 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, | |
| 269 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, | |
| 270 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, | |
| 271 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}, | |
| 272 | |
| 273 // other 12 bytes (64 in total) | |
| 274 .secondarySerial = 0xFFFF, | |
| 275 .secondaryLicence = 0xFF, | |
| 276 .secondaryReason8bit = 0xFF, | |
| 277 .secondary_year = 0xFF, | |
| 278 .secondary_month = 0xFF, | |
| 279 .secondary_day = 0xFF, | |
| 280 .secondary_bluetooth_name_set = 0xFF, | |
| 281 .secondary_info = {0xFF,0xFF,0xFF,0xFF} | |
| 282 }; | |
| 283 | |
| 284 | |
| 285 RTC_HandleTypeDef RtcHandle; | |
| 286 TIM_HandleTypeDef TimHandle; /* used in stm32f4xx_it.c too */ | |
| 287 TIM_HandleTypeDef TimBacklightHandle; /* used in stm32f4xx_it.c too */ | |
| 288 | |
| 289 uint32_t time_before; | |
| 290 uint32_t time_between; | |
| 291 uint32_t time_after; | |
| 292 | |
| 293 /* SDRAM handler declaration */ | |
| 294 SDRAM_HandleTypeDef hsdram; | |
| 295 FMC_SDRAM_TimingTypeDef SDRAM_Timing; | |
| 296 FMC_SDRAM_CommandTypeDef command; | |
| 297 | |
| 298 FLASH_OBProgramInitTypeDef OBInit; | |
| 299 FLASH_AdvOBProgramInitTypeDef AdvOBInit; | |
| 300 | |
| 301 | |
| 302 /* Private variables with external access ------------------------------------*/ | |
| 303 | |
| 304 uint32_t globalStateID = 0; | |
| 305 uint8_t globalModeID = SURFMODE; | |
| 306 uint32_t time_without_button_pressed_deciseconds = 0; | |
| 307 uint8_t bootToBootloader = 0; | |
| 308 | |
| 309 /* Private function prototypes -----------------------------------------------*/ | |
| 310 | |
| 311 //static void LCD_ToggleFramebuffer(GFX_DrawCfgTypeDef *hconfig); | |
| 312 //static void LCD_Config(GFX_DrawCfgTypeDef *hconfig); | |
| 313 static void SystemClock_Config(void); | |
| 314 static void Error_Handler(void); | |
| 315 | |
| 316 static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command); | |
| 317 static void SDRAM_Config(void); | |
| 318 //static void DualBoot(void); | |
| 319 static void EXTILine_Buttons_Config(void); | |
| 320 //static void RTC_init(void); | |
| 321 static void TIM_init(void); | |
| 322 static void TIM_BACKLIGHT_init(void); | |
| 323 //static void TIM_BACKLIGHT_adjust(void); | |
| 324 static void gotoSleep(void); | |
| 325 uint8_t checkResetForFirmwareUpdate(void); | |
| 326 void DeleteResetToFirmwareUpdateRegister(void); | |
| 327 void reset_to_firmware_using_Watchdog(void); | |
| 328 void reset_to_update_using_system_reset(void); | |
| 329 | |
| 330 //static void DualBootToBootloader(void); | |
| 331 | |
| 332 /* ITM Trace-------- ---------------------------------------------------------*/ | |
| 333 /* | |
| 334 #define ITM_Port8(n) (*((volatile unsigned char *)(0xE0000000+4*n))) | |
| 335 #define ITM_Port16(n) (*((volatile unsigned short*)(0xE0000000+4*n))) | |
| 336 #define ITM_Port32(n) (*((volatile unsigned long *)(0xE0000000+4*n))) | |
| 337 | |
| 338 #define DEMCR (*((volatile unsigned long *)(0xE000EDFC))) | |
| 339 #define TRCENA 0x01000000 | |
| 340 | |
| 341 struct __FILE { int handle; }; | |
| 342 FILE __stdout; | |
| 343 FILE __stdin; | |
| 344 | |
| 345 int fputc(int ch, FILE *f) { | |
| 346 if (DEMCR & TRCENA) { | |
| 347 while (ITM_Port32(0) == 0); | |
| 348 ITM_Port8(0) = ch; | |
| 349 } | |
| 350 return(ch); | |
| 351 } | |
| 352 */ | |
| 353 | |
| 354 /* Private functions ---------------------------------------------------------*/ | |
| 355 | |
| 356 /** | |
| 357 * @brief Main program | |
| 358 * @param None | |
| 359 * @retval None | |
| 360 */ | |
| 361 | |
| 362 void GPIO_test_I2C_lines(void) | |
| 363 { | |
| 364 GPIO_InitTypeDef GPIO_InitStructure; | |
| 365 __GPIOA_CLK_ENABLE(); | |
| 366 __GPIOG_CLK_ENABLE(); | |
| 367 GPIO_InitStructure.Pin = GPIO_PIN_7; | |
| 368 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP; | |
| 369 GPIO_InitStructure.Pull = GPIO_PULLUP; | |
| 370 GPIO_InitStructure.Speed = GPIO_SPEED_LOW; | |
| 371 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure); | |
| 372 GPIO_InitStructure.Pin = GPIO_PIN_3; | |
| 373 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); | |
| 374 | |
| 375 while(1) | |
| 376 { | |
| 377 HAL_GPIO_WritePin(GPIOG,GPIO_PIN_7,GPIO_PIN_SET); | |
| 378 HAL_GPIO_WritePin(GPIOA,GPIO_PIN_3,GPIO_PIN_RESET); | |
| 379 HAL_Delay(10); | |
| 380 HAL_GPIO_WritePin(GPIOG,GPIO_PIN_7,GPIO_PIN_RESET); | |
| 381 HAL_GPIO_WritePin(GPIOA,GPIO_PIN_3,GPIO_PIN_SET); | |
| 382 HAL_Delay(10); | |
| 383 } | |
| 384 } | |
| 385 | |
| 386 | |
| 387 int main(void) | |
| 388 { | |
| 389 | |
| 390 /* | |
| 391 HAL_Init(); | |
| 392 SystemClock_Config(); | |
| 393 GPIO_test_I2C_lines(); | |
| 394 */ | |
| 395 uint32_t pLayerInvisible; | |
| 396 uint32_t firmware_load_result; | |
| 397 uint8_t magicbyte = 0; | |
| 398 uint8_t callForUpdate; | |
| 399 uint8_t status = 0; | |
| 400 char textVersion[32]; | |
| 401 uint8_t ptr; | |
| 402 uint32_t pOffset; | |
| 403 | |
| 404 set_globalState(StBoot0); | |
| 405 | |
| 406 HAL_Init(); | |
| 407 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_2); | |
| 408 | |
| 409 /* feedback for the user | |
| 410 * aber sehr unsch�n beim Warmstart | |
| 411 * da das letzte Bild noch lange nachleuchtet */ | |
| 412 // MX_GPIO_Backlight_max_static_only_Init(); | |
| 413 | |
| 414 | |
| 415 /* button press is only 40 to 50 us low */ | |
| 416 MX_GPIO_One_Button_only_Init(); | |
| 417 | |
| 418 uint32_t i = 500000; | |
| 419 | |
| 420 callForUpdate = __HAL_RCC_GET_FLAG(RCC_FLAG_SFTRST); | |
| 421 | |
| 422 if(callForUpdate) | |
| 423 { | |
| 424 i = 0; | |
| 425 } | |
| 426 else | |
| 427 if( (firmware_MainCodeIsProgammed() == 0) | |
| 428 || (hardwareDataGetPointer()->primarySerial == 0xFFFF) | |
| 429 || (hardwareDataGetPointer()->production_bluetooth_name_set == 0xFF)) | |
| 430 { | |
| 431 i = 1; | |
| 432 } | |
| 433 else | |
| 434 { | |
| 435 while(MX_GPIO_Read_The_One_Button() && i) | |
| 436 { | |
| 437 i--; | |
| 438 __NOP(); | |
| 439 } | |
| 440 if(i) | |
| 441 { | |
| 442 i = 200000; | |
| 443 while(!MX_GPIO_Read_The_One_Button() && i) | |
| 444 { | |
| 445 i--; | |
| 446 __NOP(); | |
| 447 } | |
| 448 if(i) | |
| 449 { | |
| 450 i = 200000; | |
| 451 while(MX_GPIO_Read_The_One_Button() && i) | |
| 452 { | |
| 453 i--; | |
| 454 __NOP(); | |
| 455 } | |
| 456 if(i) | |
| 457 { | |
| 458 i = 200000; | |
| 459 while(!MX_GPIO_Read_The_One_Button() && i) | |
| 460 { | |
| 461 i--; | |
| 462 __NOP(); | |
| 463 } | |
| 464 if(i) | |
| 465 { | |
| 466 i = 200000; | |
| 467 while(MX_GPIO_Read_The_One_Button() && i) | |
| 468 { | |
| 469 i--; | |
| 470 __NOP(); | |
| 471 } | |
| 472 } | |
| 473 } | |
| 474 } | |
| 475 } | |
| 476 } | |
| 477 | |
| 478 if((i == 0) && (callForUpdate == 0)) | |
| 479 firmware_JumpTo_Application(); | |
| 480 | |
| 481 SystemClock_Config(); | |
| 482 | |
| 483 MX_GPIO_Init(); | |
| 484 MX_Bluetooth_PowerOn(); | |
| 485 MX_SPI_Init(); | |
| 486 SDRAM_Config(); | |
| 487 HAL_Delay(100); | |
| 488 | |
| 489 GFX_init1_no_DMA(&pLayerInvisible, 2); | |
| 490 | |
| 491 TIM_BACKLIGHT_init(); | |
| 492 | |
| 493 // ----------------------------- | |
| 494 | |
| 495 display_power_on__1_of_2__pre_RGB(); | |
| 496 GFX_LTDC_Init(); | |
| 497 GFX_LTDC_LayerDefaultInit(TOP_LAYER, pLayerInvisible); | |
| 498 GFX_LTDC_LayerDefaultInit(BACKGRD_LAYER, pLayerInvisible); | |
| 499 GFX_SetFramesTopBottom(pLayerInvisible,pLayerInvisible,480); | |
| 500 HAL_Delay(20); | |
| 501 display_power_on__2_of_2__post_RGB(); | |
| 502 | |
| 503 // ----------------------------- | |
| 504 GFX_change_LTDC(); | |
| 505 GFX_hwBackgroundOn(); | |
| 506 GFX_change_LTDC(); | |
| 507 // ----------------------------- | |
| 508 tInfoBootloader_init(); | |
| 509 // ----------------------------- | |
| 510 if(i == 0) | |
| 511 { | |
| 512 tInfo_newpage("load firmware data"); | |
| 513 uint8_t* pBuffer = (uint8_t*)((uint32_t)0xD0000000); /* blocked via GFX_init1_no_DMA */ | |
| 514 firmware_load_result = ext_flash_read_firmware(pBuffer,768000, &magicbyte); | |
| 515 | |
| 516 if((firmware_load_result > 0) && (firmware_load_result < 768000) && (magicbyte == 0xEE)) | |
| 517 { | |
| 518 ptr = ext_flash_read_firmware_version(textVersion); | |
| 519 textVersion[ptr++] = 'f'; | |
| 520 textVersion[ptr++] = 'o'; | |
| 521 textVersion[ptr++] = 'u'; | |
| 522 textVersion[ptr++] = 'n'; | |
| 523 textVersion[ptr++] = 'd'; | |
| 524 textVersion[ptr] = 0; | |
| 525 | |
| 526 tInfo_newpage(textVersion); | |
| 527 tInfo_write("erase flash"); | |
| 528 status = firmware_eraseFlashMemory(); | |
| 529 if(status != HAL_OK) | |
| 530 { | |
| 531 tInfo_newpage("error. try again."); | |
| 532 status = firmware_eraseFlashMemory(); | |
| 533 if(status != HAL_OK) | |
| 534 { | |
| 535 tInfo_newpage("error. skip update."); | |
| 536 HAL_Delay(1000); | |
| 537 } | |
| 538 } | |
| 539 if(status == HAL_OK) | |
| 540 { | |
| 541 tInfo_write("programm flash"); | |
| 542 status = firmware_programFlashMemory(pBuffer,firmware_load_result); | |
| 543 if(status != HAL_OK) | |
| 544 { | |
| 545 tInfo_newpage("error. try again."); | |
| 546 status = firmware_programFlashMemory(pBuffer,firmware_load_result); | |
| 547 if(status != HAL_OK) | |
| 548 { | |
| 549 tInfo_newpage("error. skip update."); | |
| 550 HAL_Delay(1000); | |
| 551 } | |
| 552 } | |
| 553 } | |
| 554 } | |
| 555 } | |
| 556 | |
| 557 /* here comes the variable upper firmware loader */ | |
| 558 if((i == 0) && (status == HAL_OK)) | |
| 559 { | |
| 560 tInfo_newpage("load firmware2 data"); | |
| 561 uint8_t* pBuffer = (uint8_t*)((uint32_t)0xD0000000); /* blocked via GFX_init1_no_DMA */ | |
| 562 firmware_load_result = ext_flash_read_firmware2(&pOffset, pBuffer,768000*2,0,0); | |
| 563 | |
| 564 if((firmware_load_result > 0) && (firmware_load_result + pOffset <= 1024000)) | |
| 565 { | |
| 566 ptr = 0; | |
| 567 ptr += gfx_number_to_string(7,0,&textVersion[ptr],firmware_load_result); | |
| 568 textVersion[ptr++] = ' '; | |
| 569 textVersion[ptr++] = 'b'; | |
| 570 textVersion[ptr++] = 'y'; | |
| 571 textVersion[ptr++] = 't'; | |
| 572 textVersion[ptr++] = 'e'; | |
| 573 textVersion[ptr++] = 's'; | |
| 574 textVersion[ptr++] = ' '; | |
| 575 textVersion[ptr++] = 'w'; | |
| 576 textVersion[ptr++] = 'i'; | |
| 577 textVersion[ptr++] = 't'; | |
| 578 textVersion[ptr++] = 'h'; | |
| 579 textVersion[ptr++] = ' '; | |
| 580 ptr += gfx_number_to_string(7,0,&textVersion[ptr],pOffset); | |
| 581 textVersion[ptr++] = ' '; | |
| 582 textVersion[ptr++] = 'o'; | |
| 583 textVersion[ptr++] = 'f'; | |
| 584 textVersion[ptr++] = 'f'; | |
| 585 textVersion[ptr++] = 's'; | |
| 586 textVersion[ptr++] = 'e'; | |
| 587 textVersion[ptr++] = 't'; | |
| 588 textVersion[ptr] = 0; | |
| 589 tInfo_newpage(textVersion); | |
| 590 | |
| 591 ptr = 0; | |
| 592 textVersion[ptr++] = 'f'; | |
| 593 textVersion[ptr++] = 'o'; | |
| 594 textVersion[ptr++] = 'u'; | |
| 595 textVersion[ptr++] = 'n'; | |
| 596 textVersion[ptr++] = 'd'; | |
| 597 textVersion[ptr] = 0; | |
| 598 | |
| 599 tInfo_write(textVersion); | |
| 600 tInfo_write("erase flash"); | |
| 601 status = firmware2_variable_upperpart_eraseFlashMemory(firmware_load_result,pOffset); | |
| 602 if(status != HAL_OK) | |
| 603 { | |
| 604 tInfo_newpage("error. try again."); | |
| 605 status = firmware2_variable_upperpart_eraseFlashMemory(firmware_load_result,pOffset); | |
| 606 if(status != HAL_OK) | |
| 607 { | |
| 608 tInfo_newpage("error. skip update."); | |
| 609 HAL_Delay(1000); | |
| 610 } | |
| 611 } | |
| 612 if(status == HAL_OK) | |
| 613 { | |
| 614 tInfo_write("programm flash"); | |
| 615 status = firmware2_variable_upperpart_programFlashMemory(firmware_load_result,pOffset,pBuffer,firmware_load_result,0); | |
| 616 if(status != HAL_OK) | |
| 617 { | |
| 618 tInfo_newpage("error. try again."); | |
| 619 status = firmware2_variable_upperpart_programFlashMemory(firmware_load_result,pOffset,pBuffer,firmware_load_result,0); | |
| 620 if(status != HAL_OK) | |
| 621 { | |
| 622 tInfo_newpage("error. skip update."); | |
| 623 HAL_Delay(1000); | |
| 624 } | |
| 625 } | |
| 626 } | |
| 627 } | |
| 628 } | |
| 629 | |
| 630 if((i == 0) && (status == HAL_OK)) | |
| 631 { | |
| 632 tInfo_newpage("Done."); | |
| 633 tInfo_write("Cleaning."); | |
| 634 ext_flash_erase_firmware_if_not_empty(); | |
| 635 ext_flash_erase_firmware2_if_not_empty(); | |
| 636 tInfo_write("Reset device."); | |
| 637 reset_to_firmware_using_Watchdog(); | |
| 638 } | |
| 639 | |
| 640 ptr = 0; | |
| 641 textVersion[ptr++] = '\021'; | |
| 642 textVersion[ptr++] = 's'; | |
| 643 textVersion[ptr++] = 'e'; | |
| 644 textVersion[ptr++] = 'r'; | |
| 645 textVersion[ptr++] = 'i'; | |
| 646 textVersion[ptr++] = 'a'; | |
| 647 textVersion[ptr++] = 'l'; | |
| 648 textVersion[ptr++] = ' '; | |
| 649 if(HardwareData.primarySerial == 0xFFFF) | |
| 650 { | |
| 651 textVersion[ptr++] = 'n'; | |
| 652 textVersion[ptr++] = 'o'; | |
| 653 textVersion[ptr++] = 't'; | |
| 654 textVersion[ptr++] = ' '; | |
| 655 textVersion[ptr++] = 's'; | |
| 656 textVersion[ptr++] = 'e'; | |
| 657 textVersion[ptr++] = 't'; | |
| 658 } | |
| 659 else if(HardwareData.secondarySerial == 0xFFFF) | |
| 660 { | |
| 661 textVersion[ptr++] = '#'; | |
| 662 ptr += gfx_number_to_string(5,1,&textVersion[ptr],HardwareData.primarySerial); | |
| 663 } | |
| 664 else | |
| 665 { | |
| 666 textVersion[ptr++] = '#'; | |
| 667 ptr += gfx_number_to_string(5,1,&textVersion[ptr],HardwareData.secondarySerial); | |
| 668 textVersion[ptr++] = ' '; | |
| 669 textVersion[ptr++] = '('; | |
| 670 ptr += gfx_number_to_string(5,1,&textVersion[ptr],HardwareData.primarySerial); | |
| 671 textVersion[ptr++] = ')'; | |
| 672 } | |
| 673 textVersion[ptr++] = '\020'; | |
| 674 textVersion[ptr] = 0; | |
| 675 | |
| 676 tInfo_button_text("Exit","","Sleep"); | |
| 677 tInfo_newpage("Bootloader 160602"); | |
| 678 tInfo_write("start bluetooth"); | |
| 679 tInfo_write(""); | |
| 680 tInfo_write(textVersion); | |
| 681 tInfo_write(""); | |
| 682 | |
| 683 TIM_init(); | |
| 684 MX_UART_Init(); | |
| 685 MX_Bluetooth_PowerOn(); | |
| 686 tComm_Set_Bluetooth_Name(0); | |
| 687 | |
| 688 tComm_init(); | |
| 689 set_globalState_Base(); | |
| 690 | |
| 691 GFX_start_VSYNC_IRQ(); | |
| 692 | |
| 693 EXTILine_Buttons_Config(); | |
| 694 /* | |
| 695 uint8_t* pBuffer1 = (uint8_t*)getFrame(20); | |
| 696 firmware_load_result = ext_flash_read_firmware(pBuffer1,768000); | |
| 697 | |
| 698 if((firmware_load_result > 0) && (firmware_load_result < 768000)) | |
| 699 { | |
| 700 firmware_eraseFlashMemory(); | |
| 701 firmware_programFlashMemory(pBuffer1,firmware_load_result); | |
| 702 // not for testing | |
| 703 //ext_flash_erase_firmware_if_not_empty(); | |
| 704 reset_to_firmware_using_Watchdog(); | |
| 705 } | |
| 706 */ | |
| 707 while(1) | |
| 708 { | |
| 709 // if(bootToBootloader) | |
| 710 // DualBootToBootloader(); | |
| 711 | |
| 712 if(bootToBootloader) | |
| 713 reset_to_update_using_system_reset(); | |
| 714 | |
| 715 tComm_control(); // will stop while loop if tComm Mode started until exit from UART | |
| 716 }; | |
| 717 } | |
| 718 | |
| 719 | |
| 720 void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) | |
| 721 { | |
| 722 | |
| 723 SStateList status; | |
| 724 | |
| 725 get_globalStateList(&status); | |
| 726 | |
| 727 switch(status.base) | |
| 728 { | |
| 729 default: | |
| 730 // TIM_BACKLIGHT_adjust(); | |
| 731 break; | |
| 732 } | |
| 733 | |
| 734 if(returnFromCommCleanUpRequest) | |
| 735 { | |
| 736 tComm_exit(); | |
| 737 returnFromCommCleanUpRequest = 0; | |
| 738 GFX_hwBackgroundOn(); | |
| 739 tInfo_button_text("Exit","","Sleep"); | |
| 740 tInfo_newpage("bluetooth disonnected"); | |
| 741 tInfo_write(""); | |
| 742 tInfo_write(""); | |
| 743 tInfo_write(""); | |
| 744 tInfo_write(""); | |
| 745 } | |
| 746 | |
| 747 get_globalStateList(&status); | |
| 748 | |
| 749 switch(status.base) | |
| 750 { | |
| 751 case BaseComm: | |
| 752 if(get_globalState() == StUART_STANDARD) | |
| 753 tComm_refresh(); | |
| 754 break; | |
| 755 default: | |
| 756 break; | |
| 757 } | |
| 758 } | |
| 759 | |
| 760 void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) | |
| 761 { | |
| 762 uint8_t action; | |
| 763 SStateList status; | |
| 764 static uint8_t counterToPreventSleep = 0; | |
| 765 if(GPIO_Pin == VSYNC_IRQ_PIN) // rechts, unten | |
| 766 { | |
| 767 GFX_change_LTDC(); | |
| 768 housekeepingFrame(); | |
| 769 if(counterToPreventSleep < 250) | |
| 770 counterToPreventSleep++; | |
| 771 else | |
| 772 if(counterToPreventSleep != 255) | |
| 773 { | |
| 774 counterToPreventSleep = 255; | |
| 775 } | |
| 776 | |
| 777 return; | |
| 778 } | |
| 779 | |
| 780 time_without_button_pressed_deciseconds = 0; | |
| 781 | |
| 782 if(GFX_logoStatus() != 0) | |
| 783 return; | |
| 784 | |
| 785 if(GPIO_Pin == BUTTON_BACK_PIN) // links | |
| 786 action = ACTION_BUTTON_BACK; | |
| 787 else | |
| 788 if(GPIO_Pin == BUTTON_ENTER_PIN) // mitte | |
| 789 action = ACTION_BUTTON_ENTER; | |
| 790 else | |
| 791 if(GPIO_Pin == BUTTON_NEXT_PIN) // rechts | |
| 792 action = ACTION_BUTTON_NEXT; | |
| 793 #ifdef BUTTON_CUSTOM_PIN | |
| 794 else | |
| 795 if(GPIO_Pin == BUTTON_CUSTOM_PIN) // extra | |
| 796 action = ACTION_BUTTON_CUSTOM; | |
| 797 #endif | |
| 798 else | |
| 799 action = 0; | |
| 800 get_globalStateList(&status); | |
| 801 | |
| 802 switch(status.base) | |
| 803 { | |
| 804 case BaseComm: | |
| 805 if(action == ACTION_BUTTON_BACK) | |
| 806 { | |
| 807 reset_to_firmware_using_Watchdog(); | |
| 808 } | |
| 809 break; | |
| 810 | |
| 811 default: | |
| 812 if((action == ACTION_BUTTON_NEXT) && (counterToPreventSleep == 255) && (get_globalState() == StS)) | |
| 813 { | |
| 814 while(1) | |
| 815 { | |
| 816 MX_tell_reset_logik_alles_ok(); | |
| 817 DataEX_call(); | |
| 818 HAL_Delay(100); | |
| 819 } | |
| 820 } | |
| 821 else | |
| 822 if(action == ACTION_BUTTON_BACK) | |
| 823 { | |
| 824 reset_to_firmware_using_Watchdog(); | |
| 825 } | |
| 826 else | |
| 827 if(action == ACTION_BUTTON_CUSTOM) | |
| 828 { | |
| 829 if(get_globalState() == StS) | |
| 830 gotoSleep(); | |
| 831 } | |
| 832 else | |
| 833 if(action == ACTION_BUTTON_ENTER) | |
| 834 { | |
| 835 reset_to_update_using_system_reset(); | |
| 836 } | |
| 837 break; | |
| 838 } | |
| 839 } | |
| 840 | |
| 841 | |
| 842 void gotoSleep(void) | |
| 843 { | |
| 844 ext_flash_erase_firmware_if_not_empty(); | |
| 845 set_globalState(StStop); | |
| 846 } | |
| 847 | |
| 848 // ----------------------------- | |
| 849 | |
| 850 | |
| 851 void MainBootLoaderInit(void) | |
| 852 { | |
| 853 void (*SysMemBootJump)(void); | |
| 854 SysMemBootJump=(void (*)(void)) (*((uint32_t *) 0x1fff0004)); | |
| 855 | |
| 856 // DMA, SPI, UART, TIM, ExtIRQ, graphics DMA, LTDC | |
| 857 | |
| 858 HAL_RCC_DeInit(); | |
| 859 SysTick->CTRL = 0; | |
| 860 SysTick->LOAD = 0; | |
| 861 SysTick->VAL = 0; | |
| 862 | |
| 863 __set_PRIMASK(1); | |
| 864 | |
| 865 __set_MSP(0x20002318); | |
| 866 SysMemBootJump(); | |
| 867 } | |
| 868 | |
| 869 uint32_t get_globalState(void) | |
| 870 { | |
| 871 return globalStateID; | |
| 872 } | |
| 873 | |
| 874 void get_globalStateList(SStateList *output) | |
| 875 { | |
| 876 output->base = (uint8_t)((globalStateID >> 28) & 0x0F); | |
| 877 output->page = (uint8_t)((globalStateID >> 24) & 0x0F); | |
| 878 output->line = (uint8_t)((globalStateID >> 16) & 0xFF); | |
| 879 output->field = (uint8_t)((globalStateID >> 8) & 0xFF); | |
| 880 output->mode = (uint8_t)((globalStateID ) & 0xFF); | |
| 881 } | |
| 882 | |
| 883 void get_idSpecificStateList(uint32_t id, SStateList *output) | |
| 884 { | |
| 885 output->base = (uint8_t)((id >> 28) & 0x0F); | |
| 886 output->page = (uint8_t)((id >> 24) & 0x0F); | |
| 887 output->line = (uint8_t)((id >> 16) & 0xFF); | |
| 888 output->field = (uint8_t)((id >> 8) & 0xFF); | |
| 889 output->mode = (uint8_t)((id ) & 0xFF); | |
| 890 } | |
| 891 | |
| 892 void set_globalState_Base(void) | |
| 893 { | |
| 894 set_globalState(StS); | |
| 895 } | |
| 896 | |
| 897 void set_globalState_Menu_Page(uint8_t page) | |
| 898 { | |
| 899 globalStateID = ((BaseMenu << 28) + (page << 24)); | |
| 900 } | |
| 901 | |
| 902 void set_globalState_Log_Page(uint8_t pageIsLine) | |
| 903 { | |
| 904 globalStateID = StILOGLIST + (pageIsLine << 16); | |
| 905 } | |
| 906 | |
| 907 | |
| 908 void set_globalState_Menu_Line(uint8_t line) | |
| 909 { | |
| 910 globalStateID = ((globalStateID & MaskLineFieldDigit) + (line << 16)); | |
| 911 } | |
| 912 | |
| 913 | |
| 914 void set_globalState(uint32_t newID) | |
| 915 { | |
| 916 globalStateID = newID; | |
| 917 } | |
| 918 | |
| 919 | |
| 920 | |
| 921 void delayMicros(uint32_t micros) | |
| 922 { | |
| 923 micros = micros * (168/4) - 10; | |
| 924 while(micros--); | |
| 925 } | |
| 926 | |
| 927 | |
| 928 void get_RTC_DateTime(RTC_DateTypeDef * sdatestructureget, RTC_TimeTypeDef * stimestructureget) | |
| 929 { | |
| 930 /* Get the RTC current Time */ | |
| 931 if(sdatestructureget) | |
| 932 HAL_RTC_GetTime(&RtcHandle, stimestructureget, FORMAT_BIN); | |
| 933 /* Get the RTC current Date */ | |
| 934 if(stimestructureget) | |
| 935 HAL_RTC_GetDate(&RtcHandle, sdatestructureget, FORMAT_BIN); | |
| 936 } | |
| 937 | |
| 938 | |
| 939 void set_RTC_DateTime(RTC_DateTypeDef * sdatestructure, RTC_TimeTypeDef * stimestructure) | |
| 940 { | |
| 941 if(sdatestructure) | |
| 942 if(HAL_RTC_SetDate(&RtcHandle,sdatestructure,FORMAT_BCD) != HAL_OK) | |
| 943 { | |
| 944 /* Initialization Error */ | |
| 945 Error_Handler(); | |
| 946 } | |
| 947 | |
| 948 if(stimestructure) | |
| 949 if(HAL_RTC_SetTime(&RtcHandle,stimestructure,FORMAT_BCD) != HAL_OK) | |
| 950 { | |
| 951 /* Initialization Error */ | |
| 952 Error_Handler(); | |
| 953 } | |
| 954 } | |
| 955 | |
| 956 static void TIM_init(void) | |
| 957 { | |
| 958 uint16_t uwPrescalerValue = 0; | |
| 959 | |
| 960 uwPrescalerValue = (uint32_t) ((SystemCoreClock /2) / 10000) - 1; | |
| 961 | |
| 962 /* Set TIMx instance */ | |
| 963 TimHandle.Instance = TIMx; | |
| 964 | |
| 965 /* Initialize TIM3 peripheral as follows: | |
| 966 + Period = 10000 - 1 | |
| 967 + Prescaler = ((SystemCoreClock/2)/10000) - 1 | |
| 968 + ClockDivision = 0 | |
| 969 + Counter direction = Up | |
| 970 */ | |
| 971 TimHandle.Init.Period = 1000 - 1; | |
| 972 TimHandle.Init.Prescaler = uwPrescalerValue; | |
| 973 TimHandle.Init.ClockDivision = 0; | |
| 974 TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; | |
| 975 if(HAL_TIM_Base_Init(&TimHandle) != HAL_OK) | |
| 976 { | |
| 977 /* Initialization Error */ | |
| 978 Error_Handler(); | |
| 979 } | |
| 980 | |
| 981 /*##-2- Start the TIM Base generation in interrupt mode ####################*/ | |
| 982 /* Start Channel1 */ | |
| 983 if(HAL_TIM_Base_Start_IT(&TimHandle) != HAL_OK) | |
| 984 { | |
| 985 /* Starting Error */ | |
| 986 Error_Handler(); | |
| 987 } | |
| 988 } | |
| 989 | |
| 990 #ifndef TIM_BACKLIGHT | |
| 991 /* | |
| 992 static void TIM_BACKLIGHT_adjust(void) | |
| 993 { | |
| 994 } | |
| 995 */ | |
| 996 static void TIM_BACKLIGHT_init(void) | |
| 997 { | |
| 998 } | |
| 999 #else | |
| 1000 /* | |
| 1001 static void TIM_BACKLIGHT_adjust(void) | |
| 1002 { | |
| 1003 | |
| 1004 TIM_OC_InitTypeDef sConfig; | |
| 1005 sConfig.OCMode = TIM_OCMODE_PWM1; | |
| 1006 sConfig.OCPolarity = TIM_OCPOLARITY_HIGH; | |
| 1007 sConfig.OCFastMode = TIM_OCFAST_DISABLE; | |
| 1008 sConfig.Pulse = 600; | |
| 1009 | |
| 1010 HAL_TIM_PWM_ConfigChannel(&TimBacklightHandle, &sConfig, TIM_BACKLIGHT_CHANNEL); | |
| 1011 HAL_TIM_PWM_Start(&TimBacklightHandle, TIM_BACKLIGHT_CHANNEL); | |
| 1012 } | |
| 1013 */ | |
| 1014 static void TIM_BACKLIGHT_init(void) | |
| 1015 { | |
| 1016 uint32_t uwPrescalerValue = 0; | |
| 1017 TIM_OC_InitTypeDef sConfig; | |
| 1018 | |
| 1019 uwPrescalerValue = (uint32_t) ((SystemCoreClock /2) / 18000000) - 1; | |
| 1020 | |
| 1021 TimBacklightHandle.Instance = TIM_BACKLIGHT; | |
| 1022 | |
| 1023 // Initialize TIM3 peripheral as follows: 30 kHz | |
| 1024 | |
| 1025 TimBacklightHandle.Init.Period = 600 - 1; | |
| 1026 TimBacklightHandle.Init.Prescaler = uwPrescalerValue; | |
| 1027 TimBacklightHandle.Init.ClockDivision = 0; | |
| 1028 TimBacklightHandle.Init.CounterMode = TIM_COUNTERMODE_UP; | |
| 1029 HAL_TIM_PWM_Init(&TimBacklightHandle); | |
| 1030 | |
| 1031 sConfig.OCMode = TIM_OCMODE_PWM1; | |
| 1032 sConfig.OCPolarity = TIM_OCPOLARITY_HIGH; | |
| 1033 sConfig.OCFastMode = TIM_OCFAST_DISABLE; | |
| 1034 sConfig.Pulse = 50 * 6; | |
| 1035 | |
| 1036 HAL_TIM_PWM_ConfigChannel(&TimBacklightHandle, &sConfig, TIM_BACKLIGHT_CHANNEL); | |
| 1037 HAL_TIM_PWM_Start(&TimBacklightHandle, TIM_BACKLIGHT_CHANNEL); | |
| 1038 } | |
| 1039 #endif | |
| 1040 | |
| 1041 /* Configure RTC prescaler and RTC data registers */ | |
| 1042 /* RTC configured as follow: | |
| 1043 - Hour Format = Format 24 | |
| 1044 - Asynch Prediv = Value according to source clock | |
| 1045 - Synch Prediv = Value according to source clock | |
| 1046 - OutPut = Output Disable | |
| 1047 - OutPutPolarity = High Polarity | |
| 1048 - OutPutType = Open Drain */ | |
| 1049 /*#define RTC_ASYNCH_PREDIV 0x7F LSE as RTC clock */ | |
| 1050 /*LSE: #define RTC_SYNCH_PREDIV 0x00FF LSE as RTC clock */ | |
| 1051 /*LSI: #define RTC_SYNCH_PREDIV 0x0130 LSI as RTC clock */ | |
| 1052 /* | |
| 1053 static void RTC_init(void) | |
| 1054 { | |
| 1055 RtcHandle.Instance = RTC; | |
| 1056 | |
| 1057 | |
| 1058 RtcHandle.Init.HourFormat = RTC_HOURFORMAT_24; | |
| 1059 RtcHandle.Init.AsynchPrediv = 0x7F; | |
| 1060 RtcHandle.Init.SynchPrediv = 0x0130; | |
| 1061 RtcHandle.Init.OutPut = RTC_OUTPUT_DISABLE; | |
| 1062 RtcHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; | |
| 1063 RtcHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; | |
| 1064 | |
| 1065 if(HAL_RTC_Init(&RtcHandle) != HAL_OK) | |
| 1066 { | |
| 1067 Error_Handler(); | |
| 1068 } | |
| 1069 } | |
| 1070 */ | |
| 1071 | |
| 1072 static void EXTILine_Buttons_Config(void) | |
| 1073 { | |
| 1074 GPIO_InitTypeDef GPIO_InitStructure; | |
| 1075 | |
| 1076 BUTTON_ENTER_GPIO_ENABLE(); | |
| 1077 BUTTON_NEXT_GPIO_ENABLE(); | |
| 1078 BUTTON_BACK_GPIO_ENABLE(); | |
| 1079 | |
| 1080 /* Configure pin as weak PULLUP input */ | |
| 1081 /* buttons */ | |
| 1082 GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING; | |
| 1083 GPIO_InitStructure.Pull = GPIO_NOPULL; | |
| 1084 GPIO_InitStructure.Speed = GPIO_SPEED_LOW; | |
| 1085 | |
| 1086 GPIO_InitStructure.Pin = BUTTON_ENTER_PIN; | |
| 1087 HAL_GPIO_Init(BUTTON_ENTER_GPIO_PORT, &GPIO_InitStructure); | |
| 1088 | |
| 1089 GPIO_InitStructure.Pin = BUTTON_NEXT_PIN; | |
| 1090 HAL_GPIO_Init(BUTTON_NEXT_GPIO_PORT, &GPIO_InitStructure); | |
| 1091 | |
| 1092 GPIO_InitStructure.Pin = BUTTON_BACK_PIN; | |
| 1093 HAL_GPIO_Init(BUTTON_BACK_GPIO_PORT, &GPIO_InitStructure); | |
| 1094 | |
| 1095 /* Enable and set EXTI Line0 Interrupt to the lowest priority */ | |
| 1096 HAL_NVIC_SetPriority(BUTTON_ENTER_EXTI_IRQn, 2, 0); | |
| 1097 HAL_NVIC_SetPriority(BUTTON_NEXT_EXTI_IRQn, 2, 0); | |
| 1098 HAL_NVIC_SetPriority(BUTTON_BACK_EXTI_IRQn, 2, 0); | |
| 1099 HAL_NVIC_EnableIRQ(BUTTON_ENTER_EXTI_IRQn); | |
| 1100 HAL_NVIC_EnableIRQ(BUTTON_NEXT_EXTI_IRQn); | |
| 1101 HAL_NVIC_EnableIRQ(BUTTON_BACK_EXTI_IRQn); | |
| 1102 | |
| 1103 #ifdef BUTTON_CUSTOM_PIN | |
| 1104 BUTTON_CUSTOM_GPIO_ENABLE(); | |
| 1105 GPIO_InitStructure.Pin = BUTTON_CUSTOM_PIN; | |
| 1106 HAL_GPIO_Init(BUTTON_CUSTOM_GPIO_PORT, &GPIO_InitStructure); | |
| 1107 HAL_NVIC_SetPriority(BUTTON_CUSTOM_EXTI_IRQn, 2, 0); | |
| 1108 HAL_NVIC_EnableIRQ(BUTTON_CUSTOM_EXTI_IRQn); | |
| 1109 #endif | |
| 1110 } | |
| 1111 | |
| 1112 | |
| 1113 /** | |
| 1114 * @brief System Clock Configuration | |
| 1115 * The system Clock is configured as follow : | |
| 1116 * System Clock source = PLL (HSE) | |
| 1117 * SYSCLK(Hz) = 180000000 | |
| 1118 * HCLK(Hz) = 180000000 | |
| 1119 * AHB Prescaler = 1 | |
| 1120 * APB1 Prescaler = 4 | |
| 1121 * APB2 Prescaler = 2 | |
| 1122 * HSE Frequency(Hz) = 8000000 | |
| 1123 * PLL_M = 8 | |
| 1124 * PLL_N = 360 | |
| 1125 * PLL_P = 2 | |
| 1126 * PLL_Q = 7 | |
| 1127 * VDD(V) = 3.3 | |
| 1128 * Main regulator output voltage = Scale1 mode | |
| 1129 * Flash Latency(WS) = 5 | |
| 1130 * The LTDC Clock is configured as follow : | |
| 1131 * PLLSAIN = 192 | |
| 1132 * PLLSAIR = 4 | |
| 1133 * PLLSAIDivR = 8 | |
| 1134 * @param None | |
| 1135 * @retval None | |
| 1136 */ | |
| 1137 static void SystemClock_Config(void) | |
| 1138 { | |
| 1139 RCC_ClkInitTypeDef RCC_ClkInitStruct; | |
| 1140 RCC_OscInitTypeDef RCC_OscInitStruct; | |
| 1141 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; | |
| 1142 | |
| 1143 /* Enable Power Control clock */ | |
| 1144 __PWR_CLK_ENABLE(); | |
| 1145 | |
| 1146 /* The voltage scaling allows optimizing the power consumption when the device is | |
| 1147 clocked below the maximum system frequency, to update the voltage scaling value | |
| 1148 regarding system frequency refer to product datasheet. */ | |
| 1149 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); | |
| 1150 | |
| 1151 /*##-1- System Clock Configuration #########################################*/ | |
| 1152 /* Enable HSE Oscillator and activate PLL with HSE as source */ | |
| 1153 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; | |
| 1154 RCC_OscInitStruct.HSEState = RCC_HSE_ON; | |
| 1155 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | |
| 1156 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; | |
| 1157 RCC_OscInitStruct.PLL.PLLM = 8; | |
| 1158 RCC_OscInitStruct.PLL.PLLN = 336;//360; | |
| 1159 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; | |
| 1160 RCC_OscInitStruct.PLL.PLLQ = 7; | |
| 1161 HAL_RCC_OscConfig(&RCC_OscInitStruct); | |
| 1162 | |
| 1163 // HAL_PWREx_ActivateOverDrive(); | |
| 1164 HAL_PWREx_DeactivateOverDrive(); | |
| 1165 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 | |
| 1166 clocks dividers */ | |
| 1167 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); | |
| 1168 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | |
| 1169 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | |
| 1170 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; | |
| 1171 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; | |
| 1172 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);//FLASH_LATENCY_5); | |
| 1173 | |
| 1174 /*##-2- LTDC Clock Configuration ###########################################*/ | |
| 1175 /* LCD clock configuration */ | |
| 1176 /* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz */ | |
| 1177 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 192 Mhz */ | |
| 1178 /* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 192/4 = 48 Mhz */ | |
| 1179 /* LTDC clock frequency = PLLLCDCLK / RCC_PLLSAIDIVR_8 = 48/8 = 6 Mhz */ | |
| 1180 | |
| 1181 /* neu: 8MHz/8*300/5/8 = 7,5 MHz = 19,5 Hz bei 800 x 480 */ | |
| 1182 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC; | |
| 1183 PeriphClkInitStruct.PLLSAI.PLLSAIN = 300;//192; | |
| 1184 PeriphClkInitStruct.PLLSAI.PLLSAIR = 5;//4; | |
| 1185 PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;//RCC_PLLSAIDIVR_4;// RCC_PLLSAIDIVR_2; // RCC_PLLSAIDIVR_8 | |
| 1186 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); | |
| 1187 } | |
| 1188 | |
| 1189 | |
| 1190 /** | |
| 1191 * @brief This function is executed in case of error occurrence. | |
| 1192 * @param None | |
| 1193 * @retval None | |
| 1194 */ | |
| 1195 static void Error_Handler(void) | |
| 1196 { | |
| 1197 /* Turn LED3 on */ | |
| 1198 // BSP_LED_On(LED3); | |
| 1199 while(1) | |
| 1200 { | |
| 1201 } | |
| 1202 } | |
| 1203 | |
| 1204 /** | |
| 1205 * @brief Perform the SDRAM exernal memory inialization sequence | |
| 1206 * @param hsdram: SDRAM handle | |
| 1207 * @param Command: Pointer to SDRAM command structure | |
| 1208 * @retval None | |
| 1209 */ | |
| 1210 static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command) | |
| 1211 { | |
| 1212 __IO uint32_t tmpmrd =0; | |
| 1213 /* Step 3: Configure a clock configuration enable command */ | |
| 1214 Command->CommandMode = FMC_SDRAM_CMD_CLK_ENABLE; | |
| 1215 Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; | |
| 1216 Command->AutoRefreshNumber = 1; | |
| 1217 Command->ModeRegisterDefinition = 0; | |
| 1218 | |
| 1219 /* Send the command */ | |
| 1220 HAL_SDRAM_SendCommand(hsdram, Command, 0x1000); | |
| 1221 | |
| 1222 /* Step 4: Insert 100 ms delay */ | |
| 1223 HAL_Delay(100); | |
| 1224 | |
| 1225 /* Step 5: Configure a PALL (precharge all) command */ | |
| 1226 Command->CommandMode = FMC_SDRAM_CMD_PALL; | |
| 1227 Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; | |
| 1228 Command->AutoRefreshNumber = 1; | |
| 1229 Command->ModeRegisterDefinition = 0; | |
| 1230 | |
| 1231 /* Send the command */ | |
| 1232 HAL_SDRAM_SendCommand(hsdram, Command, 0x1000); | |
| 1233 | |
| 1234 /* Step 6 : Configure a Auto-Refresh command */ | |
| 1235 Command->CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE; | |
| 1236 Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; | |
| 1237 Command->AutoRefreshNumber = 4; | |
| 1238 Command->ModeRegisterDefinition = 0; | |
| 1239 | |
| 1240 /* Send the command */ | |
| 1241 HAL_SDRAM_SendCommand(hsdram, Command, 0x1000); | |
| 1242 | |
| 1243 /* Step 7: Program the external memory mode register */ | |
| 1244 tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_2 | | |
| 1245 SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL | | |
| 1246 SDRAM_MODEREG_CAS_LATENCY_3 | | |
| 1247 SDRAM_MODEREG_OPERATING_MODE_STANDARD | | |
| 1248 SDRAM_MODEREG_WRITEBURST_MODE_SINGLE; | |
| 1249 | |
| 1250 Command->CommandMode = FMC_SDRAM_CMD_LOAD_MODE; | |
| 1251 Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; | |
| 1252 Command->AutoRefreshNumber = 1; | |
| 1253 Command->ModeRegisterDefinition = tmpmrd; | |
| 1254 | |
| 1255 /* Send the command */ | |
| 1256 HAL_SDRAM_SendCommand(hsdram, Command, 0x1000); | |
| 1257 | |
| 1258 /* Step 8: Set the refresh rate counter */ | |
| 1259 /* (15.62 us x Freq) - 20 */ | |
| 1260 /* neu: (8 us x Freq) - 20 */ | |
| 1261 /* Set the device refresh counter */ | |
| 1262 HAL_SDRAM_ProgramRefreshRate(hsdram, REFRESH_COUNT); | |
| 1263 } | |
| 1264 | |
| 1265 /* | |
| 1266 static void DualBoot(void) | |
| 1267 { | |
| 1268 // Set BFB2 bit to enable boot from Flash Bank2 | |
| 1269 // Allow Access to Flash control registers and user Falsh | |
| 1270 HAL_FLASH_Unlock(); | |
| 1271 | |
| 1272 // Allow Access to option bytes sector | |
| 1273 HAL_FLASH_OB_Unlock(); | |
| 1274 | |
| 1275 // Get the Dual boot configuration status | |
| 1276 AdvOBInit.OptionType = OBEX_BOOTCONFIG; | |
| 1277 HAL_FLASHEx_AdvOBGetConfig(&AdvOBInit); | |
| 1278 | |
| 1279 // Enable/Disable dual boot feature | |
| 1280 if (((AdvOBInit.BootConfig) & (FLASH_OPTCR_BFB2)) == FLASH_OPTCR_BFB2) | |
| 1281 { | |
| 1282 AdvOBInit.BootConfig = OB_DUAL_BOOT_DISABLE; | |
| 1283 HAL_FLASHEx_AdvOBProgram (&AdvOBInit); | |
| 1284 } | |
| 1285 else | |
| 1286 { | |
| 1287 AdvOBInit.BootConfig = OB_DUAL_BOOT_ENABLE; | |
| 1288 HAL_FLASHEx_AdvOBProgram (&AdvOBInit); | |
| 1289 } | |
| 1290 | |
| 1291 // Start the Option Bytes programming process | |
| 1292 if (HAL_FLASH_OB_Launch() != HAL_OK) | |
| 1293 { | |
| 1294 // User can add here some code to deal with this error | |
| 1295 while (1) | |
| 1296 { | |
| 1297 } | |
| 1298 } | |
| 1299 // Prevent Access to option bytes sector | |
| 1300 HAL_FLASH_OB_Lock(); | |
| 1301 | |
| 1302 // Disable the Flash option control register access (recommended to protect | |
| 1303 // the option Bytes against possible unwanted operations) | |
| 1304 HAL_FLASH_Lock(); | |
| 1305 | |
| 1306 // Initiates a system reset request to reset the MCU | |
| 1307 reset_to_firmware_using_Watchdog(); | |
| 1308 } | |
| 1309 */ | |
| 1310 /** | |
| 1311 ****************************************************************************** | |
| 1312 ****************************************************************************** | |
| 1313 ****************************************************************************** | |
| 1314 */ | |
| 1315 | |
| 1316 | |
| 1317 /** | |
| 1318 * @brief DMA2D configuration. | |
| 1319 * @note This function Configure tha DMA2D peripheral : | |
| 1320 * 1) Configure the transfer mode : memory to memory W/ pixel format conversion | |
| 1321 * 2) Configure the output color mode as ARGB4444 | |
| 1322 * 3) Configure the output memory address at SRAM memory | |
| 1323 * 4) Configure the data size : 320x120 (pixels) | |
| 1324 * 5) Configure the input color mode as ARGB8888 | |
| 1325 * 6) Configure the input memory address at FLASH memory | |
| 1326 * @retval | |
| 1327 * None | |
| 1328 */ | |
| 1329 | |
| 1330 static void SDRAM_Config(void) | |
| 1331 { | |
| 1332 /*##-1- Configure the SDRAM device #########################################*/ | |
| 1333 /* SDRAM device configuration */ | |
| 1334 hsdram.Instance = FMC_SDRAM_DEVICE; | |
| 1335 | |
| 1336 /* Timing configuration for 90 Mhz of SD clock frequency (180Mhz/2) */ | |
| 1337 /* TMRD: 2 Clock cycles */ | |
| 1338 SDRAM_Timing.LoadToActiveDelay = 2; | |
| 1339 /* TXSR: min=70ns (6x11.90ns) */ | |
| 1340 SDRAM_Timing.ExitSelfRefreshDelay = 7; | |
| 1341 /* TRAS: min=42ns (4x11.90ns) max=120k (ns) */ | |
| 1342 SDRAM_Timing.SelfRefreshTime = 4; | |
| 1343 /* TRC: min=63 (6x11.90ns) */ | |
| 1344 SDRAM_Timing.RowCycleDelay = 7; | |
| 1345 /* TWR: 2 Clock cycles */ | |
| 1346 SDRAM_Timing.WriteRecoveryTime = 2; | |
| 1347 /* TRP: 15ns => 2x11.90ns */ | |
| 1348 SDRAM_Timing.RPDelay = 2; | |
| 1349 /* TRCD: 15ns => 2x11.90ns */ | |
| 1350 SDRAM_Timing.RCDDelay = 2; | |
| 1351 | |
| 1352 hsdram.Init.SDBank = FMC_SDRAM_BANK2; | |
| 1353 hsdram.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9; | |
| 1354 hsdram.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13; | |
| 1355 hsdram.Init.MemoryDataWidth = SDRAM_MEMORY_WIDTH; | |
| 1356 hsdram.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4; | |
| 1357 hsdram.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3; | |
| 1358 hsdram.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE; | |
| 1359 hsdram.Init.SDClockPeriod = SDCLOCK_PERIOD; | |
| 1360 hsdram.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE; | |
| 1361 hsdram.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1; | |
| 1362 | |
| 1363 /* Initialize the SDRAM controller */ | |
| 1364 if(HAL_SDRAM_Init(&hsdram, &SDRAM_Timing) != HAL_OK) | |
| 1365 { | |
| 1366 /* Initialization Error */ | |
| 1367 Error_Handler(); | |
| 1368 } | |
| 1369 | |
| 1370 /* Program the SDRAM external device */ | |
| 1371 SDRAM_Initialization_Sequence(&hsdram, &command); | |
| 1372 } | |
| 1373 | |
| 1374 | |
| 1375 uint8_t checkResetForFirmwareUpdate(void) | |
| 1376 { | |
| 1377 uint32_t backupRegisterContent; | |
| 1378 | |
| 1379 RTC_HandleTypeDef RtcHandle; | |
| 1380 RtcHandle.Instance = RTC; | |
| 1381 backupRegisterContent = HAL_RTCEx_BKUPRead(&RtcHandle,RTC_BKP_DR0); | |
| 1382 | |
| 1383 if(backupRegisterContent == 0x12345678) | |
| 1384 return 1; | |
| 1385 else | |
| 1386 return 0; | |
| 1387 } | |
| 1388 | |
| 1389 void DeleteResetToFirmwareUpdateRegister(void) | |
| 1390 { | |
| 1391 RTC_HandleTypeDef RtcHandle; | |
| 1392 RtcHandle.Instance = RTC; | |
| 1393 __HAL_RTC_WRITEPROTECTION_DISABLE(&RtcHandle); | |
| 1394 HAL_RTCEx_BKUPWrite(&RtcHandle,RTC_BKP_DR0,0x00); | |
| 1395 __HAL_RTC_WRITEPROTECTION_ENABLE(&RtcHandle); | |
| 1396 } | |
| 1397 | |
| 1398 #ifdef USE_FULL_ASSERT | |
| 1399 | |
| 1400 /** | |
| 1401 * @brief Reports the name of the source file and the source line number | |
| 1402 * where the assert_param error has occurred. | |
| 1403 * @param file: pointer to the source file name | |
| 1404 * @param line: assert_param error line source number | |
| 1405 * @retval None | |
| 1406 */ | |
| 1407 void assert_failed(uint8_t* file, uint32_t line) | |
| 1408 { | |
| 1409 /* User can add his own implementation to report the file name and line number, | |
| 1410 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ | |
| 1411 | |
| 1412 /* Infinite loop */ | |
| 1413 while (1) | |
| 1414 { | |
| 1415 } | |
| 1416 } | |
| 1417 #endif | |
| 1418 | |
| 1419 /* | |
| 1420 static void DualBootToBootloader(void) | |
| 1421 { | |
| 1422 // Set BFB2 bit to enable boot from Flash Bank2 | |
| 1423 // Allow Access to Flash control registers and user Falsh | |
| 1424 HAL_FLASH_Unlock(); | |
| 1425 | |
| 1426 // Allow Access to option bytes sector | |
| 1427 HAL_FLASH_OB_Unlock(); | |
| 1428 | |
| 1429 // Get the Dual boot configuration status | |
| 1430 AdvOBInit.OptionType = OPTIONBYTE_BOOTCONFIG; | |
| 1431 HAL_FLASHEx_AdvOBGetConfig(&AdvOBInit); | |
| 1432 | |
| 1433 // Enable/Disable dual boot feature | |
| 1434 if (((AdvOBInit.BootConfig) & (FLASH_OPTCR_BFB2)) == FLASH_OPTCR_BFB2) | |
| 1435 { | |
| 1436 AdvOBInit.BootConfig = OB_DUAL_BOOT_DISABLE; | |
| 1437 HAL_FLASHEx_AdvOBProgram (&AdvOBInit); | |
| 1438 if (HAL_FLASH_OB_Launch() != HAL_OK) | |
| 1439 { | |
| 1440 while (1) | |
| 1441 { | |
| 1442 } | |
| 1443 } | |
| 1444 } | |
| 1445 else | |
| 1446 { | |
| 1447 | |
| 1448 AdvOBInit.BootConfig = OB_DUAL_BOOT_ENABLE; | |
| 1449 HAL_FLASHEx_AdvOBProgram (&AdvOBInit); | |
| 1450 if (HAL_FLASH_OB_Launch() != HAL_OK) | |
| 1451 { | |
| 1452 while (1) | |
| 1453 { | |
| 1454 } | |
| 1455 } | |
| 1456 } | |
| 1457 | |
| 1458 // Prevent Access to option bytes sector | |
| 1459 HAL_FLASH_OB_Lock(); | |
| 1460 | |
| 1461 / Disable the Flash option control register access (recommended to protect | |
| 1462 // the option Bytes against possible unwanted operations) | |
| 1463 HAL_FLASH_Lock(); | |
| 1464 | |
| 1465 // Initiates a system reset request to reset the MCU | |
| 1466 reset_to_firmware_using_Watchdog(); | |
| 1467 } | |
| 1468 */ | |
| 1469 | |
| 1470 void reset_to_update_using_system_reset(void) | |
| 1471 { | |
| 1472 __HAL_RCC_CLEAR_RESET_FLAGS(); | |
| 1473 HAL_NVIC_SystemReset(); | |
| 1474 } | |
| 1475 | |
| 1476 void reset_to_firmware_using_Watchdog(void) | |
| 1477 { | |
| 1478 __HAL_RCC_CLEAR_RESET_FLAGS(); | |
| 1479 __HAL_RCC_WWDG_CLK_ENABLE(); | |
| 1480 | |
| 1481 WWDG_HandleTypeDef WwdgHandle; | |
| 1482 WwdgHandle.Instance = WWDG; | |
| 1483 | |
| 1484 WwdgHandle.Init.Prescaler = WWDG_PRESCALER_8; | |
| 1485 WwdgHandle.Init.Window = 80; | |
| 1486 WwdgHandle.Init.Counter = 127; | |
| 1487 | |
| 1488 HAL_WWDG_Init(&WwdgHandle); | |
| 1489 HAL_WWDG_Start(&WwdgHandle); | |
| 1490 while(1); | |
| 1491 } | |
| 1492 | |
| 1493 | |
| 1494 void set_returnFromComm(void) | |
| 1495 { | |
| 1496 returnFromCommCleanUpRequest = 1; | |
| 1497 } | |
| 1498 | |
| 1499 /** | |
| 1500 * @} | |
| 1501 */ | |
| 1502 | |
| 1503 /** | |
| 1504 * @} | |
| 1505 */ | |
| 1506 | |
| 1507 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |
