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comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h @ 160:e3ca52b8e7fa
Merge with FlipDisplay
author | heinrichsweikamp |
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date | Thu, 07 Mar 2019 15:06:43 +0100 |
parents | c78bcbd5deda |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_uart.h | |
4 * @author MCD Application Team | |
5 * @brief Header file of UART HAL module. | |
6 ****************************************************************************** | |
7 * @attention | |
8 * | |
9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> | |
10 * | |
11 * Redistribution and use in source and binary forms, with or without modification, | |
12 * are permitted provided that the following conditions are met: | |
13 * 1. Redistributions of source code must retain the above copyright notice, | |
14 * this list of conditions and the following disclaimer. | |
15 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
16 * this list of conditions and the following disclaimer in the documentation | |
17 * and/or other materials provided with the distribution. | |
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
19 * may be used to endorse or promote products derived from this software | |
20 * without specific prior written permission. | |
21 * | |
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
32 * | |
33 ****************************************************************************** | |
34 */ | |
35 | |
36 /* Define to prevent recursive inclusion -------------------------------------*/ | |
37 #ifndef __STM32F4xx_HAL_UART_H | |
38 #define __STM32F4xx_HAL_UART_H | |
39 | |
40 #ifdef __cplusplus | |
41 extern "C" { | |
42 #endif | |
43 | |
44 /* Includes ------------------------------------------------------------------*/ | |
45 #include "stm32f4xx_hal_def.h" | |
46 | |
47 /** @addtogroup STM32F4xx_HAL_Driver | |
48 * @{ | |
49 */ | |
50 | |
51 /** @addtogroup UART | |
52 * @{ | |
53 */ | |
54 | |
55 /* Exported types ------------------------------------------------------------*/ | |
56 /** @defgroup UART_Exported_Types UART Exported Types | |
57 * @{ | |
58 */ | |
59 | |
60 /** | |
61 * @brief UART Init Structure definition | |
62 */ | |
63 typedef struct | |
64 { | |
65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. | |
66 The baud rate is computed using the following formula: | |
67 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) | |
68 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 | |
69 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ | |
70 | |
71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. | |
72 This parameter can be a value of @ref UART_Word_Length */ | |
73 | |
74 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. | |
75 This parameter can be a value of @ref UART_Stop_Bits */ | |
76 | |
77 uint32_t Parity; /*!< Specifies the parity mode. | |
78 This parameter can be a value of @ref UART_Parity | |
79 @note When parity is enabled, the computed parity is inserted | |
80 at the MSB position of the transmitted data (9th bit when | |
81 the word length is set to 9 data bits; 8th bit when the | |
82 word length is set to 8 data bits). */ | |
83 | |
84 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. | |
85 This parameter can be a value of @ref UART_Mode */ | |
86 | |
87 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled | |
88 or disabled. | |
89 This parameter can be a value of @ref UART_Hardware_Flow_Control */ | |
90 | |
91 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). | |
92 This parameter can be a value of @ref UART_Over_Sampling */ | |
93 }UART_InitTypeDef; | |
94 | |
95 /** | |
96 * @brief HAL UART State structures definition | |
97 * @note HAL UART State value is a combination of 2 different substates: gState and RxState. | |
98 * - gState contains UART state information related to global Handle management | |
99 * and also information related to Tx operations. | |
100 * gState value coding follow below described bitmap : | |
101 * b7-b6 Error information | |
102 * 00 : No Error | |
103 * 01 : (Not Used) | |
104 * 10 : Timeout | |
105 * 11 : Error | |
106 * b5 IP initilisation status | |
107 * 0 : Reset (IP not initialized) | |
108 * 1 : Init done (IP not initialized. HAL UART Init function already called) | |
109 * b4-b3 (not used) | |
110 * xx : Should be set to 00 | |
111 * b2 Intrinsic process state | |
112 * 0 : Ready | |
113 * 1 : Busy (IP busy with some configuration or internal operations) | |
114 * b1 (not used) | |
115 * x : Should be set to 0 | |
116 * b0 Tx state | |
117 * 0 : Ready (no Tx operation ongoing) | |
118 * 1 : Busy (Tx operation ongoing) | |
119 * - RxState contains information related to Rx operations. | |
120 * RxState value coding follow below described bitmap : | |
121 * b7-b6 (not used) | |
122 * xx : Should be set to 00 | |
123 * b5 IP initilisation status | |
124 * 0 : Reset (IP not initialized) | |
125 * 1 : Init done (IP not initialized) | |
126 * b4-b2 (not used) | |
127 * xxx : Should be set to 000 | |
128 * b1 Rx state | |
129 * 0 : Ready (no Rx operation ongoing) | |
130 * 1 : Busy (Rx operation ongoing) | |
131 * b0 (not used) | |
132 * x : Should be set to 0. | |
133 */ | |
134 typedef enum | |
135 { | |
136 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized | |
137 Value is allowed for gState and RxState */ | |
138 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use | |
139 Value is allowed for gState and RxState */ | |
140 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing | |
141 Value is allowed for gState only */ | |
142 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing | |
143 Value is allowed for gState only */ | |
144 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing | |
145 Value is allowed for RxState only */ | |
146 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing | |
147 Not to be used for neither gState nor RxState. | |
148 Value is result of combination (Or) between gState and RxState values */ | |
149 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state | |
150 Value is allowed for gState only */ | |
151 HAL_UART_STATE_ERROR = 0xE0U /*!< Error | |
152 Value is allowed for gState only */ | |
153 }HAL_UART_StateTypeDef; | |
154 | |
155 /** | |
156 * @brief UART handle Structure definition | |
157 */ | |
158 typedef struct | |
159 { | |
160 USART_TypeDef *Instance; /*!< UART registers base address */ | |
161 | |
162 UART_InitTypeDef Init; /*!< UART communication parameters */ | |
163 | |
164 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ | |
165 | |
166 uint16_t TxXferSize; /*!< UART Tx Transfer size */ | |
167 | |
168 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ | |
169 | |
170 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ | |
171 | |
172 uint16_t RxXferSize; /*!< UART Rx Transfer size */ | |
173 | |
174 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ | |
175 | |
176 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ | |
177 | |
178 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ | |
179 | |
180 HAL_LockTypeDef Lock; /*!< Locking object */ | |
181 | |
182 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management | |
183 and also related to Tx operations. | |
184 This parameter can be a value of @ref HAL_UART_StateTypeDef */ | |
185 | |
186 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. | |
187 This parameter can be a value of @ref HAL_UART_StateTypeDef */ | |
188 | |
189 __IO uint32_t ErrorCode; /*!< UART Error code */ | |
190 | |
191 }UART_HandleTypeDef; | |
192 /** | |
193 * @} | |
194 */ | |
195 | |
196 /* Exported constants --------------------------------------------------------*/ | |
197 /** @defgroup UART_Exported_Constants UART Exported constants | |
198 * @{ | |
199 */ | |
200 | |
201 /** @defgroup UART_Error_Code UART Error Code | |
202 * @brief UART Error Code | |
203 * @{ | |
204 */ | |
205 #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ | |
206 #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ | |
207 #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ | |
208 #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ | |
209 #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ | |
210 #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ | |
211 /** | |
212 * @} | |
213 */ | |
214 | |
215 /** @defgroup UART_Word_Length UART Word Length | |
216 * @{ | |
217 */ | |
218 #define UART_WORDLENGTH_8B 0x00000000U | |
219 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) | |
220 /** | |
221 * @} | |
222 */ | |
223 | |
224 /** @defgroup UART_Stop_Bits UART Number of Stop Bits | |
225 * @{ | |
226 */ | |
227 #define UART_STOPBITS_1 0x00000000U | |
228 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) | |
229 /** | |
230 * @} | |
231 */ | |
232 | |
233 /** @defgroup UART_Parity UART Parity | |
234 * @{ | |
235 */ | |
236 #define UART_PARITY_NONE 0x00000000U | |
237 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) | |
238 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) | |
239 /** | |
240 * @} | |
241 */ | |
242 | |
243 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control | |
244 * @{ | |
245 */ | |
246 #define UART_HWCONTROL_NONE 0x00000000U | |
247 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) | |
248 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) | |
249 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) | |
250 /** | |
251 * @} | |
252 */ | |
253 | |
254 /** @defgroup UART_Mode UART Transfer Mode | |
255 * @{ | |
256 */ | |
257 #define UART_MODE_RX ((uint32_t)USART_CR1_RE) | |
258 #define UART_MODE_TX ((uint32_t)USART_CR1_TE) | |
259 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) | |
260 /** | |
261 * @} | |
262 */ | |
263 | |
264 /** @defgroup UART_State UART State | |
265 * @{ | |
266 */ | |
267 #define UART_STATE_DISABLE 0x00000000U | |
268 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) | |
269 /** | |
270 * @} | |
271 */ | |
272 | |
273 /** @defgroup UART_Over_Sampling UART Over Sampling | |
274 * @{ | |
275 */ | |
276 #define UART_OVERSAMPLING_16 0x00000000U | |
277 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) | |
278 /** | |
279 * @} | |
280 */ | |
281 | |
282 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length | |
283 * @{ | |
284 */ | |
285 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U | |
286 #define UART_LINBREAKDETECTLENGTH_11B 0x00000020U | |
287 /** | |
288 * @} | |
289 */ | |
290 | |
291 /** @defgroup UART_WakeUp_functions UART Wakeup Functions | |
292 * @{ | |
293 */ | |
294 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U | |
295 #define UART_WAKEUPMETHOD_ADDRESSMARK 0x00000800U | |
296 /** | |
297 * @} | |
298 */ | |
299 | |
300 /** @defgroup UART_Flags UART FLags | |
301 * Elements values convention: 0xXXXX | |
302 * - 0xXXXX : Flag mask in the SR register | |
303 * @{ | |
304 */ | |
305 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) | |
306 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) | |
307 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) | |
308 #define UART_FLAG_TC ((uint32_t)USART_SR_TC) | |
309 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) | |
310 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) | |
311 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) | |
312 #define UART_FLAG_NE ((uint32_t)USART_SR_NE) | |
313 #define UART_FLAG_FE ((uint32_t)USART_SR_FE) | |
314 #define UART_FLAG_PE ((uint32_t)USART_SR_PE) | |
315 /** | |
316 * @} | |
317 */ | |
318 | |
319 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions | |
320 * Elements values convention: 0xY000XXXX | |
321 * - XXXX : Interrupt mask (16 bits) in the Y register | |
322 * - Y : Interrupt source register (2bits) | |
323 * - 0001: CR1 register | |
324 * - 0010: CR2 register | |
325 * - 0011: CR3 register | |
326 * | |
327 * @{ | |
328 */ | |
329 | |
330 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) | |
331 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) | |
332 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) | |
333 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) | |
334 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) | |
335 | |
336 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) | |
337 | |
338 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) | |
339 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) | |
340 /** | |
341 * @} | |
342 */ | |
343 | |
344 /** | |
345 * @} | |
346 */ | |
347 | |
348 /* Exported macro ------------------------------------------------------------*/ | |
349 /** @defgroup UART_Exported_Macros UART Exported Macros | |
350 * @{ | |
351 */ | |
352 | |
353 /** @brief Reset UART handle gstate & RxState | |
354 * @param __HANDLE__ specifies the UART Handle. | |
355 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
356 * UART peripheral. | |
357 * @retval None | |
358 */ | |
359 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ | |
360 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ | |
361 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ | |
362 } while(0U) | |
363 | |
364 /** @brief Flushes the UART DR register | |
365 * @param __HANDLE__ specifies the UART Handle. | |
366 */ | |
367 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) | |
368 | |
369 /** @brief Checks whether the specified UART flag is set or not. | |
370 * @param __HANDLE__ specifies the UART Handle. | |
371 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
372 * UART peripheral. | |
373 * @param __FLAG__ specifies the flag to check. | |
374 * This parameter can be one of the following values: | |
375 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) | |
376 * @arg UART_FLAG_LBD: LIN Break detection flag | |
377 * @arg UART_FLAG_TXE: Transmit data register empty flag | |
378 * @arg UART_FLAG_TC: Transmission Complete flag | |
379 * @arg UART_FLAG_RXNE: Receive data register not empty flag | |
380 * @arg UART_FLAG_IDLE: Idle Line detection flag | |
381 * @arg UART_FLAG_ORE: Overrun Error flag | |
382 * @arg UART_FLAG_NE: Noise Error flag | |
383 * @arg UART_FLAG_FE: Framing Error flag | |
384 * @arg UART_FLAG_PE: Parity Error flag | |
385 * @retval The new state of __FLAG__ (TRUE or FALSE). | |
386 */ | |
387 | |
388 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) | |
389 | |
390 /** @brief Clears the specified UART pending flag. | |
391 * @param __HANDLE__ specifies the UART Handle. | |
392 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
393 * UART peripheral. | |
394 * @param __FLAG__ specifies the flag to check. | |
395 * This parameter can be any combination of the following values: | |
396 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). | |
397 * @arg UART_FLAG_LBD: LIN Break detection flag. | |
398 * @arg UART_FLAG_TC: Transmission Complete flag. | |
399 * @arg UART_FLAG_RXNE: Receive data register not empty flag. | |
400 * | |
401 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun | |
402 * error) and IDLE (Idle line detected) flags are cleared by software | |
403 * sequence: a read operation to USART_SR register followed by a read | |
404 * operation to USART_DR register. | |
405 * @note RXNE flag can be also cleared by a read to the USART_DR register. | |
406 * @note TC flag can be also cleared by software sequence: a read operation to | |
407 * USART_SR register followed by a write operation to USART_DR register. | |
408 * @note TXE flag is cleared only by a write to the USART_DR register. | |
409 * | |
410 * @retval None | |
411 */ | |
412 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) | |
413 | |
414 /** @brief Clear the UART PE pending flag. | |
415 * @param __HANDLE__ specifies the UART Handle. | |
416 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
417 * UART peripheral. | |
418 * @retval None | |
419 */ | |
420 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ | |
421 do{ \ | |
422 __IO uint32_t tmpreg = 0x00U; \ | |
423 tmpreg = (__HANDLE__)->Instance->SR; \ | |
424 tmpreg = (__HANDLE__)->Instance->DR; \ | |
425 UNUSED(tmpreg); \ | |
426 } while(0U) | |
427 | |
428 /** @brief Clear the UART FE pending flag. | |
429 * @param __HANDLE__ specifies the UART Handle. | |
430 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
431 * UART peripheral. | |
432 * @retval None | |
433 */ | |
434 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) | |
435 | |
436 /** @brief Clear the UART NE pending flag. | |
437 * @param __HANDLE__ specifies the UART Handle. | |
438 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
439 * UART peripheral. | |
440 * @retval None | |
441 */ | |
442 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) | |
443 | |
444 /** @brief Clear the UART ORE pending flag. | |
445 * @param __HANDLE__ specifies the UART Handle. | |
446 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
447 * UART peripheral. | |
448 * @retval None | |
449 */ | |
450 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) | |
451 | |
452 /** @brief Clear the UART IDLE pending flag. | |
453 * @param __HANDLE__ specifies the UART Handle. | |
454 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
455 * UART peripheral. | |
456 * @retval None | |
457 */ | |
458 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) | |
459 | |
460 /** @brief Enable the specified UART interrupt. | |
461 * @param __HANDLE__ specifies the UART Handle. | |
462 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
463 * UART peripheral. | |
464 * @param __INTERRUPT__ specifies the UART interrupt source to enable. | |
465 * This parameter can be one of the following values: | |
466 * @arg UART_IT_CTS: CTS change interrupt | |
467 * @arg UART_IT_LBD: LIN Break detection interrupt | |
468 * @arg UART_IT_TXE: Transmit Data Register empty interrupt | |
469 * @arg UART_IT_TC: Transmission complete interrupt | |
470 * @arg UART_IT_RXNE: Receive Data register not empty interrupt | |
471 * @arg UART_IT_IDLE: Idle line detection interrupt | |
472 * @arg UART_IT_PE: Parity Error interrupt | |
473 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) | |
474 * @retval None | |
475 */ | |
476 #define UART_IT_MASK 0x0000FFFFU | |
477 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ | |
478 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ | |
479 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) | |
480 /** @brief Disable the specified UART interrupt. | |
481 * @param __HANDLE__ specifies the UART Handle. | |
482 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
483 * UART peripheral. | |
484 * @param __INTERRUPT__ specifies the UART interrupt source to disable. | |
485 * This parameter can be one of the following values: | |
486 * @arg UART_IT_CTS: CTS change interrupt | |
487 * @arg UART_IT_LBD: LIN Break detection interrupt | |
488 * @arg UART_IT_TXE: Transmit Data Register empty interrupt | |
489 * @arg UART_IT_TC: Transmission complete interrupt | |
490 * @arg UART_IT_RXNE: Receive Data register not empty interrupt | |
491 * @arg UART_IT_IDLE: Idle line detection interrupt | |
492 * @arg UART_IT_PE: Parity Error interrupt | |
493 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) | |
494 * @retval None | |
495 */ | |
496 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ | |
497 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ | |
498 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) | |
499 | |
500 /** @brief Checks whether the specified UART interrupt has occurred or not. | |
501 * @param __HANDLE__ specifies the UART Handle. | |
502 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or | |
503 * UART peripheral. | |
504 * @param __IT__ specifies the UART interrupt source to check. | |
505 * This parameter can be one of the following values: | |
506 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) | |
507 * @arg UART_IT_LBD: LIN Break detection interrupt | |
508 * @arg UART_IT_TXE: Transmit Data Register empty interrupt | |
509 * @arg UART_IT_TC: Transmission complete interrupt | |
510 * @arg UART_IT_RXNE: Receive Data register not empty interrupt | |
511 * @arg UART_IT_IDLE: Idle line detection interrupt | |
512 * @arg USART_IT_ERR: Error interrupt | |
513 * @retval The new state of __IT__ (TRUE or FALSE). | |
514 */ | |
515 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \ | |
516 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) | |
517 | |
518 /** @brief Enable CTS flow control | |
519 * This macro allows to enable CTS hardware flow control for a given UART instance, | |
520 * without need to call HAL_UART_Init() function. | |
521 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | |
522 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need | |
523 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | |
524 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | |
525 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) | |
526 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). | |
527 * @param __HANDLE__ specifies the UART Handle. | |
528 * The Handle Instance can be USART1, USART2 or LPUART. | |
529 * @retval None | |
530 */ | |
531 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ | |
532 do{ \ | |
533 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ | |
534 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ | |
535 } while(0U) | |
536 | |
537 /** @brief Disable CTS flow control | |
538 * This macro allows to disable CTS hardware flow control for a given UART instance, | |
539 * without need to call HAL_UART_Init() function. | |
540 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | |
541 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need | |
542 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | |
543 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | |
544 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) | |
545 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). | |
546 * @param __HANDLE__ specifies the UART Handle. | |
547 * The Handle Instance can be USART1, USART2 or LPUART. | |
548 * @retval None | |
549 */ | |
550 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ | |
551 do{ \ | |
552 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ | |
553 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ | |
554 } while(0U) | |
555 | |
556 /** @brief Enable RTS flow control | |
557 * This macro allows to enable RTS hardware flow control for a given UART instance, | |
558 * without need to call HAL_UART_Init() function. | |
559 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | |
560 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need | |
561 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | |
562 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | |
563 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) | |
564 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). | |
565 * @param __HANDLE__ specifies the UART Handle. | |
566 * The Handle Instance can be USART1, USART2 or LPUART. | |
567 * @retval None | |
568 */ | |
569 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ | |
570 do{ \ | |
571 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ | |
572 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ | |
573 } while(0U) | |
574 | |
575 /** @brief Disable RTS flow control | |
576 * This macro allows to disable RTS hardware flow control for a given UART instance, | |
577 * without need to call HAL_UART_Init() function. | |
578 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. | |
579 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need | |
580 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : | |
581 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) | |
582 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) | |
583 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). | |
584 * @param __HANDLE__ specifies the UART Handle. | |
585 * The Handle Instance can be USART1, USART2 or LPUART. | |
586 * @retval None | |
587 */ | |
588 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ | |
589 do{ \ | |
590 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ | |
591 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ | |
592 } while(0U) | |
593 | |
594 /** @brief macros to enables the UART's one bit sample method | |
595 * @param __HANDLE__ specifies the UART Handle. | |
596 * @retval None | |
597 */ | |
598 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) | |
599 | |
600 /** @brief macros to disables the UART's one bit sample method | |
601 * @param __HANDLE__ specifies the UART Handle. | |
602 * @retval None | |
603 */ | |
604 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) | |
605 | |
606 /** @brief Enable UART | |
607 * @param __HANDLE__ specifies the UART Handle. | |
608 * @retval None | |
609 */ | |
610 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) | |
611 | |
612 /** @brief Disable UART | |
613 * @param __HANDLE__ specifies the UART Handle. | |
614 * @retval None | |
615 */ | |
616 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) | |
617 /** | |
618 * @} | |
619 */ | |
620 | |
621 /* Exported functions --------------------------------------------------------*/ | |
622 /** @addtogroup UART_Exported_Functions | |
623 * @{ | |
624 */ | |
625 | |
626 /** @addtogroup UART_Exported_Functions_Group1 | |
627 * @{ | |
628 */ | |
629 /* Initialization/de-initialization functions **********************************/ | |
630 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); | |
631 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); | |
632 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); | |
633 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); | |
634 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); | |
635 void HAL_UART_MspInit(UART_HandleTypeDef *huart); | |
636 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); | |
637 /** | |
638 * @} | |
639 */ | |
640 | |
641 /** @addtogroup UART_Exported_Functions_Group2 | |
642 * @{ | |
643 */ | |
644 /* IO operation functions *******************************************************/ | |
645 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); | |
646 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); | |
647 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | |
648 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | |
649 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | |
650 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); | |
651 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); | |
652 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); | |
653 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); | |
654 /* Transfer Abort functions */ | |
655 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); | |
656 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); | |
657 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); | |
658 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); | |
659 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); | |
660 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); | |
661 | |
662 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); | |
663 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); | |
664 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); | |
665 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); | |
666 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); | |
667 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); | |
668 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); | |
669 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); | |
670 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); | |
671 /** | |
672 * @} | |
673 */ | |
674 | |
675 /** @addtogroup UART_Exported_Functions_Group3 | |
676 * @{ | |
677 */ | |
678 /* Peripheral Control functions ************************************************/ | |
679 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); | |
680 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); | |
681 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); | |
682 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); | |
683 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); | |
684 /** | |
685 * @} | |
686 */ | |
687 | |
688 /** @addtogroup UART_Exported_Functions_Group4 | |
689 * @{ | |
690 */ | |
691 /* Peripheral State functions **************************************************/ | |
692 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); | |
693 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); | |
694 /** | |
695 * @} | |
696 */ | |
697 | |
698 /** | |
699 * @} | |
700 */ | |
701 /* Private types -------------------------------------------------------------*/ | |
702 /* Private variables ---------------------------------------------------------*/ | |
703 /* Private constants ---------------------------------------------------------*/ | |
704 /** @defgroup UART_Private_Constants UART Private Constants | |
705 * @{ | |
706 */ | |
707 /** @brief UART interruptions flag mask | |
708 * | |
709 */ | |
710 #define UART_CR1_REG_INDEX 1U | |
711 #define UART_CR2_REG_INDEX 2U | |
712 #define UART_CR3_REG_INDEX 3U | |
713 /** | |
714 * @} | |
715 */ | |
716 | |
717 /* Private macros ------------------------------------------------------------*/ | |
718 /** @defgroup UART_Private_Macros UART Private Macros | |
719 * @{ | |
720 */ | |
721 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ | |
722 ((LENGTH) == UART_WORDLENGTH_9B)) | |
723 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) | |
724 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ | |
725 ((STOPBITS) == UART_STOPBITS_2)) | |
726 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ | |
727 ((PARITY) == UART_PARITY_EVEN) || \ | |
728 ((PARITY) == UART_PARITY_ODD)) | |
729 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ | |
730 (((CONTROL) == UART_HWCONTROL_NONE) || \ | |
731 ((CONTROL) == UART_HWCONTROL_RTS) || \ | |
732 ((CONTROL) == UART_HWCONTROL_CTS) || \ | |
733 ((CONTROL) == UART_HWCONTROL_RTS_CTS)) | |
734 #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) | |
735 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ | |
736 ((STATE) == UART_STATE_ENABLE)) | |
737 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ | |
738 ((SAMPLING) == UART_OVERSAMPLING_8)) | |
739 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) | |
740 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ | |
741 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) | |
742 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ | |
743 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) | |
744 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U) | |
745 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) | |
746 | |
747 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) | |
748 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) | |
749 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) | |
750 /* UART BRR = mantissa + overflow + fraction | |
751 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ | |
752 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ | |
753 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ | |
754 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) | |
755 | |
756 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) | |
757 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) | |
758 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) | |
759 /* UART BRR = mantissa + overflow + fraction | |
760 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ | |
761 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ | |
762 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ | |
763 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) | |
764 | |
765 /** | |
766 * @} | |
767 */ | |
768 | |
769 /* Private functions ---------------------------------------------------------*/ | |
770 /** @defgroup UART_Private_Functions UART Private Functions | |
771 * @{ | |
772 */ | |
773 | |
774 /** | |
775 * @} | |
776 */ | |
777 | |
778 /** | |
779 * @} | |
780 */ | |
781 | |
782 /** | |
783 * @} | |
784 */ | |
785 | |
786 #ifdef __cplusplus | |
787 } | |
788 #endif | |
789 | |
790 #endif /* __STM32F4xx_HAL_UART_H */ | |
791 | |
792 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |