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comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dac.h @ 160:e3ca52b8e7fa

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Merge with FlipDisplay
author heinrichsweikamp
date Thu, 07 Mar 2019 15:06:43 +0100
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80:cc2bb7bb8456 160:e3ca52b8e7fa
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dac.h
4 * @author MCD Application Team
5 * @brief Header file of DAC HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_DAC_H
38 #define __STM32F4xx_HAL_DAC_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
45 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
46 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\
47 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
48
49 /* Includes ------------------------------------------------------------------*/
50 #include "stm32f4xx_hal_def.h"
51
52 /** @addtogroup STM32F4xx_HAL_Driver
53 * @{
54 */
55
56 /** @addtogroup DAC
57 * @{
58 */
59
60 /* Exported types ------------------------------------------------------------*/
61 /** @defgroup DAC_Exported_Types DAC Exported Types
62 * @{
63 */
64
65 /**
66 * @brief HAL State structures definition
67 */
68 typedef enum
69 {
70 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
71 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
72 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
73 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
74 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
75 }HAL_DAC_StateTypeDef;
76
77 /**
78 * @brief DAC handle Structure definition
79 */
80 typedef struct
81 {
82 DAC_TypeDef *Instance; /*!< Register base address */
83
84 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
85
86 HAL_LockTypeDef Lock; /*!< DAC locking object */
87
88 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
89
90 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
91
92 __IO uint32_t ErrorCode; /*!< DAC Error code */
93
94 }DAC_HandleTypeDef;
95
96 /**
97 * @brief DAC Configuration regular Channel structure definition
98 */
99 typedef struct
100 {
101 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
102 This parameter can be a value of @ref DAC_trigger_selection */
103
104 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
105 This parameter can be a value of @ref DAC_output_buffer */
106 }DAC_ChannelConfTypeDef;
107 /**
108 * @}
109 */
110
111 /* Exported constants --------------------------------------------------------*/
112 /** @defgroup DAC_Exported_Constants DAC Exported Constants
113 * @{
114 */
115
116 /** @defgroup DAC_Error_Code DAC Error Code
117 * @{
118 */
119 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
120 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */
121 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */
122 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
123 /**
124 * @}
125 */
126
127 /** @defgroup DAC_trigger_selection DAC Trigger Selection
128 * @{
129 */
130
131 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC1_DHRxxxx register
132 has been loaded, and not by external trigger */
133 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
134 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
135 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
136 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
137 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
138 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
139
140 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
141 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
142 /**
143 * @}
144 */
145
146 /** @defgroup DAC_output_buffer DAC Output Buffer
147 * @{
148 */
149 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U
150 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
151 /**
152 * @}
153 */
154
155 /** @defgroup DAC_Channel_selection DAC Channel Selection
156 * @{
157 */
158 #define DAC_CHANNEL_1 0x00000000U
159 #define DAC_CHANNEL_2 0x00000010U
160 /**
161 * @}
162 */
163
164 /** @defgroup DAC_data_alignment DAC Data Alignment
165 * @{
166 */
167 #define DAC_ALIGN_12B_R 0x00000000U
168 #define DAC_ALIGN_12B_L 0x00000004U
169 #define DAC_ALIGN_8B_R 0x00000008U
170 /**
171 * @}
172 */
173
174 /** @defgroup DAC_flags_definition DAC Flags Definition
175 * @{
176 */
177 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
178 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
179 /**
180 * @}
181 */
182
183 /** @defgroup DAC_IT_definition DAC IT Definition
184 * @{
185 */
186 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
187 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
188 /**
189 * @}
190 */
191
192 /**
193 * @}
194 */
195
196 /* Exported macro ------------------------------------------------------------*/
197 /** @defgroup DAC_Exported_Macros DAC Exported Macros
198 * @{
199 */
200
201 /** @brief Reset DAC handle state
202 * @param __HANDLE__ specifies the DAC handle.
203 * @retval None
204 */
205 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
206
207 /** @brief Enable the DAC channel
208 * @param __HANDLE__ specifies the DAC handle.
209 * @param __DAC_Channel__ specifies the DAC channel
210 * @retval None
211 */
212 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
213
214 /** @brief Disable the DAC channel
215 * @param __HANDLE__ specifies the DAC handle
216 * @param __DAC_Channel__ specifies the DAC channel.
217 * @retval None
218 */
219 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
220
221 /** @brief Enable the DAC interrupt
222 * @param __HANDLE__ specifies the DAC handle
223 * @param __INTERRUPT__ specifies the DAC interrupt.
224 * @retval None
225 */
226 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
227
228 /** @brief Disable the DAC interrupt
229 * @param __HANDLE__ specifies the DAC handle
230 * @param __INTERRUPT__ specifies the DAC interrupt.
231 * @retval None
232 */
233 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
234
235 /** @brief Checks if the specified DAC interrupt source is enabled or disabled.
236 * @param __HANDLE__ DAC handle
237 * @param __INTERRUPT__ DAC interrupt source to check
238 * This parameter can be any combination of the following values:
239 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
240 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
241 * @retval State of interruption (SET or RESET)
242 */
243 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
244
245 /** @brief Get the selected DAC's flag status.
246 * @param __HANDLE__ specifies the DAC handle.
247 * @param __FLAG__ specifies the flag to clear.
248 * This parameter can be any combination of the following values:
249 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
250 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
251 * @retval None
252 */
253 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
254
255 /** @brief Clear the DAC's flag.
256 * @param __HANDLE__ specifies the DAC handle.
257 * @param __FLAG__ specifies the flag to clear.
258 * This parameter can be any combination of the following values:
259 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
260 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
261 * @retval None
262 */
263 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
264 /**
265 * @}
266 */
267
268 /* Include DAC HAL Extension module */
269 #include "stm32f4xx_hal_dac_ex.h"
270
271 /* Exported functions --------------------------------------------------------*/
272 /** @addtogroup DAC_Exported_Functions
273 * @{
274 */
275
276 /** @addtogroup DAC_Exported_Functions_Group1
277 * @{
278 */
279 /* Initialization/de-initialization functions *********************************/
280 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
281 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
282 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
283 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
284 /**
285 * @}
286 */
287
288 /** @addtogroup DAC_Exported_Functions_Group2
289 * @{
290 */
291 /* I/O operation functions ****************************************************/
292 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
293 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
294 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
295 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
296 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
297 /**
298 * @}
299 */
300
301 /** @addtogroup DAC_Exported_Functions_Group3
302 * @{
303 */
304 /* Peripheral Control functions ***********************************************/
305 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
306 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
307 /**
308 * @}
309 */
310
311 /** @addtogroup DAC_Exported_Functions_Group4
312 * @{
313 */
314 /* Peripheral State functions *************************************************/
315 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
316 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
317 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
318
319 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
320 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
321 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
322 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
323 /**
324 * @}
325 */
326
327 /**
328 * @}
329 */
330 /* Private types -------------------------------------------------------------*/
331 /* Private variables ---------------------------------------------------------*/
332 /* Private constants ---------------------------------------------------------*/
333 /** @defgroup DAC_Private_Constants DAC Private Constants
334 * @{
335 */
336
337 /**
338 * @}
339 */
340
341 /* Private macros ------------------------------------------------------------*/
342 /** @defgroup DAC_Private_Macros DAC Private Macros
343 * @{
344 */
345 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
346 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
347 ((ALIGN) == DAC_ALIGN_12B_L) || \
348 ((ALIGN) == DAC_ALIGN_8B_R))
349 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
350 ((CHANNEL) == DAC_CHANNEL_2))
351 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
352 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
353
354 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
355 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
356 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
357 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
358 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
359 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
360 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
361 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
362 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
363
364 /** @brief Set DHR12R1 alignment
365 * @param __ALIGNMENT__ specifies the DAC alignment
366 * @retval None
367 */
368 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
369
370 /** @brief Set DHR12R2 alignment
371 * @param __ALIGNMENT__ specifies the DAC alignment
372 * @retval None
373 */
374 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014U) + (__ALIGNMENT__))
375
376 /** @brief Set DHR12RD alignment
377 * @param __ALIGNMENT__ specifies the DAC alignment
378 * @retval None
379 */
380 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
381
382 /**
383 * @}
384 */
385
386 /* Private functions ---------------------------------------------------------*/
387 /** @defgroup DAC_Private_Functions DAC Private Functions
388 * @{
389 */
390 /**
391 * @}
392 */
393 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
394 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
395 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx ||\
396 STM32F413xx || STM32F423xx */
397
398 /**
399 * @}
400 */
401
402 /**
403 * @}
404 */
405
406 #ifdef __cplusplus
407 }
408 #endif
409
410 #endif /*__STM32F4xx_HAL_DAC_H */
411
412 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/