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comparison Small_CPU/Src/stm32f4xx_it_v3.c @ 988:d9290c76b840 GasConsumption

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OSTC4/5 joined code: In the previous version code differences between OSTC4/5 were identified using the ENABLE_GPIO_V2 compiler switch. In the new version this is done using the display version as indicator which OSTC model is in used. Since this is detected by Firmware the information is forwarded from there to the RTE. This causes a little delay in the GPIO initialization but this applies only to the cold start of the RTE which should not happen very often.
author ideenmodellierer
date Sun, 06 Apr 2025 21:02:17 +0200 (9 days ago)
parents 6fc0e3d230e4
children
comparison
equal deleted inserted replaced
984:41136649b90d 988:d9290c76b840
59 extern ADC_HandleTypeDef AdcHandle; 59 extern ADC_HandleTypeDef AdcHandle;
60 60
61 extern UART_HandleTypeDef huart1; 61 extern UART_HandleTypeDef huart1;
62 extern DMA_HandleTypeDef hdma_usart1_rx; 62 extern DMA_HandleTypeDef hdma_usart1_rx;
63 extern DMA_HandleTypeDef hdma_usart1_tx; 63 extern DMA_HandleTypeDef hdma_usart1_tx;
64 #ifdef ENABLE_GNSS_INTERN
64 extern UART_HandleTypeDef huart6; 65 extern UART_HandleTypeDef huart6;
65 extern DMA_HandleTypeDef hdma_usart6_rx; 66 extern DMA_HandleTypeDef hdma_usart6_rx;
66 extern DMA_HandleTypeDef hdma_usart6_tx; 67 extern DMA_HandleTypeDef hdma_usart6_tx;
68 #endif
67 /* Private function prototypes -----------------------------------------------*/ 69 /* Private function prototypes -----------------------------------------------*/
68 /* Private functions ---------------------------------------------------------*/ 70 /* Private functions ---------------------------------------------------------*/
69 71
70 /******************************************************************************/ 72 /******************************************************************************/
71 /* Cortex-M4 Processor Exceptions Handlers */ 73 /* Cortex-M4 Processor Exceptions Handlers */
247 void DMA2_Stream7_IRQHandler(void) 249 void DMA2_Stream7_IRQHandler(void)
248 { 250 {
249 HAL_DMA_IRQHandler(&hdma_usart1_tx); 251 HAL_DMA_IRQHandler(&hdma_usart1_tx);
250 } 252 }
251 253
252 #ifdef ENABLE_GPIO_V2 254 #ifdef ENABLE_GNSS_INTERN
253 void DMA2_Stream2_IRQHandler(void) 255 void DMA2_Stream2_IRQHandler(void)
254 { 256 {
255 HAL_DMA_IRQHandler(&hdma_usart6_rx); 257 HAL_DMA_IRQHandler(&hdma_usart6_rx);
256 } 258 }
257 259
325 void USART1_IRQHandler(void) 327 void USART1_IRQHandler(void)
326 { 328 {
327 HAL_UART_IRQHandler(&huart1); 329 HAL_UART_IRQHandler(&huart1);
328 } 330 }
329 331
330 #ifdef ENABLE_GPIO_V2 332 #ifdef ENABLE_GNSS_INTERN
331 void USART6_IRQHandler(void) 333 void USART6_IRQHandler(void)
332 { 334 {
333 HAL_UART_IRQHandler(&huart6); 335 HAL_UART_IRQHandler(&huart6);
334 } 336 }
335 #endif 337 #endif