Mercurial > public > ostc4
comparison Small_CPU/Src/uart.c @ 889:cf3967fe6924 Evo_2_23
GNSS work in progress
author | heinrichsweikamp |
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date | Fri, 06 Sep 2024 16:46:22 +0200 |
parents | ad96f99ebc78 |
children | 651d21777b61 |
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888:07af9efd7c13 | 889:cf3967fe6924 |
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25 #include "uartProtocol_Sentinel.h" | 25 #include "uartProtocol_Sentinel.h" |
26 #include "externalInterface.h" | 26 #include "externalInterface.h" |
27 #include "data_exchange.h" | 27 #include "data_exchange.h" |
28 #include <string.h> /* memset */ | 28 #include <string.h> /* memset */ |
29 | 29 |
30 | |
30 /* Private variables ---------------------------------------------------------*/ | 31 /* Private variables ---------------------------------------------------------*/ |
31 | 32 |
32 | 33 |
33 | 34 |
34 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ | 35 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ |
35 #define CHUNKS_PER_BUFFER (5u) | 36 #define CHUNKS_PER_BUFFER (5u) |
36 | 37 |
37 UART_HandleTypeDef huart1; | 38 |
38 | 39 |
39 DMA_HandleTypeDef hdma_usart1_rx; | 40 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart6_rx, hdma_usart6_tx; |
40 | 41 |
41 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow fariations in buffer read time */ | 42 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow fariations in buffer read time */ |
43 uint8_t rxBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow fariations in buffer read time */ | |
44 uint8_t txBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow fariations in buffer read time */ | |
45 | |
42 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ | 46 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ |
43 static uint8_t rxReadIndex; /* Index at which new data is stared */ | 47 static uint8_t rxReadIndex; /* Index at which new data is stared */ |
44 static uint8_t lastCmdIndex; /* Index of last command which has not been completly received */ | 48 static uint8_t lastCmdIndex; /* Index of last command which has not been completly received */ |
45 static uint8_t dmaActive; /* Indicator if DMA reception needs to be started */ | 49 static uint8_t dmaActive; /* Indicator if DMA reception needs to be started */ |
50 | |
51 | |
46 | 52 |
47 | 53 |
48 /* Exported functions --------------------------------------------------------*/ | 54 /* Exported functions --------------------------------------------------------*/ |
49 | 55 |
50 | 56 |
69 rxReadIndex = 0; | 75 rxReadIndex = 0; |
70 lastCmdIndex = 0; | 76 lastCmdIndex = 0; |
71 rxWriteIndex = 0; | 77 rxWriteIndex = 0; |
72 dmaActive = 0; | 78 dmaActive = 0; |
73 } | 79 } |
80 | |
81 | |
74 | 82 |
75 void MX_USART1_UART_DeInit(void) | 83 void MX_USART1_UART_DeInit(void) |
76 { | 84 { |
77 HAL_DMA_Abort(&hdma_usart1_rx); | 85 HAL_DMA_Abort(&hdma_usart1_rx); |
78 HAL_DMA_DeInit(&hdma_usart1_rx); | 86 HAL_DMA_DeInit(&hdma_usart1_rx); |
101 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | 109 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); |
102 | 110 |
103 /* DMA interrupt init */ | 111 /* DMA interrupt init */ |
104 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 0, 0); | 112 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 0, 0); |
105 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); | 113 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); |
114 } | |
115 | |
116 void GNSS_IO_init() { | |
117 | |
118 GPIO_InitTypeDef GPIO_InitStruct = { 0 }; | |
119 /* Peripheral clock enable */ | |
120 __HAL_RCC_USART6_CLK_ENABLE(); | |
121 | |
122 __HAL_RCC_GPIOA_CLK_ENABLE(); | |
123 /**USART6 GPIO Configuration | |
124 PA11 ------> USART6_TX | |
125 PA12 ------> USART6_RX | |
126 */ | |
127 GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; | |
128 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
129 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
130 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; | |
131 GPIO_InitStruct.Alternate = GPIO_AF8_USART6; | |
132 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
133 | |
134 /* USART6 DMA Init */ | |
135 /* USART6_RX Init */ | |
136 hdma_usart6_rx.Instance = DMA2_Stream2; | |
137 hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; | |
138 hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
139 hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
140 hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; | |
141 hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; | |
142 hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
143 hdma_usart6_rx.Init.Mode = DMA_NORMAL; | |
144 hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; | |
145 hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
146 HAL_DMA_Init(&hdma_usart6_rx); | |
147 | |
148 __HAL_LINKDMA(&huart6, hdmarx, hdma_usart6_rx); | |
149 | |
150 /* USART6_TX Init */ | |
151 hdma_usart6_tx.Instance = DMA2_Stream6; | |
152 hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5; | |
153 hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; | |
154 hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; | |
155 hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; | |
156 hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; | |
157 hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
158 hdma_usart6_tx.Init.Mode = DMA_NORMAL; | |
159 hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; | |
160 hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
161 HAL_DMA_Init(&hdma_usart6_tx); | |
162 | |
163 __HAL_LINKDMA(&huart6, hdmatx, hdma_usart6_tx); | |
164 | |
165 /* USART6 interrupt Init */ | |
166 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); | |
167 HAL_NVIC_EnableIRQ(USART6_IRQn); | |
168 /* USER CODE BEGIN USART6_MspInit 1 */ | |
169 | |
170 /* USER CODE END USART6_MspInit 1 */ | |
171 | |
172 MX_USART6_DMA_Init(); | |
173 | |
174 } | |
175 | |
176 void MX_USART6_DMA_Init() { | |
177 /* DMA controller clock enable */ | |
178 __HAL_RCC_DMA2_CLK_ENABLE(); | |
179 | |
180 /* DMA interrupt init */ | |
181 /* DMA2_Stream2_IRQn interrupt configuration */ | |
182 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); | |
183 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); | |
184 /* DMA2_Stream6_IRQn interrupt configuration */ | |
185 HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); | |
186 HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); | |
187 } | |
188 | |
189 /** | |
190 * @brief USART6 Initialization Function | |
191 * @param None | |
192 * @retval None | |
193 */ | |
194 void MX_USART6_UART_Init(void) | |
195 { | |
196 /* USER CODE BEGIN USART6_Init 0 */ | |
197 | |
198 /* USER CODE END USART6_Init 0 */ | |
199 | |
200 /* USER CODE BEGIN USART6_Init 1 */ | |
201 | |
202 /* USER CODE END USART6_Init 1 */ | |
203 huart6.Instance = USART6; | |
204 huart6.Init.BaudRate = 9600; | |
205 huart6.Init.WordLength = UART_WORDLENGTH_8B; | |
206 huart6.Init.StopBits = UART_STOPBITS_1; | |
207 huart6.Init.Parity = UART_PARITY_NONE; | |
208 huart6.Init.Mode = UART_MODE_TX_RX; | |
209 huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
210 huart6.Init.OverSampling = UART_OVERSAMPLING_16; | |
211 HAL_UART_Init(&huart6); | |
212 | |
213 /* USER CODE BEGIN USART6_Init 2 */ | |
214 | |
215 /* USER CODE END USART6_Init 2 */ | |
106 } | 216 } |
107 | 217 |
108 void UART_MUX_SelectAddress(uint8_t muxAddress) | 218 void UART_MUX_SelectAddress(uint8_t muxAddress) |
109 { | 219 { |
110 uint8_t indexstr[4]; | 220 uint8_t indexstr[4]; |