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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_i2c.c
4 * @author MCD Application Team
5 * @brief I2C LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35 #if defined(USE_FULL_LL_DRIVER)
36
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f4xx_ll_i2c.h"
39 #include "stm32f4xx_ll_bus.h"
40 #include "stm32f4xx_ll_rcc.h"
41 #ifdef USE_FULL_ASSERT
42 #include "stm32_assert.h"
43 #else
44 #define assert_param(expr) ((void)0U)
45 #endif
46
47 /** @addtogroup STM32F4xx_LL_Driver
48 * @{
49 */
50
51 #if defined (I2C1) || defined (I2C2) || defined (I2C3)
52
53 /** @defgroup I2C_LL I2C
54 * @{
55 */
56
57 /* Private types -------------------------------------------------------------*/
58 /* Private variables ---------------------------------------------------------*/
59 /* Private constants ---------------------------------------------------------*/
60 /* Private macros ------------------------------------------------------------*/
61 /** @addtogroup I2C_LL_Private_Macros
62 * @{
63 */
64
65 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
66 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
67 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
68 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
69
70 #define IS_LL_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST))
71
72 #define IS_LL_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \
73 ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9))
74
75 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
76 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
77 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
78
79 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
80
81 #endif
82 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
83
84 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
85 ((__VALUE__) == LL_I2C_NACK))
86
87 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
88 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
89 /**
90 * @}
91 */
92
93 /* Private function prototypes -----------------------------------------------*/
94
95 /* Exported functions --------------------------------------------------------*/
96 /** @addtogroup I2C_LL_Exported_Functions
97 * @{
98 */
99
100 /** @addtogroup I2C_LL_EF_Init
101 * @{
102 */
103
104 /**
105 * @brief De-initialize the I2C registers to their default reset values.
106 * @param I2Cx I2C Instance.
107 * @retval An ErrorStatus enumeration value:
108 * - SUCCESS: I2C registers are de-initialized
109 * - ERROR: I2C registers are not de-initialized
110 */
111 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
112 {
113 ErrorStatus status = SUCCESS;
114
115 /* Check the I2C Instance I2Cx */
116 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
117
118 if (I2Cx == I2C1)
119 {
120 /* Force reset of I2C clock */
121 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
122
123 /* Release reset of I2C clock */
124 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
125 }
126 else if (I2Cx == I2C2)
127 {
128 /* Force reset of I2C clock */
129 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
130
131 /* Release reset of I2C clock */
132 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
133
134 }
135 #if defined(I2C3)
136 else if (I2Cx == I2C3)
137 {
138 /* Force reset of I2C clock */
139 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
140
141 /* Release reset of I2C clock */
142 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
143 }
144 #endif
145 else
146 {
147 status = ERROR;
148 }
149
150 return status;
151 }
152
153 /**
154 * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
155 * @param I2Cx I2C Instance.
156 * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
157 * @retval An ErrorStatus enumeration value:
158 * - SUCCESS: I2C registers are initialized
159 * - ERROR: Not applicable
160 */
161 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
162 {
163 LL_RCC_ClocksTypeDef rcc_clocks;
164
165 /* Check the I2C Instance I2Cx */
166 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
167
168 /* Check the I2C parameters from I2C_InitStruct */
169 assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
170 assert_param(IS_LL_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed));
171 assert_param(IS_LL_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle));
172 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
173 assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
174 assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
175 #endif
176 assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
177 assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
178 assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
179
180 /* Disable the selected I2Cx Peripheral */
181 LL_I2C_Disable(I2Cx);
182
183 /* Retrieve Clock frequencies */
184 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
185
186 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
187 /*---------------------------- I2Cx FLTR Configuration -----------------------
188 * Configure the analog and digital noise filters with parameters :
189 * - AnalogFilter: I2C_FLTR_ANFOFF bit
190 * - DigitalFilter: I2C_FLTR_DNF[3:0] bits
191 */
192 LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
193
194 #endif
195 /*---------------------------- I2Cx SCL Clock Speed Configuration ------------
196 * Configure the SCL speed :
197 * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS,
198 * and I2C_CCR_CCR[11:0] bits
199 * - DutyCycle: I2C_CCR_DUTY[7:0] bits
200 */
201 LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle);
202
203 /*---------------------------- I2Cx OAR1 Configuration -----------------------
204 * Disable, Configure and Enable I2Cx device own address 1 with parameters :
205 * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits
206 * - OwnAddrSize: I2C_OAR1_ADDMODE bit
207 */
208 LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
209
210 /*---------------------------- I2Cx MODE Configuration -----------------------
211 * Configure I2Cx peripheral mode with parameter :
212 * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits
213 */
214 LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
215
216 /* Enable the selected I2Cx Peripheral */
217 LL_I2C_Enable(I2Cx);
218
219 /*---------------------------- I2Cx CR2 Configuration ------------------------
220 * Configure the ACKnowledge or Non ACKnowledge condition
221 * after the address receive match code or next received byte with parameter :
222 * - TypeAcknowledge: I2C_CR2_NACK bit
223 */
224 LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
225
226 return SUCCESS;
227 }
228
229 /**
230 * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
231 * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
232 * @retval None
233 */
234 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
235 {
236 /* Set I2C_InitStruct fields to default values */
237 I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
238 I2C_InitStruct->ClockSpeed = 5000U;
239 I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2;
240 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
241 I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
242 I2C_InitStruct->DigitalFilter = 0U;
243 #endif
244 I2C_InitStruct->OwnAddress1 = 0U;
245 I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
246 I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
247 }
248
249 /**
250 * @}
251 */
252
253 /**
254 * @}
255 */
256
257 /**
258 * @}
259 */
260
261 #endif /* I2C1 || I2C2 || I2C3 */
262
263 /**
264 * @}
265 */
266
267 #endif /* USE_FULL_LL_DRIVER */
268
269 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/