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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_spdifrx.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the SPDIFRX audio interface:
7 * + Initialization and Configuration
8 * + Data transfers functions
9 * + DMA transfers management
10 * + Interrupts and flags management
11 @verbatim
12 ===============================================================================
13 ##### How to use this driver #####
14 ===============================================================================
15 [..]
16 The SPDIFRX HAL driver can be used as follow:
17
18 (#) Declare SPDIFRX_HandleTypeDef handle structure.
19 (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
20 (##) Enable the SPDIFRX interface clock.
21 (##) SPDIFRX pins configuration:
22 (+++) Enable the clock for the SPDIFRX GPIOs.
23 (+++) Configure these SPDIFRX pins as alternate function pull-up.
24 (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
25 (+++) Configure the SPDIFRX interrupt priority.
26 (+++) Enable the NVIC SPDIFRX IRQ handle.
27 (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
28 (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
29 (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
30 (+++) Enable the DMAx interface clock.
31 (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
32 (+++) Configure the DMA Channel.
33 (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
34 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
35 DMA CtrlRx/DataRx channel.
36
37 (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
38 using HAL_SPDIFRX_Init() function.
39
40 -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
41 __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
42 -@- Make sure that ck_spdif clock is configured.
43
44 (#) Three operation modes are available within this driver :
45
46 *** Polling mode for reception operation (for debug purpose) ***
47 ================================================================
48 [..]
49 (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
50 (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
51
52 *** Interrupt mode for reception operation ***
53 =========================================
54 [..]
55 (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
56 (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
57 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
58 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
59 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
60 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
61 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
62 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
63
64 *** DMA mode for reception operation ***
65 ========================================
66 [..]
67 (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
68 (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
69 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
70 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
71 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
73 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
74 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
75 (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
76
77 *** SPDIFRX HAL driver macros list ***
78 =============================================
79 [..]
80 Below the list of most used macros in SPDIFRX HAL driver.
81 (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
82 (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
83 (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
84 (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
85 (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
86 (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
87
88 [..]
89 (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
90
91 @endverbatim
92 ******************************************************************************
93 * @attention
94 *
95 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
96 *
97 * Redistribution and use in source and binary forms, with or without modification,
98 * are permitted provided that the following conditions are met:
99 * 1. Redistributions of source code must retain the above copyright notice,
100 * this list of conditions and the following disclaimer.
101 * 2. Redistributions in binary form must reproduce the above copyright notice,
102 * this list of conditions and the following disclaimer in the documentation
103 * and/or other materials provided with the distribution.
104 * 3. Neither the name of STMicroelectronics nor the names of its contributors
105 * may be used to endorse or promote products derived from this software
106 * without specific prior written permission.
107 *
108 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
109 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
110 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
111 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
112 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
113 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
114 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
115 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
116 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
117 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
118 *
119 ******************************************************************************
120 */
121
122 /* Includes ------------------------------------------------------------------*/
123 #include "stm32f4xx_hal.h"
124
125 /** @addtogroup STM32F4xx_HAL_Driver
126 * @{
127 */
128 /** @defgroup SPDIFRX SPDIFRX
129 * @brief SPDIFRX HAL module driver
130 * @{
131 */
132
133 #ifdef HAL_SPDIFRX_MODULE_ENABLED
134
135 #if defined(STM32F446xx)
136
137 /* Private typedef -----------------------------------------------------------*/
138 /* Private define ------------------------------------------------------------*/
139 #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
140
141 /* Private macro -------------------------------------------------------------*/
142 /* Private variables ---------------------------------------------------------*/
143 /* Private function prototypes -----------------------------------------------*/
144
145 /** @addtogroup SPDIFRX_Private_Functions
146 * @{
147 */
148 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
149 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
150 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
151 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
152 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
153 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
154 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
155 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
156
157 /**
158 * @}
159 */
160 /* Exported functions ---------------------------------------------------------*/
161
162 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
163 * @{
164 */
165
166 /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
167 * @brief Initialization and Configuration functions
168 *
169 @verbatim
170 ===============================================================================
171 ##### Initialization and de-initialization functions #####
172 ===============================================================================
173 [..] This subsection provides a set of functions allowing to initialize and
174 de-initialize the SPDIFRX peripheral:
175
176 (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
177 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
178
179 (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
180 the selected configuration:
181 (++) Input Selection (IN0, IN1,...)
182 (++) Maximum allowed re-tries during synchronization phase
183 (++) Wait for activity on SPDIF selected input
184 (++) Channel status selection (from channel A or B)
185 (++) Data format (LSB, MSB, ...)
186 (++) Stereo mode
187 (++) User bits masking (PT,C,U,V,...)
188
189 (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
190 of the selected SPDIFRXx peripheral.
191 @endverbatim
192 * @{
193 */
194
195 /**
196 * @brief Initializes the SPDIFRX according to the specified parameters
197 * in the SPDIFRX_InitTypeDef and create the associated handle.
198 * @param hspdif SPDIFRX handle
199 * @retval HAL status
200 */
201 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
202 {
203 uint32_t tmpreg = 0U;
204
205 /* Check the SPDIFRX handle allocation */
206 if(hspdif == NULL)
207 {
208 return HAL_ERROR;
209 }
210
211 /* Check the SPDIFRX parameters */
212 assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
213 assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
214 assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
215 assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
216 assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
217 assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
218 assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
219 assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
220 assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
221 assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
222
223 if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
224 {
225 /* Allocate lock resource and initialize it */
226 hspdif->Lock = HAL_UNLOCKED;
227 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
228 HAL_SPDIFRX_MspInit(hspdif);
229 }
230
231 /* SPDIFRX peripheral state is BUSY*/
232 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
233
234 /* Disable SPDIFRX interface (IDLE State) */
235 __HAL_SPDIFRX_IDLE(hspdif);
236
237 /* Reset the old SPDIFRX CR configuration */
238 tmpreg = hspdif->Instance->CR;
239
240 tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
241 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
242 SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
243 SPDIFRX_CR_INSEL);
244
245 /* Sets the new configuration of the SPDIFRX peripheral */
246 tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
247 hspdif->Init.InputSelection |
248 hspdif->Init.Retries |
249 hspdif->Init.WaitForActivity |
250 hspdif->Init.ChannelSelection |
251 hspdif->Init.DataFormat |
252 hspdif->Init.PreambleTypeMask |
253 hspdif->Init.ChannelStatusMask |
254 hspdif->Init.ValidityBitMask |
255 hspdif->Init.ParityErrorMask);
256
257 hspdif->Instance->CR = tmpreg;
258
259 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
260
261 /* SPDIFRX peripheral state is READY*/
262 hspdif->State = HAL_SPDIFRX_STATE_READY;
263
264 return HAL_OK;
265 }
266
267 /**
268 * @brief DeInitializes the SPDIFRX peripheral
269 * @param hspdif SPDIFRX handle
270 * @retval HAL status
271 */
272 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
273 {
274 /* Check the SPDIFRX handle allocation */
275 if(hspdif == NULL)
276 {
277 return HAL_ERROR;
278 }
279
280 /* Check the parameters */
281 assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
282
283 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
284
285 /* Disable SPDIFRX interface (IDLE state) */
286 __HAL_SPDIFRX_IDLE(hspdif);
287
288 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
289 HAL_SPDIFRX_MspDeInit(hspdif);
290
291 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
292
293 /* SPDIFRX peripheral state is RESET*/
294 hspdif->State = HAL_SPDIFRX_STATE_RESET;
295
296 /* Release Lock */
297 __HAL_UNLOCK(hspdif);
298
299 return HAL_OK;
300 }
301
302 /**
303 * @brief SPDIFRX MSP Init
304 * @param hspdif SPDIFRX handle
305 * @retval None
306 */
307 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
308 {
309 /* Prevent unused argument(s) compilation warning */
310 UNUSED(hspdif);
311 /* NOTE : This function Should not be modified, when the callback is needed,
312 the HAL_SPDIFRX_MspInit could be implemented in the user file
313 */
314 }
315
316 /**
317 * @brief SPDIFRX MSP DeInit
318 * @param hspdif SPDIFRX handle
319 * @retval None
320 */
321 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
322 {
323 /* Prevent unused argument(s) compilation warning */
324 UNUSED(hspdif);
325 /* NOTE : This function Should not be modified, when the callback is needed,
326 the HAL_SPDIFRX_MspDeInit could be implemented in the user file
327 */
328 }
329
330 /**
331 * @brief Sets the SPDIFRX dtat format according to the specified parameters
332 * in the SPDIFRX_InitTypeDef.
333 * @param hspdif SPDIFRX handle
334 * @param sDataFormat SPDIFRX data format
335 * @retval HAL status
336 */
337 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
338 {
339 uint32_t tmpreg = 0U;
340
341 /* Check the SPDIFRX handle allocation */
342 if(hspdif == NULL)
343 {
344 return HAL_ERROR;
345 }
346
347 /* Check the SPDIFRX parameters */
348 assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
349 assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
350 assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
351 assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
352 assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
353 assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
354
355 /* Reset the old SPDIFRX CR configuration */
356 tmpreg = hspdif->Instance->CR;
357
358 if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
359 (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
360 ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
361 {
362 return HAL_ERROR;
363 }
364
365 tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
366 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
367
368 /* Sets the new configuration of the SPDIFRX peripheral */
369 tmpreg |= ((uint16_t) sDataFormat.StereoMode |
370 sDataFormat.DataFormat |
371 sDataFormat.PreambleTypeMask |
372 sDataFormat.ChannelStatusMask |
373 sDataFormat.ValidityBitMask |
374 sDataFormat.ParityErrorMask);
375
376 hspdif->Instance->CR = tmpreg;
377
378 return HAL_OK;
379 }
380
381 /**
382 * @}
383 */
384
385 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
386 * @brief Data transfers functions
387 *
388 @verbatim
389 ===============================================================================
390 ##### IO operation functions #####
391 ===============================================================================
392 [..]
393 This subsection provides a set of functions allowing to manage the SPDIFRX data
394 transfers.
395
396 (#) There is two mode of transfer:
397 (++) Blocking mode : The communication is performed in the polling mode.
398 The status of all data processing is returned by the same function
399 after finishing transfer.
400 (++) No-Blocking mode : The communication is performed using Interrupts
401 or DMA. These functions return the status of the transfer start-up.
402 The end of the data processing will be indicated through the
403 dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
404 using DMA mode.
405
406 (#) Blocking mode functions are :
407 (++) HAL_SPDIFRX_ReceiveDataFlow()
408 (++) HAL_SPDIFRX_ReceiveControlFlow()
409 (+@) Do not use blocking mode to receive both control and data flow at the same time.
410
411 (#) No-Blocking mode functions with Interrupt are :
412 (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
413 (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
414
415 (#) No-Blocking mode functions with DMA are :
416 (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
417 (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
418
419 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
420 (++) HAL_SPDIFRX_RxCpltCallback()
421 (++) HAL_SPDIFRX_ErrorCallback()
422
423 @endverbatim
424 * @{
425 */
426
427 /**
428 * @brief Receives an amount of data (Data Flow) in blocking mode.
429 * @param hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
430 * the configuration information for SPDIFRX module.
431 * @param pData Pointer to data buffer
432 * @param Size Amount of data to be received
433 * @param Timeout Timeout duration
434 * @retval HAL status
435 */
436 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
437 {
438 if((pData == NULL ) || (Size == 0))
439 {
440 return HAL_ERROR;
441 }
442
443 if(hspdif->State == HAL_SPDIFRX_STATE_READY)
444 {
445 /* Process Locked */
446 __HAL_LOCK(hspdif);
447
448 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
449
450 /* Start synchronisation */
451 __HAL_SPDIFRX_SYNC(hspdif);
452
453 /* Wait until SYNCD flag is set */
454 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
455 {
456 return HAL_TIMEOUT;
457 }
458
459 /* Start reception */
460 __HAL_SPDIFRX_RCV(hspdif);
461
462 /* Receive data flow */
463 while(Size > 0)
464 {
465 /* Wait until RXNE flag is set */
466 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
467 {
468 return HAL_TIMEOUT;
469 }
470
471 (*pData++) = hspdif->Instance->DR;
472 Size--;
473 }
474
475 /* SPDIFRX ready */
476 hspdif->State = HAL_SPDIFRX_STATE_READY;
477
478 /* Process Unlocked */
479 __HAL_UNLOCK(hspdif);
480
481 return HAL_OK;
482 }
483 else
484 {
485 return HAL_BUSY;
486 }
487 }
488
489 /**
490 * @brief Receives an amount of data (Control Flow) in blocking mode.
491 * @param hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
492 * the configuration information for SPDIFRX module.
493 * @param pData Pointer to data buffer
494 * @param Size Amount of data to be received
495 * @param Timeout Timeout duration
496 * @retval HAL status
497 */
498 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
499 {
500 if((pData == NULL ) || (Size == 0))
501 {
502 return HAL_ERROR;
503 }
504
505 if(hspdif->State == HAL_SPDIFRX_STATE_READY)
506 {
507 /* Process Locked */
508 __HAL_LOCK(hspdif);
509
510 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
511
512 /* Start synchronization */
513 __HAL_SPDIFRX_SYNC(hspdif);
514
515 /* Wait until SYNCD flag is set */
516 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
517 {
518 return HAL_TIMEOUT;
519 }
520
521 /* Start reception */
522 __HAL_SPDIFRX_RCV(hspdif);
523
524 /* Receive control flow */
525 while(Size > 0)
526 {
527 /* Wait until CSRNE flag is set */
528 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
529 {
530 return HAL_TIMEOUT;
531 }
532
533 (*pData++) = hspdif->Instance->CSR;
534 Size--;
535 }
536
537 /* SPDIFRX ready */
538 hspdif->State = HAL_SPDIFRX_STATE_READY;
539
540 /* Process Unlocked */
541 __HAL_UNLOCK(hspdif);
542
543 return HAL_OK;
544 }
545 else
546 {
547 return HAL_BUSY;
548 }
549 }
550 /**
551 * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
552 * @param hspdif SPDIFRX handle
553 * @param pData a 32-bit pointer to the Receive data buffer.
554 * @param Size number of data sample to be received .
555 * @retval HAL status
556 */
557 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
558 {
559 __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
560
561 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
562 {
563 if((pData == NULL) || (Size == 0))
564 {
565 return HAL_ERROR;
566 }
567
568 /* Process Locked */
569 __HAL_LOCK(hspdif);
570
571 hspdif->pRxBuffPtr = pData;
572 hspdif->RxXferSize = Size;
573 hspdif->RxXferCount = Size;
574
575 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
576
577 /* Check if a receive process is ongoing or not */
578 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
579
580 /* Enable the SPDIFRX PE Error Interrupt */
581 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
582
583 /* Enable the SPDIFRX OVR Error Interrupt */
584 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
585
586 /* Process Unlocked */
587 __HAL_UNLOCK(hspdif);
588
589 /* Enable the SPDIFRX RXNE interrupt */
590 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
591
592 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
593 {
594 /* Start synchronization */
595 __HAL_SPDIFRX_SYNC(hspdif);
596
597 /* Wait until SYNCD flag is set */
598 do
599 {
600 if (count-- == 0U)
601 {
602 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
603 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
604 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
605 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
606 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
607 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
608 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
609 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
610
611 hspdif->State= HAL_SPDIFRX_STATE_READY;
612
613 /* Process Unlocked */
614 __HAL_UNLOCK(hspdif);
615
616 return HAL_TIMEOUT;
617 }
618 }
619 while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
620
621 /* Start reception */
622 __HAL_SPDIFRX_RCV(hspdif);
623 }
624
625 return HAL_OK;
626 }
627 else
628 {
629 return HAL_BUSY;
630 }
631 }
632
633 /**
634 * @brief Receive an amount of data (Control Flow) with Interrupt
635 * @param hspdif SPDIFRX handle
636 * @param pData a 32-bit pointer to the Receive data buffer.
637 * @param Size number of data sample (Control Flow) to be received :
638 * @retval HAL status
639 */
640 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
641 {
642 __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
643
644 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
645 {
646 if((pData == NULL ) || (Size == 0))
647 {
648 return HAL_ERROR;
649 }
650
651 /* Process Locked */
652 __HAL_LOCK(hspdif);
653
654 hspdif->pCsBuffPtr = pData;
655 hspdif->CsXferSize = Size;
656 hspdif->CsXferCount = Size;
657
658 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
659
660 /* Check if a receive process is ongoing or not */
661 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
662
663 /* Enable the SPDIFRX PE Error Interrupt */
664 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
665
666 /* Enable the SPDIFRX OVR Error Interrupt */
667 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
668
669 /* Process Unlocked */
670 __HAL_UNLOCK(hspdif);
671
672 /* Enable the SPDIFRX CSRNE interrupt */
673 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
674
675 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
676 {
677 /* Start synchronization */
678 __HAL_SPDIFRX_SYNC(hspdif);
679
680 /* Wait until SYNCD flag is set */
681 do
682 {
683 if (count-- == 0U)
684 {
685 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
686 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
687 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
688 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
689 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
690 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
691 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
692 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
693
694 hspdif->State= HAL_SPDIFRX_STATE_READY;
695
696 /* Process Unlocked */
697 __HAL_UNLOCK(hspdif);
698
699 return HAL_TIMEOUT;
700 }
701 }
702 while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
703
704 /* Start reception */
705 __HAL_SPDIFRX_RCV(hspdif);
706 }
707
708 return HAL_OK;
709 }
710 else
711 {
712 return HAL_BUSY;
713 }
714 }
715
716 /**
717 * @brief Receive an amount of data (Data Flow) mode with DMA
718 * @param hspdif SPDIFRX handle
719 * @param pData a 32-bit pointer to the Receive data buffer.
720 * @param Size number of data sample to be received :
721 * @retval HAL status
722 */
723 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
724 {
725 __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
726
727 if((pData == NULL) || (Size == 0))
728 {
729 return HAL_ERROR;
730 }
731
732 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
733 {
734 hspdif->pRxBuffPtr = pData;
735 hspdif->RxXferSize = Size;
736 hspdif->RxXferCount = Size;
737
738 /* Process Locked */
739 __HAL_LOCK(hspdif);
740
741 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
742 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
743
744 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
745 hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
746
747 /* Set the SPDIFRX Rx DMA transfer complete callback */
748 hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
749
750 /* Set the DMA error callback */
751 hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
752
753 /* Enable the DMA request */
754 HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
755
756 /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
757 hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
758
759 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
760 {
761 /* Start synchronization */
762 __HAL_SPDIFRX_SYNC(hspdif);
763
764 /* Wait until SYNCD flag is set */
765 do
766 {
767 if (count-- == 0U)
768 {
769 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
770 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
771 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
772 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
773 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
774 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
775 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
776 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
777
778 hspdif->State= HAL_SPDIFRX_STATE_READY;
779
780 /* Process Unlocked */
781 __HAL_UNLOCK(hspdif);
782
783 return HAL_TIMEOUT;
784 }
785 }
786 while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
787
788 /* Start reception */
789 __HAL_SPDIFRX_RCV(hspdif);
790 }
791
792 /* Process Unlocked */
793 __HAL_UNLOCK(hspdif);
794
795 return HAL_OK;
796 }
797 else
798 {
799 return HAL_BUSY;
800 }
801 }
802
803 /**
804 * @brief Receive an amount of data (Control Flow) with DMA
805 * @param hspdif SPDIFRX handle
806 * @param pData a 32-bit pointer to the Receive data buffer.
807 * @param Size number of data (Control Flow) sample to be received :
808 * @retval HAL status
809 */
810 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
811 {
812 __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
813
814 if((pData == NULL) || (Size == 0))
815 {
816 return HAL_ERROR;
817 }
818
819 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
820 {
821 hspdif->pCsBuffPtr = pData;
822 hspdif->CsXferSize = Size;
823 hspdif->CsXferCount = Size;
824
825 /* Process Locked */
826 __HAL_LOCK(hspdif);
827
828 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
829 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
830
831 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
832 hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
833
834 /* Set the SPDIFRX Rx DMA transfer complete callback */
835 hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
836
837 /* Set the DMA error callback */
838 hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
839
840 /* Enable the DMA request */
841 HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
842
843 /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
844 hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
845
846 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
847 {
848 /* Start synchronization */
849 __HAL_SPDIFRX_SYNC(hspdif);
850
851 /* Wait until SYNCD flag is set */
852 do
853 {
854 if (count-- == 0U)
855 {
856 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
857 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
858 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
859 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
860 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
861 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
862 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
863 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
864
865 hspdif->State= HAL_SPDIFRX_STATE_READY;
866
867 /* Process Unlocked */
868 __HAL_UNLOCK(hspdif);
869
870 return HAL_TIMEOUT;
871 }
872 }
873 while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
874
875 /* Start reception */
876 __HAL_SPDIFRX_RCV(hspdif);
877 }
878
879 /* Process Unlocked */
880 __HAL_UNLOCK(hspdif);
881
882 return HAL_OK;
883 }
884 else
885 {
886 return HAL_BUSY;
887 }
888 }
889
890 /**
891 * @brief stop the audio stream receive from the Media.
892 * @param hspdif SPDIFRX handle
893 * @retval None
894 */
895 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
896 {
897 /* Process Locked */
898 __HAL_LOCK(hspdif);
899
900 /* Disable the SPDIFRX DMA requests */
901 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
902 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
903
904 /* Disable the SPDIFRX DMA channel */
905 __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
906 __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
907
908 /* Disable SPDIFRX peripheral */
909 __HAL_SPDIFRX_IDLE(hspdif);
910
911 hspdif->State = HAL_SPDIFRX_STATE_READY;
912
913 /* Process Unlocked */
914 __HAL_UNLOCK(hspdif);
915
916 return HAL_OK;
917 }
918
919 /**
920 * @brief This function handles SPDIFRX interrupt request.
921 * @param hspdif SPDIFRX handle
922 * @retval HAL status
923 */
924 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
925 {
926 /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
927 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
928 {
929 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
930 SPDIFRX_ReceiveDataFlow_IT(hspdif);
931 }
932
933 /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
934 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
935 {
936 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
937 SPDIFRX_ReceiveControlFlow_IT(hspdif);
938 }
939
940 /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
941 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
942 {
943 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
944
945 /* Change the SPDIFRX error code */
946 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
947
948 /* the transfer is not stopped */
949 HAL_SPDIFRX_ErrorCallback(hspdif);
950 }
951
952 /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
953 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
954 {
955 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
956
957 /* Change the SPDIFRX error code */
958 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
959
960 /* the transfer is not stopped */
961 HAL_SPDIFRX_ErrorCallback(hspdif);
962 }
963 }
964
965 /**
966 * @brief Rx Transfer (Data flow) half completed callbacks
967 * @param hspdif SPDIFRX handle
968 * @retval None
969 */
970 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
971 {
972 /* Prevent unused argument(s) compilation warning */
973 UNUSED(hspdif);
974 /* NOTE : This function Should not be modified, when the callback is needed,
975 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
976 */
977 }
978
979 /**
980 * @brief Rx Transfer (Data flow) completed callbacks
981 * @param hspdif SPDIFRX handle
982 * @retval None
983 */
984 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
985 {
986 /* Prevent unused argument(s) compilation warning */
987 UNUSED(hspdif);
988 /* NOTE : This function Should not be modified, when the callback is needed,
989 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
990 */
991 }
992
993 /**
994 * @brief Rx (Control flow) Transfer half completed callbacks
995 * @param hspdif SPDIFRX handle
996 * @retval None
997 */
998 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
999 {
1000 /* Prevent unused argument(s) compilation warning */
1001 UNUSED(hspdif);
1002 /* NOTE : This function Should not be modified, when the callback is needed,
1003 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1004 */
1005 }
1006
1007 /**
1008 * @brief Rx Transfer (Control flow) completed callbacks
1009 * @param hspdif SPDIFRX handle
1010 * @retval None
1011 */
1012 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1013 {
1014 /* Prevent unused argument(s) compilation warning */
1015 UNUSED(hspdif);
1016 /* NOTE : This function Should not be modified, when the callback is needed,
1017 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1018 */
1019 }
1020
1021 /**
1022 * @brief SPDIFRX error callbacks
1023 * @param hspdif SPDIFRX handle
1024 * @retval None
1025 */
1026 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
1027 {
1028 /* Prevent unused argument(s) compilation warning */
1029 UNUSED(hspdif);
1030 /* NOTE : This function Should not be modified, when the callback is needed,
1031 the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
1032 */
1033 }
1034
1035 /**
1036 * @}
1037 */
1038
1039 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
1040 * @brief Peripheral State functions
1041 *
1042 @verbatim
1043 ===============================================================================
1044 ##### Peripheral State and Errors functions #####
1045 ===============================================================================
1046 [..]
1047 This subsection permit to get in run-time the status of the peripheral
1048 and the data flow.
1049
1050 @endverbatim
1051 * @{
1052 */
1053
1054 /**
1055 * @brief Return the SPDIFRX state
1056 * @param hspdif SPDIFRX handle
1057 * @retval HAL state
1058 */
1059 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
1060 {
1061 return hspdif->State;
1062 }
1063
1064 /**
1065 * @brief Return the SPDIFRX error code
1066 * @param hspdif SPDIFRX handle
1067 * @retval SPDIFRX Error Code
1068 */
1069 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
1070 {
1071 return hspdif->ErrorCode;
1072 }
1073
1074 /**
1075 * @}
1076 */
1077
1078 /**
1079 * @brief DMA SPDIFRX receive process (Data flow) complete callback
1080 * @param hdma DMA handle
1081 * @retval None
1082 */
1083 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1084 {
1085 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1086
1087 /* Disable Rx DMA Request */
1088 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1089 hspdif->RxXferCount = 0U;
1090
1091 hspdif->State = HAL_SPDIFRX_STATE_READY;
1092 HAL_SPDIFRX_RxCpltCallback(hspdif);
1093 }
1094
1095 /**
1096 * @brief DMA SPDIFRX receive process (Data flow) half complete callback
1097 * @param hdma DMA handle
1098 * @retval None
1099 */
1100 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1101 {
1102 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1103
1104 HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
1105 }
1106
1107 /**
1108 * @brief DMA SPDIFRX receive process (Control flow) complete callback
1109 * @param hdma DMA handle
1110 * @retval None
1111 */
1112 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1113 {
1114 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1115
1116 /* Disable Cb DMA Request */
1117 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1118 hspdif->CsXferCount = 0U;
1119
1120 hspdif->State = HAL_SPDIFRX_STATE_READY;
1121 HAL_SPDIFRX_CxCpltCallback(hspdif);
1122 }
1123
1124 /**
1125 * @brief DMA SPDIFRX receive process (Control flow) half complete callback
1126 * @param hdma DMA handle
1127 * @retval None
1128 */
1129 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1130 {
1131 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1132
1133 HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
1134 }
1135
1136 /**
1137 * @brief DMA SPDIFRX communication error callback
1138 * @param hdma DMA handle
1139 * @retval None
1140 */
1141 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1142 {
1143 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1144
1145 /* Disable Rx and Cb DMA Request */
1146 hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1147 hspdif->RxXferCount = 0U;
1148
1149 hspdif->State= HAL_SPDIFRX_STATE_READY;
1150
1151 /* Set the error code and execute error callback*/
1152 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1153 HAL_SPDIFRX_ErrorCallback(hspdif);
1154 }
1155
1156 /**
1157 * @brief Receive an amount of data (Data Flow) with Interrupt
1158 * @param hspdif SPDIFRX handle
1159 * @retval None
1160 */
1161 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1162 {
1163 /* Receive data */
1164 (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
1165 hspdif->RxXferCount--;
1166
1167 if(hspdif->RxXferCount == 0U)
1168 {
1169 /* Disable RXNE/PE and OVR interrupts */
1170 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1171
1172 hspdif->State = HAL_SPDIFRX_STATE_READY;
1173
1174 /* Process Unlocked */
1175 __HAL_UNLOCK(hspdif);
1176
1177 HAL_SPDIFRX_RxCpltCallback(hspdif);
1178 }
1179 }
1180
1181 /**
1182 * @brief Receive an amount of data (Control Flow) with Interrupt
1183 * @param hspdif SPDIFRX handle
1184 * @retval None
1185 */
1186 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1187 {
1188 /* Receive data */
1189 (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
1190 hspdif->CsXferCount--;
1191
1192 if(hspdif->CsXferCount == 0U)
1193 {
1194 /* Disable CSRNE interrupt */
1195 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1196
1197 hspdif->State = HAL_SPDIFRX_STATE_READY;
1198
1199 /* Process Unlocked */
1200 __HAL_UNLOCK(hspdif);
1201
1202 HAL_SPDIFRX_CxCpltCallback(hspdif);
1203 }
1204 }
1205
1206 /**
1207 * @brief This function handles SPDIFRX Communication Timeout.
1208 * @param hspdif SPDIFRX handle
1209 * @param Flag Flag checked
1210 * @param Status Value of the flag expected
1211 * @param Timeout Duration of the timeout
1212 * @retval HAL status
1213 */
1214 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
1215 {
1216 uint32_t tickstart = 0U;
1217
1218 /* Get tick */
1219 tickstart = HAL_GetTick();
1220
1221 /* Wait until flag is set */
1222 if(Status == RESET)
1223 {
1224 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
1225 {
1226 /* Check for the Timeout */
1227 if(Timeout != HAL_MAX_DELAY)
1228 {
1229 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1230 {
1231 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1232 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1233 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1234 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1235 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1236 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1237 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1238 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1239
1240 hspdif->State= HAL_SPDIFRX_STATE_READY;
1241
1242 /* Process Unlocked */
1243 __HAL_UNLOCK(hspdif);
1244
1245 return HAL_TIMEOUT;
1246 }
1247 }
1248 }
1249 }
1250 else
1251 {
1252 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
1253 {
1254 /* Check for the Timeout */
1255 if(Timeout != HAL_MAX_DELAY)
1256 {
1257 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1258 {
1259 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1260 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1261 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1262 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1263 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1264 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1265 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1266 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1267
1268 hspdif->State= HAL_SPDIFRX_STATE_READY;
1269
1270 /* Process Unlocked */
1271 __HAL_UNLOCK(hspdif);
1272
1273 return HAL_TIMEOUT;
1274 }
1275 }
1276 }
1277 }
1278 return HAL_OK;
1279 }
1280
1281 /**
1282 * @}
1283 */
1284 #endif /* STM32F446xx */
1285
1286 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
1287 /**
1288 * @}
1289 */
1290
1291 /**
1292 * @}
1293 */
1294
1295 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1296