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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sai_ex.c
4 * @author MCD Application Team
5 * @brief SAI Extension HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of SAI extension peripheral:
8 * + Extension features functions
9 *
10 @verbatim
11 ==============================================================================
12 ##### SAI peripheral extension features #####
13 ==============================================================================
14
15 [..] Comparing to other previous devices, the SAI interface for STM32F446xx
16 devices contains the following additional features :
17
18 (+) Possibility to be clocked from PLLR
19
20 ##### How to use this driver #####
21 ==============================================================================
22 [..] This driver provides functions to manage several sources to clock SAI
23
24 @endverbatim
25 ******************************************************************************
26 * @attention
27 *
28 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
29 *
30 * Redistribution and use in source and binary forms, with or without modification,
31 * are permitted provided that the following conditions are met:
32 * 1. Redistributions of source code must retain the above copyright notice,
33 * this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright notice,
35 * this list of conditions and the following disclaimer in the documentation
36 * and/or other materials provided with the distribution.
37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
38 * may be used to endorse or promote products derived from this software
39 * without specific prior written permission.
40 *
41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 *
52 ******************************************************************************
53 */
54
55 /* Includes ------------------------------------------------------------------*/
56 #include "stm32f4xx_hal.h"
57
58 /** @addtogroup STM32F4xx_HAL_Driver
59 * @{
60 */
61
62 /** @defgroup SAIEx SAIEx
63 * @brief SAI Extension HAL module driver
64 * @{
65 */
66
67 #ifdef HAL_SAI_MODULE_ENABLED
68
69 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
70 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \
71 defined(STM32F423xx)
72
73 /* Private typedef -----------------------------------------------------------*/
74 /* Private define ------------------------------------------------------------*/
75 /* SAI registers Masks */
76 /* Private macro -------------------------------------------------------------*/
77 /* Private variables ---------------------------------------------------------*/
78 /* Private function prototypes -----------------------------------------------*/
79 /* Private functions ---------------------------------------------------------*/
80
81 /** @defgroup SAI_Private_Functions SAI Private Functions
82 * @{
83 */
84 /**
85 * @}
86 */
87
88 /* Exported functions --------------------------------------------------------*/
89 /** @defgroup SAIEx_Exported_Functions SAI Extended Exported Functions
90 * @{
91 */
92
93 /** @defgroup SAIEx_Exported_Functions_Group1 Extension features functions
94 * @brief Extension features functions
95 *
96 @verbatim
97 ===============================================================================
98 ##### Extension features Functions #####
99 ===============================================================================
100 [..]
101 This subsection provides a set of functions allowing to manage the possible
102 SAI clock sources.
103
104 @endverbatim
105 * @{
106 */
107
108 /**
109 * @brief Configure SAI Block synchronization mode
110 * @param hsai pointer to a SAI_HandleTypeDef structure that contains
111 * the configuration information for SAI module.
112 * @retval SAI Clock Input
113 */
114 void SAI_BlockSynchroConfig(SAI_HandleTypeDef *hsai)
115 {
116 uint32_t tmpregisterGCR = 0U;
117
118 #if defined(STM32F446xx)
119 /* This setting must be done with both audio block (A & B) disabled */
120 switch(hsai->Init.SynchroExt)
121 {
122 case SAI_SYNCEXT_DISABLE :
123 tmpregisterGCR = 0U;
124 break;
125 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
126 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
127 break;
128 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
129 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
130 break;
131 default:
132 break;
133 }
134
135 if((hsai->Init.Synchro) == SAI_SYNCHRONOUS_EXT_SAI2)
136 {
137 tmpregisterGCR |= SAI_GCR_SYNCIN_0;
138 }
139
140 if((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
141 {
142 SAI1->GCR = tmpregisterGCR;
143 }
144 else
145 {
146 SAI2->GCR = tmpregisterGCR;
147 }
148 #endif /* STM32F446xx */
149 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
150 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
151 /* This setting must be done with both audio block (A & B) disabled */
152 switch(hsai->Init.SynchroExt)
153 {
154 case SAI_SYNCEXT_DISABLE :
155 tmpregisterGCR = 0U;
156 break;
157 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
158 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
159 break;
160 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
161 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
162 break;
163 default:
164 break;
165 }
166 SAI1->GCR = tmpregisterGCR;
167 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
168 }
169 /**
170 * @brief Get SAI Input Clock based on SAI source clock selection
171 * @param hsai pointer to a SAI_HandleTypeDef structure that contains
172 * the configuration information for SAI module.
173 * @retval SAI Clock Input
174 */
175 uint32_t SAI_GetInputClock(SAI_HandleTypeDef *hsai)
176 {
177 /* This variable used to store the SAI_CK_x (value in Hz) */
178 uint32_t saiclocksource = 0U;
179
180 #if defined(STM32F446xx)
181 if ((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
182 {
183 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1);
184 }
185 else /* SAI2_Block_A || SAI2_Block_B*/
186 {
187 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI2);
188 }
189 #endif /* STM32F446xx */
190 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
191 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
192 uint32_t vcoinput = 0U, tmpreg = 0U;
193
194 /* Check the SAI Block parameters */
195 assert_param(IS_SAI_CLK_SOURCE(hsai->Init.ClockSource));
196
197 /* SAI Block clock source selection */
198 if(hsai->Instance == SAI1_Block_A)
199 {
200 __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(hsai->Init.ClockSource);
201 }
202 else
203 {
204 __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG((uint32_t)(hsai->Init.ClockSource << 2U));
205 }
206
207 /* VCO Input Clock value calculation */
208 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
209 {
210 /* In Case the PLL Source is HSI (Internal Clock) */
211 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
212 }
213 else
214 {
215 /* In Case the PLL Source is HSE (External Clock) */
216 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
217 }
218 #if defined(STM32F413xx) || defined(STM32F423xx)
219 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
220 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLR)
221 {
222 /* Configure the PLLI2S division factor */
223 /* PLL_VCO Input = PLL_SOURCE/PLLM */
224 /* PLL_VCO Output = PLL_VCO Input * PLLN */
225 /* SAI_CLK(first level) = PLL_VCO Output/PLLR */
226 tmpreg = (RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U;
227 saiclocksource = (vcoinput * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U))/(tmpreg);
228
229 /* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
230 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLDIVR) >> 8U) + 1U);
231
232 saiclocksource = saiclocksource/(tmpreg);
233
234 }
235 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
236 {
237 /* Configure the PLLI2S division factor */
238 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
239 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
240 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */
241 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U;
242 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
243
244 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVR */
245 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVR) + 1U);
246 saiclocksource = saiclocksource/(tmpreg);
247 }
248 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_HS)
249 {
250 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
251 {
252 /* Get the I2S source clock value */
253 saiclocksource = (uint32_t)(HSE_VALUE);
254 }
255 else
256 {
257 /* Get the I2S source clock value */
258 saiclocksource = (uint32_t)(HSI_VALUE);
259 }
260 }
261 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
262 {
263 saiclocksource = EXTERNAL_CLOCK_VALUE;
264 }
265 #else
266 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
267 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLSAI)
268 {
269 /* Configure the PLLI2S division factor */
270 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
271 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
272 /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
273 tmpreg = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24U;
274 saiclocksource = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6U))/(tmpreg);
275
276 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
277 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> 8U) + 1U);
278 saiclocksource = saiclocksource/(tmpreg);
279
280 }
281 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
282 {
283 /* Configure the PLLI2S division factor */
284 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
285 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
286 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
287 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24U;
288 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
289
290 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
291 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) + 1U);
292 saiclocksource = saiclocksource/(tmpreg);
293 }
294 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
295 {
296 /* Enable the External Clock selection */
297 __HAL_RCC_I2S_CONFIG(RCC_I2SCLKSOURCE_EXT);
298
299 saiclocksource = EXTERNAL_CLOCK_VALUE;
300 }
301 #endif /* STM32F413xx || STM32F423xx */
302 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
303 /* the return result is the value of SAI clock */
304 return saiclocksource;
305 }
306
307 /**
308 * @}
309 */
310
311 /**
312 * @}
313 */
314
315 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
316 #endif /* HAL_SAI_MODULE_ENABLED */
317 /**
318 * @}
319 */
320
321 /**
322 * @}
323 */
324
325 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/