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Added current STM32 standandard libraries in version independend folder structure
author | Ideenmodellierer |
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date | Sun, 17 Feb 2019 21:12:22 +0100 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_iwdg.c | |
4 * @author MCD Application Team | |
5 * @brief IWDG HAL module driver. | |
6 * This file provides firmware functions to manage the following | |
7 * functionalities of the Independent Watchdog (IWDG) peripheral: | |
8 * + Initialization and Start functions | |
9 * + IO operation functions | |
10 * | |
11 @verbatim | |
12 ============================================================================== | |
13 ##### IWDG Generic features ##### | |
14 ============================================================================== | |
15 [..] | |
16 (+) The IWDG can be started by either software or hardware (configurable | |
17 through option byte). | |
18 | |
19 (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even | |
20 if the main clock fails. | |
21 | |
22 (+) Once the IWDG is started, the LSI is forced ON and both can not be | |
23 disabled. The counter starts counting down from the reset value (0xFFF). | |
24 When it reaches the end of count value (0x000) a reset signal is | |
25 generated (IWDG reset). | |
26 | |
27 (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, | |
28 the IWDG_RLR value is reloaded in the counter and the watchdog reset is | |
29 prevented. | |
30 | |
31 (+) The IWDG is implemented in the VDD voltage domain that is still functional | |
32 in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY). | |
33 IWDGRST flag in RCC_CSR register can be used to inform when an IWDG | |
34 reset occurs. | |
35 | |
36 (+) Debug mode : When the microcontroller enters debug mode (core halted), | |
37 the IWDG counter either continues to work normally or stops, depending | |
38 on DBG_IWDG_STOP configuration bit in DBG module, accessible through | |
39 __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros | |
40 | |
41 [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s | |
42 The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx | |
43 devices provide the capability to measure the LSI frequency (LSI clock | |
44 connected internally to TIM5 CH4 input capture). The measured value | |
45 can be used to have an IWDG timeout with an acceptable accuracy. | |
46 | |
47 ##### How to use this driver ##### | |
48 ============================================================================== | |
49 [..] | |
50 (#) Use IWDG using HAL_IWDG_Init() function to : | |
51 (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI | |
52 clock is forced ON and IWDG counter starts downcounting. | |
53 (++) Enable write access to configuration register: IWDG_PR & IWDG_RLR. | |
54 (++) Configure the IWDG prescaler and counter reload value. This reload | |
55 value will be loaded in the IWDG counter each time the watchdog is | |
56 reloaded, then the IWDG will start counting down from this value. | |
57 (++) wait for status flags to be reset" | |
58 | |
59 (#) Then the application program must refresh the IWDG counter at regular | |
60 intervals during normal operation to prevent an MCU reset, using | |
61 HAL_IWDG_Refresh() function. | |
62 | |
63 *** IWDG HAL driver macros list *** | |
64 ==================================== | |
65 [..] | |
66 Below the list of most used macros in IWDG HAL driver: | |
67 (+) __HAL_IWDG_START: Enable the IWDG peripheral | |
68 (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in | |
69 the reload register | |
70 | |
71 @endverbatim | |
72 ****************************************************************************** | |
73 * @attention | |
74 * | |
75 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> | |
76 * | |
77 * Redistribution and use in source and binary forms, with or without modification, | |
78 * are permitted provided that the following conditions are met: | |
79 * 1. Redistributions of source code must retain the above copyright notice, | |
80 * this list of conditions and the following disclaimer. | |
81 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
82 * this list of conditions and the following disclaimer in the documentation | |
83 * and/or other materials provided with the distribution | |
84 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
85 * may be used to endorse or promote products derived from this software | |
86 * without specific prior written permission. | |
87 * | |
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
91 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
92 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
93 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
95 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
96 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
97 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
98 * | |
99 ****************************************************************************** | |
100 */ | |
101 | |
102 /* Includes ------------------------------------------------------------------*/ | |
103 #include "stm32f4xx_hal.h" | |
104 | |
105 /** @addtogroup STM32F4xx_HAL_Driver | |
106 * @{ | |
107 */ | |
108 | |
109 #ifdef HAL_IWDG_MODULE_ENABLED | |
110 /** @defgroup IWDG IWDG | |
111 * @brief IWDG HAL module driver. | |
112 * @{ | |
113 */ | |
114 | |
115 /* Private typedef -----------------------------------------------------------*/ | |
116 /* Private define ------------------------------------------------------------*/ | |
117 /** @defgroup IWDG_Private_Defines IWDG Private Defines | |
118 * @{ | |
119 */ | |
120 /* Status register need 5 RC LSI divided by prescaler clock to be updated. With | |
121 higher prescaler (256), and according to HSI variation, we need to wait at | |
122 least 6 cycles so 48 ms. */ | |
123 #define HAL_IWDG_DEFAULT_TIMEOUT 48U | |
124 /** | |
125 * @} | |
126 */ | |
127 | |
128 /* Private macro -------------------------------------------------------------*/ | |
129 /* Private variables ---------------------------------------------------------*/ | |
130 /* Private function prototypes -----------------------------------------------*/ | |
131 /* Exported functions --------------------------------------------------------*/ | |
132 | |
133 /** @addtogroup IWDG_Exported_Functions | |
134 * @{ | |
135 */ | |
136 | |
137 /** @addtogroup IWDG_Exported_Functions_Group1 | |
138 * @brief Initialization and Start functions. | |
139 * | |
140 @verbatim | |
141 =============================================================================== | |
142 ##### Initialization and Start functions ##### | |
143 =============================================================================== | |
144 [..] This section provides functions allowing to: | |
145 (+) Initialize the IWDG according to the specified parameters in the | |
146 IWDG_InitTypeDef of associated handle. | |
147 (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog | |
148 is reloaded in order to exit function with correct time base. | |
149 | |
150 @endverbatim | |
151 * @{ | |
152 */ | |
153 | |
154 /** | |
155 * @brief Initialize the IWDG according to the specified parameters in the | |
156 * IWDG_InitTypeDef and start watchdog. Before exiting function, | |
157 * watchdog is refreshed in order to have correct time base. | |
158 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains | |
159 * the configuration information for the specified IWDG module. | |
160 * @retval HAL status | |
161 */ | |
162 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) | |
163 { | |
164 uint32_t tickstart; | |
165 | |
166 /* Check the IWDG handle allocation */ | |
167 if(hiwdg == NULL) | |
168 { | |
169 return HAL_ERROR; | |
170 } | |
171 | |
172 /* Check the parameters */ | |
173 assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); | |
174 assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); | |
175 assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); | |
176 | |
177 /* Enable IWDG. LSI is turned on automaticaly */ | |
178 __HAL_IWDG_START(hiwdg); | |
179 | |
180 /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */ | |
181 IWDG_ENABLE_WRITE_ACCESS(hiwdg); | |
182 | |
183 /* Write to IWDG registers the Prescaler & Reload values to work with */ | |
184 hiwdg->Instance->PR = hiwdg->Init.Prescaler; | |
185 hiwdg->Instance->RLR = hiwdg->Init.Reload; | |
186 | |
187 /* Check pending flag, if previous update not done, return timeout */ | |
188 tickstart = HAL_GetTick(); | |
189 | |
190 /* Wait for register to be updated */ | |
191 while(hiwdg->Instance->SR != RESET) | |
192 { | |
193 if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT) | |
194 { | |
195 return HAL_TIMEOUT; | |
196 } | |
197 } | |
198 | |
199 /* Reload IWDG counter with value defined in the reload register */ | |
200 __HAL_IWDG_RELOAD_COUNTER(hiwdg); | |
201 | |
202 /* Return function status */ | |
203 return HAL_OK; | |
204 } | |
205 | |
206 /** | |
207 * @} | |
208 */ | |
209 | |
210 /** @addtogroup IWDG_Exported_Functions_Group2 | |
211 * @brief IO operation functions | |
212 * | |
213 @verbatim | |
214 =============================================================================== | |
215 ##### IO operation functions ##### | |
216 =============================================================================== | |
217 [..] This section provides functions allowing to: | |
218 (+) Refresh the IWDG. | |
219 | |
220 @endverbatim | |
221 * @{ | |
222 */ | |
223 | |
224 /** | |
225 * @brief Refresh the IWDG. | |
226 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains | |
227 * the configuration information for the specified IWDG module. | |
228 * @retval HAL status | |
229 */ | |
230 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) | |
231 { | |
232 /* Reload IWDG counter with value defined in the reload register */ | |
233 __HAL_IWDG_RELOAD_COUNTER(hiwdg); | |
234 | |
235 /* Return function status */ | |
236 return HAL_OK; | |
237 } | |
238 | |
239 /** | |
240 * @} | |
241 */ | |
242 | |
243 /** | |
244 * @} | |
245 */ | |
246 | |
247 #endif /* HAL_IWDG_MODULE_ENABLED */ | |
248 /** | |
249 * @} | |
250 */ | |
251 | |
252 /** | |
253 * @} | |
254 */ | |
255 | |
256 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |