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Added current STM32 standandard libraries in version independend folder structure
author | Ideenmodellierer |
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date | Sun, 17 Feb 2019 21:12:22 +0100 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_dac.c | |
4 * @author MCD Application Team | |
5 * @brief DAC HAL module driver. | |
6 * This file provides firmware functions to manage the following | |
7 * functionalities of the Digital to Analog Converter (DAC) peripheral: | |
8 * + Initialization and de-initialization functions | |
9 * + IO operation functions | |
10 * + Peripheral Control functions | |
11 * + Peripheral State and Errors functions | |
12 * | |
13 * | |
14 @verbatim | |
15 ============================================================================== | |
16 ##### DAC Peripheral features ##### | |
17 ============================================================================== | |
18 [..] | |
19 *** DAC Channels *** | |
20 ==================== | |
21 [..] | |
22 The device integrates two 12-bit Digital Analog Converters that can | |
23 be used independently or simultaneously (dual mode): | |
24 (#) DAC channel1 with DAC_OUT1 (PA4) as output | |
25 (#) DAC channel2 with DAC_OUT2 (PA5) as output | |
26 | |
27 *** DAC Triggers *** | |
28 ==================== | |
29 [..] | |
30 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE | |
31 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. | |
32 [..] | |
33 Digital to Analog conversion can be triggered by: | |
34 (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_TRIGGER_EXT_IT9. | |
35 The used pin (GPIOx_Pin9) must be configured in input mode. | |
36 | |
37 (#) Timers TRGO: TIM2, TIM4, TIM5, TIM6, TIM7 and TIM8 | |
38 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) | |
39 | |
40 (#) Software using DAC_TRIGGER_SOFTWARE | |
41 | |
42 *** DAC Buffer mode feature *** | |
43 =============================== | |
44 [..] | |
45 Each DAC channel integrates an output buffer that can be used to | |
46 reduce the output impedance, and to drive external loads directly | |
47 without having to add an external operational amplifier. | |
48 To enable, the output buffer use | |
49 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; | |
50 [..] | |
51 (@) Refer to the device datasheet for more details about output | |
52 impedance value with and without output buffer. | |
53 | |
54 *** DAC wave generation feature *** | |
55 =================================== | |
56 [..] | |
57 Both DAC channels can be used to generate | |
58 (#) Noise wave | |
59 (#) Triangle wave | |
60 | |
61 *** DAC data format *** | |
62 ======================= | |
63 [..] | |
64 The DAC data format can be: | |
65 (#) 8-bit right alignment using DAC_ALIGN_8B_R | |
66 (#) 12-bit left alignment using DAC_ALIGN_12B_L | |
67 (#) 12-bit right alignment using DAC_ALIGN_12B_R | |
68 | |
69 *** DAC data value to voltage correspondence *** | |
70 ================================================ | |
71 [..] | |
72 The analog output voltage on each DAC channel pin is determined | |
73 by the following equation: | |
74 DAC_OUTx = VREF+ * DOR / 4095 | |
75 with DOR is the Data Output Register | |
76 VEF+ is the input voltage reference (refer to the device datasheet) | |
77 e.g. To set DAC_OUT1 to 0.7V, use | |
78 Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V | |
79 | |
80 *** DMA requests *** | |
81 ===================== | |
82 [..] | |
83 A DMA1 request can be generated when an external trigger (but not | |
84 a software trigger) occurs if DMA1 requests are enabled using | |
85 HAL_DAC_Start_DMA() | |
86 [..] | |
87 DMA1 requests are mapped as following: | |
88 (#) DAC channel1 : mapped on DMA1 Stream5 channel7 which must be | |
89 already configured | |
90 (#) DAC channel2 : mapped on DMA1 Stream6 channel7 which must be | |
91 already configured | |
92 | |
93 -@- For Dual mode and specific signal (Triangle and noise) generation please | |
94 refer to Extension Features Driver description | |
95 | |
96 | |
97 ##### How to use this driver ##### | |
98 ============================================================================== | |
99 [..] | |
100 (+) DAC APB clock must be enabled to get write access to DAC | |
101 registers using HAL_DAC_Init() | |
102 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. | |
103 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. | |
104 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions | |
105 | |
106 *** Polling mode IO operation *** | |
107 ================================= | |
108 [..] | |
109 (+) Start the DAC peripheral using HAL_DAC_Start() | |
110 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. | |
111 (+) Stop the DAC peripheral using HAL_DAC_Stop() | |
112 | |
113 *** DMA mode IO operation *** | |
114 ============================== | |
115 [..] | |
116 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length | |
117 of data to be transferred at each end of conversion | |
118 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2() | |
119 function is executed and user can add his own code by customization of function pointer | |
120 HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2 | |
121 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can | |
122 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 | |
123 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() | |
124 | |
125 *** DAC HAL driver macros list *** | |
126 ============================================= | |
127 [..] | |
128 Below the list of most used macros in DAC HAL driver. | |
129 | |
130 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral | |
131 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral | |
132 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags | |
133 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status | |
134 | |
135 [..] | |
136 (@) You can refer to the DAC HAL driver header file for more useful macros | |
137 | |
138 @endverbatim | |
139 ****************************************************************************** | |
140 * @attention | |
141 * | |
142 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> | |
143 * | |
144 * Redistribution and use in source and binary forms, with or without modification, | |
145 * are permitted provided that the following conditions are met: | |
146 * 1. Redistributions of source code must retain the above copyright notice, | |
147 * this list of conditions and the following disclaimer. | |
148 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
149 * this list of conditions and the following disclaimer in the documentation | |
150 * and/or other materials provided with the distribution. | |
151 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
152 * may be used to endorse or promote products derived from this software | |
153 * without specific prior written permission. | |
154 * | |
155 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
156 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
157 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
158 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
159 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
160 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
161 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
162 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
163 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
164 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
165 * | |
166 ****************************************************************************** | |
167 */ | |
168 | |
169 | |
170 /* Includes ------------------------------------------------------------------*/ | |
171 #include "stm32f4xx_hal.h" | |
172 | |
173 /** @addtogroup STM32F4xx_HAL_Driver | |
174 * @{ | |
175 */ | |
176 | |
177 /** @defgroup DAC DAC | |
178 * @brief DAC driver modules | |
179 * @{ | |
180 */ | |
181 | |
182 #ifdef HAL_DAC_MODULE_ENABLED | |
183 | |
184 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ | |
185 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ | |
186 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\ | |
187 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx) | |
188 /* Private typedef -----------------------------------------------------------*/ | |
189 /* Private define ------------------------------------------------------------*/ | |
190 /* Private macro -------------------------------------------------------------*/ | |
191 /* Private variables ---------------------------------------------------------*/ | |
192 /** @addtogroup DAC_Private_Functions | |
193 * @{ | |
194 */ | |
195 /* Private function prototypes -----------------------------------------------*/ | |
196 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); | |
197 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); | |
198 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); | |
199 /** | |
200 * @} | |
201 */ | |
202 | |
203 /* Exported functions --------------------------------------------------------*/ | |
204 /** @defgroup DAC_Exported_Functions DAC Exported Functions | |
205 * @{ | |
206 */ | |
207 | |
208 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions | |
209 * @brief Initialization and Configuration functions | |
210 * | |
211 @verbatim | |
212 ============================================================================== | |
213 ##### Initialization and de-initialization functions ##### | |
214 ============================================================================== | |
215 [..] This section provides functions allowing to: | |
216 (+) Initialize and configure the DAC. | |
217 (+) De-initialize the DAC. | |
218 | |
219 @endverbatim | |
220 * @{ | |
221 */ | |
222 | |
223 /** | |
224 * @brief Initializes the DAC peripheral according to the specified parameters | |
225 * in the DAC_InitStruct. | |
226 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
227 * the configuration information for the specified DAC. | |
228 * @retval HAL status | |
229 */ | |
230 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) | |
231 { | |
232 /* Check DAC handle */ | |
233 if(hdac == NULL) | |
234 { | |
235 return HAL_ERROR; | |
236 } | |
237 /* Check the parameters */ | |
238 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); | |
239 | |
240 if(hdac->State == HAL_DAC_STATE_RESET) | |
241 { | |
242 /* Allocate lock resource and initialize it */ | |
243 hdac->Lock = HAL_UNLOCKED; | |
244 /* Init the low level hardware */ | |
245 HAL_DAC_MspInit(hdac); | |
246 } | |
247 | |
248 /* Initialize the DAC state*/ | |
249 hdac->State = HAL_DAC_STATE_BUSY; | |
250 | |
251 /* Set DAC error code to none */ | |
252 hdac->ErrorCode = HAL_DAC_ERROR_NONE; | |
253 | |
254 /* Initialize the DAC state*/ | |
255 hdac->State = HAL_DAC_STATE_READY; | |
256 | |
257 /* Return function status */ | |
258 return HAL_OK; | |
259 } | |
260 | |
261 /** | |
262 * @brief Deinitializes the DAC peripheral registers to their default reset values. | |
263 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
264 * the configuration information for the specified DAC. | |
265 * @retval HAL status | |
266 */ | |
267 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) | |
268 { | |
269 /* Check DAC handle */ | |
270 if(hdac == NULL) | |
271 { | |
272 return HAL_ERROR; | |
273 } | |
274 | |
275 /* Check the parameters */ | |
276 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); | |
277 | |
278 /* Change DAC state */ | |
279 hdac->State = HAL_DAC_STATE_BUSY; | |
280 | |
281 /* DeInit the low level hardware */ | |
282 HAL_DAC_MspDeInit(hdac); | |
283 | |
284 /* Set DAC error code to none */ | |
285 hdac->ErrorCode = HAL_DAC_ERROR_NONE; | |
286 | |
287 /* Change DAC state */ | |
288 hdac->State = HAL_DAC_STATE_RESET; | |
289 | |
290 /* Release Lock */ | |
291 __HAL_UNLOCK(hdac); | |
292 | |
293 /* Return function status */ | |
294 return HAL_OK; | |
295 } | |
296 | |
297 /** | |
298 * @brief Initializes the DAC MSP. | |
299 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
300 * the configuration information for the specified DAC. | |
301 * @retval None | |
302 */ | |
303 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) | |
304 { | |
305 /* Prevent unused argument(s) compilation warning */ | |
306 UNUSED(hdac); | |
307 /* NOTE : This function Should not be modified, when the callback is needed, | |
308 the HAL_DAC_MspInit could be implemented in the user file | |
309 */ | |
310 } | |
311 | |
312 /** | |
313 * @brief DeInitializes the DAC MSP. | |
314 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
315 * the configuration information for the specified DAC. | |
316 * @retval None | |
317 */ | |
318 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) | |
319 { | |
320 /* Prevent unused argument(s) compilation warning */ | |
321 UNUSED(hdac); | |
322 /* NOTE : This function Should not be modified, when the callback is needed, | |
323 the HAL_DAC_MspDeInit could be implemented in the user file | |
324 */ | |
325 } | |
326 | |
327 /** | |
328 * @} | |
329 */ | |
330 | |
331 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions | |
332 * @brief IO operation functions | |
333 * | |
334 @verbatim | |
335 ============================================================================== | |
336 ##### IO operation functions ##### | |
337 ============================================================================== | |
338 [..] This section provides functions allowing to: | |
339 (+) Start conversion. | |
340 (+) Stop conversion. | |
341 (+) Start conversion and enable DMA transfer. | |
342 (+) Stop conversion and disable DMA transfer. | |
343 (+) Get result of conversion. | |
344 | |
345 @endverbatim | |
346 * @{ | |
347 */ | |
348 | |
349 /** | |
350 * @brief Enables DAC and starts conversion of channel. | |
351 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
352 * the configuration information for the specified DAC. | |
353 * @param Channel The selected DAC channel. | |
354 * This parameter can be one of the following values: | |
355 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
356 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
357 * @retval HAL status | |
358 */ | |
359 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) | |
360 { | |
361 uint32_t tmp1 = 0U, tmp2 = 0U; | |
362 | |
363 /* Check the parameters */ | |
364 assert_param(IS_DAC_CHANNEL(Channel)); | |
365 | |
366 /* Process locked */ | |
367 __HAL_LOCK(hdac); | |
368 | |
369 /* Change DAC state */ | |
370 hdac->State = HAL_DAC_STATE_BUSY; | |
371 | |
372 /* Enable the Peripheral */ | |
373 __HAL_DAC_ENABLE(hdac, Channel); | |
374 | |
375 if(Channel == DAC_CHANNEL_1) | |
376 { | |
377 tmp1 = hdac->Instance->CR & DAC_CR_TEN1; | |
378 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1; | |
379 /* Check if software trigger enabled */ | |
380 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1)) | |
381 { | |
382 /* Enable the selected DAC software conversion */ | |
383 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1; | |
384 } | |
385 } | |
386 else | |
387 { | |
388 tmp1 = hdac->Instance->CR & DAC_CR_TEN2; | |
389 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2; | |
390 /* Check if software trigger enabled */ | |
391 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2)) | |
392 { | |
393 /* Enable the selected DAC software conversion*/ | |
394 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2; | |
395 } | |
396 } | |
397 | |
398 /* Change DAC state */ | |
399 hdac->State = HAL_DAC_STATE_READY; | |
400 | |
401 /* Process unlocked */ | |
402 __HAL_UNLOCK(hdac); | |
403 | |
404 /* Return function status */ | |
405 return HAL_OK; | |
406 } | |
407 | |
408 /** | |
409 * @brief Disables DAC and stop conversion of channel. | |
410 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
411 * the configuration information for the specified DAC. | |
412 * @param Channel The selected DAC channel. | |
413 * This parameter can be one of the following values: | |
414 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
415 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
416 * @retval HAL status | |
417 */ | |
418 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel) | |
419 { | |
420 /* Check the parameters */ | |
421 assert_param(IS_DAC_CHANNEL(Channel)); | |
422 | |
423 /* Disable the Peripheral */ | |
424 __HAL_DAC_DISABLE(hdac, Channel); | |
425 | |
426 /* Change DAC state */ | |
427 hdac->State = HAL_DAC_STATE_READY; | |
428 | |
429 /* Return function status */ | |
430 return HAL_OK; | |
431 } | |
432 | |
433 /** | |
434 * @brief Enables DAC and starts conversion of channel. | |
435 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
436 * the configuration information for the specified DAC. | |
437 * @param Channel The selected DAC channel. | |
438 * This parameter can be one of the following values: | |
439 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
440 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
441 * @param pData The destination peripheral Buffer address. | |
442 * @param Length The length of data to be transferred from memory to DAC peripheral | |
443 * @param Alignment Specifies the data alignment for DAC channel. | |
444 * This parameter can be one of the following values: | |
445 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected | |
446 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected | |
447 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected | |
448 * @retval HAL status | |
449 */ | |
450 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) | |
451 { | |
452 uint32_t tmpreg = 0U; | |
453 | |
454 /* Check the parameters */ | |
455 assert_param(IS_DAC_CHANNEL(Channel)); | |
456 assert_param(IS_DAC_ALIGN(Alignment)); | |
457 | |
458 /* Process locked */ | |
459 __HAL_LOCK(hdac); | |
460 | |
461 /* Change DAC state */ | |
462 hdac->State = HAL_DAC_STATE_BUSY; | |
463 | |
464 if(Channel == DAC_CHANNEL_1) | |
465 { | |
466 /* Set the DMA transfer complete callback for channel1 */ | |
467 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; | |
468 | |
469 /* Set the DMA half transfer complete callback for channel1 */ | |
470 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; | |
471 | |
472 /* Set the DMA error callback for channel1 */ | |
473 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; | |
474 | |
475 /* Enable the selected DAC channel1 DMA request */ | |
476 hdac->Instance->CR |= DAC_CR_DMAEN1; | |
477 | |
478 /* Case of use of channel 1 */ | |
479 switch(Alignment) | |
480 { | |
481 case DAC_ALIGN_12B_R: | |
482 /* Get DHR12R1 address */ | |
483 tmpreg = (uint32_t)&hdac->Instance->DHR12R1; | |
484 break; | |
485 case DAC_ALIGN_12B_L: | |
486 /* Get DHR12L1 address */ | |
487 tmpreg = (uint32_t)&hdac->Instance->DHR12L1; | |
488 break; | |
489 case DAC_ALIGN_8B_R: | |
490 /* Get DHR8R1 address */ | |
491 tmpreg = (uint32_t)&hdac->Instance->DHR8R1; | |
492 break; | |
493 default: | |
494 break; | |
495 } | |
496 } | |
497 else | |
498 { | |
499 /* Set the DMA transfer complete callback for channel2 */ | |
500 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; | |
501 | |
502 /* Set the DMA half transfer complete callback for channel2 */ | |
503 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; | |
504 | |
505 /* Set the DMA error callback for channel2 */ | |
506 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; | |
507 | |
508 /* Enable the selected DAC channel2 DMA request */ | |
509 hdac->Instance->CR |= DAC_CR_DMAEN2; | |
510 | |
511 /* Case of use of channel 2 */ | |
512 switch(Alignment) | |
513 { | |
514 case DAC_ALIGN_12B_R: | |
515 /* Get DHR12R2 address */ | |
516 tmpreg = (uint32_t)&hdac->Instance->DHR12R2; | |
517 break; | |
518 case DAC_ALIGN_12B_L: | |
519 /* Get DHR12L2 address */ | |
520 tmpreg = (uint32_t)&hdac->Instance->DHR12L2; | |
521 break; | |
522 case DAC_ALIGN_8B_R: | |
523 /* Get DHR8R2 address */ | |
524 tmpreg = (uint32_t)&hdac->Instance->DHR8R2; | |
525 break; | |
526 default: | |
527 break; | |
528 } | |
529 } | |
530 | |
531 /* Enable the DMA Stream */ | |
532 if(Channel == DAC_CHANNEL_1) | |
533 { | |
534 /* Enable the DAC DMA underrun interrupt */ | |
535 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); | |
536 | |
537 /* Enable the DMA Stream */ | |
538 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); | |
539 } | |
540 else | |
541 { | |
542 /* Enable the DAC DMA underrun interrupt */ | |
543 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); | |
544 | |
545 /* Enable the DMA Stream */ | |
546 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); | |
547 } | |
548 | |
549 /* Enable the Peripheral */ | |
550 __HAL_DAC_ENABLE(hdac, Channel); | |
551 | |
552 /* Process Unlocked */ | |
553 __HAL_UNLOCK(hdac); | |
554 | |
555 /* Return function status */ | |
556 return HAL_OK; | |
557 } | |
558 | |
559 /** | |
560 * @brief Disables DAC and stop conversion of channel. | |
561 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
562 * the configuration information for the specified DAC. | |
563 * @param Channel The selected DAC channel. | |
564 * This parameter can be one of the following values: | |
565 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
566 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
567 * @retval HAL status | |
568 */ | |
569 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) | |
570 { | |
571 HAL_StatusTypeDef status = HAL_OK; | |
572 | |
573 /* Check the parameters */ | |
574 assert_param(IS_DAC_CHANNEL(Channel)); | |
575 | |
576 /* Disable the selected DAC channel DMA request */ | |
577 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel); | |
578 | |
579 /* Disable the Peripheral */ | |
580 __HAL_DAC_DISABLE(hdac, Channel); | |
581 | |
582 /* Disable the DMA Channel */ | |
583 /* Channel1 is used */ | |
584 if(Channel == DAC_CHANNEL_1) | |
585 { | |
586 status = HAL_DMA_Abort(hdac->DMA_Handle1); | |
587 } | |
588 else /* Channel2 is used for */ | |
589 { | |
590 status = HAL_DMA_Abort(hdac->DMA_Handle2); | |
591 } | |
592 | |
593 /* Check if DMA Channel effectively disabled */ | |
594 if(status != HAL_OK) | |
595 { | |
596 /* Update DAC state machine to error */ | |
597 hdac->State = HAL_DAC_STATE_ERROR; | |
598 } | |
599 else | |
600 { | |
601 /* Change DAC state */ | |
602 hdac->State = HAL_DAC_STATE_READY; | |
603 } | |
604 | |
605 /* Return function status */ | |
606 return status; | |
607 } | |
608 | |
609 /** | |
610 * @brief Returns the last data output value of the selected DAC channel. | |
611 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
612 * the configuration information for the specified DAC. | |
613 * @param Channel The selected DAC channel. | |
614 * This parameter can be one of the following values: | |
615 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
616 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
617 * @retval The selected DAC channel data output value. | |
618 */ | |
619 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) | |
620 { | |
621 /* Check the parameters */ | |
622 assert_param(IS_DAC_CHANNEL(Channel)); | |
623 | |
624 /* Returns the DAC channel data output register value */ | |
625 if(Channel == DAC_CHANNEL_1) | |
626 { | |
627 return hdac->Instance->DOR1; | |
628 } | |
629 else | |
630 { | |
631 return hdac->Instance->DOR2; | |
632 } | |
633 } | |
634 | |
635 /** | |
636 * @brief Handles DAC interrupt request | |
637 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
638 * the configuration information for the specified DAC. | |
639 * @retval None | |
640 */ | |
641 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) | |
642 { | |
643 /* Check underrun channel 1 flag */ | |
644 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) | |
645 { | |
646 /* Change DAC state to error state */ | |
647 hdac->State = HAL_DAC_STATE_ERROR; | |
648 | |
649 /* Set DAC error code to channel1 DMA underrun error */ | |
650 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1; | |
651 | |
652 /* Clear the underrun flag */ | |
653 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); | |
654 | |
655 /* Disable the selected DAC channel1 DMA request */ | |
656 hdac->Instance->CR &= ~DAC_CR_DMAEN1; | |
657 | |
658 /* Error callback */ | |
659 HAL_DAC_DMAUnderrunCallbackCh1(hdac); | |
660 } | |
661 /* Check underrun channel 2 flag */ | |
662 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) | |
663 { | |
664 /* Change DAC state to error state */ | |
665 hdac->State = HAL_DAC_STATE_ERROR; | |
666 | |
667 /* Set DAC error code to channel2 DMA underrun error */ | |
668 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2; | |
669 | |
670 /* Clear the underrun flag */ | |
671 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); | |
672 | |
673 /* Disable the selected DAC channel1 DMA request */ | |
674 hdac->Instance->CR &= ~DAC_CR_DMAEN2; | |
675 | |
676 /* Error callback */ | |
677 HAL_DACEx_DMAUnderrunCallbackCh2(hdac); | |
678 } | |
679 } | |
680 | |
681 /** | |
682 * @brief Conversion complete callback in non blocking mode for Channel1 | |
683 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
684 * the configuration information for the specified DAC. | |
685 * @retval None | |
686 */ | |
687 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) | |
688 { | |
689 /* Prevent unused argument(s) compilation warning */ | |
690 UNUSED(hdac); | |
691 /* NOTE : This function Should not be modified, when the callback is needed, | |
692 the HAL_DAC_ConvCpltCallback could be implemented in the user file | |
693 */ | |
694 } | |
695 | |
696 /** | |
697 * @brief Conversion half DMA transfer callback in non blocking mode for Channel1 | |
698 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
699 * the configuration information for the specified DAC. | |
700 * @retval None | |
701 */ | |
702 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) | |
703 { | |
704 /* Prevent unused argument(s) compilation warning */ | |
705 UNUSED(hdac); | |
706 /* NOTE : This function Should not be modified, when the callback is needed, | |
707 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file | |
708 */ | |
709 } | |
710 | |
711 /** | |
712 * @brief Error DAC callback for Channel1. | |
713 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
714 * the configuration information for the specified DAC. | |
715 * @retval None | |
716 */ | |
717 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) | |
718 { | |
719 /* Prevent unused argument(s) compilation warning */ | |
720 UNUSED(hdac); | |
721 /* NOTE : This function Should not be modified, when the callback is needed, | |
722 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file | |
723 */ | |
724 } | |
725 | |
726 /** | |
727 * @brief DMA underrun DAC callback for channel1. | |
728 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
729 * the configuration information for the specified DAC. | |
730 * @retval None | |
731 */ | |
732 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) | |
733 { | |
734 /* Prevent unused argument(s) compilation warning */ | |
735 UNUSED(hdac); | |
736 /* NOTE : This function Should not be modified, when the callback is needed, | |
737 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file | |
738 */ | |
739 } | |
740 | |
741 /** | |
742 * @} | |
743 */ | |
744 | |
745 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions | |
746 * @brief Peripheral Control functions | |
747 * | |
748 @verbatim | |
749 ============================================================================== | |
750 ##### Peripheral Control functions ##### | |
751 ============================================================================== | |
752 [..] This section provides functions allowing to: | |
753 (+) Configure channels. | |
754 (+) Set the specified data holding register value for DAC channel. | |
755 | |
756 @endverbatim | |
757 * @{ | |
758 */ | |
759 | |
760 /** | |
761 * @brief Configures the selected DAC channel. | |
762 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
763 * the configuration information for the specified DAC. | |
764 * @param sConfig DAC configuration structure. | |
765 * @param Channel The selected DAC channel. | |
766 * This parameter can be one of the following values: | |
767 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
768 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
769 * @retval HAL status | |
770 */ | |
771 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) | |
772 { | |
773 uint32_t tmpreg1 = 0U, tmpreg2 = 0U; | |
774 | |
775 /* Check the DAC parameters */ | |
776 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); | |
777 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); | |
778 assert_param(IS_DAC_CHANNEL(Channel)); | |
779 | |
780 /* Process locked */ | |
781 __HAL_LOCK(hdac); | |
782 | |
783 /* Change DAC state */ | |
784 hdac->State = HAL_DAC_STATE_BUSY; | |
785 | |
786 /* Get the DAC CR value */ | |
787 tmpreg1 = hdac->Instance->CR; | |
788 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ | |
789 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel); | |
790 /* Configure for the selected DAC channel: buffer output, trigger */ | |
791 /* Set TSELx and TENx bits according to DAC_Trigger value */ | |
792 /* Set BOFFx bit according to DAC_OutputBuffer value */ | |
793 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); | |
794 /* Calculate CR register value depending on DAC_Channel */ | |
795 tmpreg1 |= tmpreg2 << Channel; | |
796 /* Write to DAC CR */ | |
797 hdac->Instance->CR = tmpreg1; | |
798 /* Disable wave generation */ | |
799 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel); | |
800 | |
801 /* Change DAC state */ | |
802 hdac->State = HAL_DAC_STATE_READY; | |
803 | |
804 /* Process unlocked */ | |
805 __HAL_UNLOCK(hdac); | |
806 | |
807 /* Return function status */ | |
808 return HAL_OK; | |
809 } | |
810 | |
811 /** | |
812 * @brief Set the specified data holding register value for DAC channel. | |
813 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
814 * the configuration information for the specified DAC. | |
815 * @param Channel The selected DAC channel. | |
816 * This parameter can be one of the following values: | |
817 * @arg DAC_CHANNEL_1: DAC Channel1 selected | |
818 * @arg DAC_CHANNEL_2: DAC Channel2 selected | |
819 * @param Alignment Specifies the data alignment. | |
820 * This parameter can be one of the following values: | |
821 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected | |
822 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected | |
823 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected | |
824 * @param Data Data to be loaded in the selected data holding register. | |
825 * @retval HAL status | |
826 */ | |
827 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) | |
828 { | |
829 __IO uint32_t tmp = 0U; | |
830 | |
831 /* Check the parameters */ | |
832 assert_param(IS_DAC_CHANNEL(Channel)); | |
833 assert_param(IS_DAC_ALIGN(Alignment)); | |
834 assert_param(IS_DAC_DATA(Data)); | |
835 | |
836 tmp = (uint32_t)hdac->Instance; | |
837 if(Channel == DAC_CHANNEL_1) | |
838 { | |
839 tmp += DAC_DHR12R1_ALIGNMENT(Alignment); | |
840 } | |
841 else | |
842 { | |
843 tmp += DAC_DHR12R2_ALIGNMENT(Alignment); | |
844 } | |
845 | |
846 /* Set the DAC channel1 selected data holding register */ | |
847 *(__IO uint32_t *) tmp = Data; | |
848 | |
849 /* Return function status */ | |
850 return HAL_OK; | |
851 } | |
852 | |
853 /** | |
854 * @} | |
855 */ | |
856 | |
857 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions | |
858 * @brief Peripheral State and Errors functions | |
859 * | |
860 @verbatim | |
861 ============================================================================== | |
862 ##### Peripheral State and Errors functions ##### | |
863 ============================================================================== | |
864 [..] | |
865 This subsection provides functions allowing to | |
866 (+) Check the DAC state. | |
867 (+) Check the DAC Errors. | |
868 | |
869 @endverbatim | |
870 * @{ | |
871 */ | |
872 | |
873 /** | |
874 * @brief return the DAC state | |
875 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
876 * the configuration information for the specified DAC. | |
877 * @retval HAL state | |
878 */ | |
879 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac) | |
880 { | |
881 /* Return DAC state */ | |
882 return hdac->State; | |
883 } | |
884 | |
885 | |
886 /** | |
887 * @brief Return the DAC error code | |
888 * @param hdac pointer to a DAC_HandleTypeDef structure that contains | |
889 * the configuration information for the specified DAC. | |
890 * @retval DAC Error Code | |
891 */ | |
892 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) | |
893 { | |
894 return hdac->ErrorCode; | |
895 } | |
896 | |
897 /** | |
898 * @} | |
899 */ | |
900 | |
901 /** | |
902 * @brief DMA conversion complete callback. | |
903 * @param hdma pointer to a DMA_HandleTypeDef structure that contains | |
904 * the configuration information for the specified DMA module. | |
905 * @retval None | |
906 */ | |
907 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) | |
908 { | |
909 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
910 | |
911 HAL_DAC_ConvCpltCallbackCh1(hdac); | |
912 | |
913 hdac->State= HAL_DAC_STATE_READY; | |
914 } | |
915 | |
916 /** | |
917 * @brief DMA half transfer complete callback. | |
918 * @param hdma pointer to a DMA_HandleTypeDef structure that contains | |
919 * the configuration information for the specified DMA module. | |
920 * @retval None | |
921 */ | |
922 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) | |
923 { | |
924 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
925 /* Conversion complete callback */ | |
926 HAL_DAC_ConvHalfCpltCallbackCh1(hdac); | |
927 } | |
928 | |
929 /** | |
930 * @brief DMA error callback | |
931 * @param hdma pointer to a DMA_HandleTypeDef structure that contains | |
932 * the configuration information for the specified DMA module. | |
933 * @retval None | |
934 */ | |
935 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) | |
936 { | |
937 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
938 | |
939 /* Set DAC error code to DMA error */ | |
940 hdac->ErrorCode |= HAL_DAC_ERROR_DMA; | |
941 | |
942 HAL_DAC_ErrorCallbackCh1(hdac); | |
943 | |
944 hdac->State= HAL_DAC_STATE_READY; | |
945 } | |
946 | |
947 /** | |
948 * @} | |
949 */ | |
950 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\ | |
951 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\ | |
952 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx ||\ | |
953 STM32F413xx || STM32F423xx */ | |
954 #endif /* HAL_DAC_MODULE_ENABLED */ | |
955 | |
956 /** | |
957 * @} | |
958 */ | |
959 | |
960 /** | |
961 * @} | |
962 */ | |
963 | |
964 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |